TELKOM
NIKA Indonesia
n
Journal of
Electrical En
gineering
Vol. 14, No. 2, May 2015, pp. 228 ~ 24
0
DOI: 10.115
9
1
/telkomni
ka.
v
14i2.736
2
228
Re
cei
v
ed
Jan
uary 20, 201
5
;
Revi
sed Ap
ril 11, 2015; Accepted Ap
ril 26,, 2015
New Bi
polar Hybrid Carrier PWM Strategies for
Symmetrical Multilevel Inverter
C.R. Balam
u
rugan*, S.P.
Nat
a
rajan, R.
Bensr
a
j
Aruna
i Engi
ne
erin
g Col
l
eg
e, T
i
ruvannama
l
a
i
, India
*Corres
p
o
ndi
n
g
author, e-ma
i
l
: crbala
i
n2
01
0
@
gmai
l.co
m
A
b
st
r
a
ct
In this p
a
p
e
r, h
y
brid
mod
u
lati
on
met
hods
su
itabl
e for H-
bri
dge
MLI ar
e d
i
scussed. T
h
e r
e
sults
of
exper
imenta
l
w
o
rk using dS
PACE system
only ar
e pr
es
e
n
ted for three
phas
e five lev
e
l casca
de
d typ
e
inverter. D
i
fferent hy
brid
carri
er PW
M (Puls
e
W
i
dth Mo
dul
at
ion) strate
gi
es
usin
g si
nuso
i
d
a
l refer
enc
e, th
ird
har
mo
nic in
ject
ion refer
ence,
60 de
gre
e
refe
rence a
nd step
ped w
a
ve refer
ence for the ch
osen i
n
verter a
r
e
initia
lly deve
l
o
ped usin
g
SI
MULINK.
Strategi
es dev
el
op
ed ar
e the
n
i
m
p
l
e
m
e
n
ted
i
n
rea
l
ti
me u
s
in
g
dSPACE/RTI. The five lev
e
l
output v
o
ltages of the chos
en MLI (Multi
Level Inv
e
rter) obtained
using t
he
dSPACE system
based PWM
stra
tegies and the corresponding % T
HD (
T
otal Harmonic Distortion)
and
V
RMS
(fund
a
m
e
n
tal) ar
e
prese
n
ted
and
a
naly
z
e
d
.
It is se
en
that sin
u
soi
d
a
l
refere
nce w
i
th
PS+
VF
(Phas
e
shift+
Variab
le
F
r
eque
ncy) an
d PS+
PD (Pha
se Disp
o
siti
on)
provid
es o
u
tp
ut w
i
th relative
ly low
distortio
n
.
APOD+
CO (Alternative P
has
e Disp
o
st
io
n+
Carrier Over
la
ppi
ng) a
nd C
O
+
P
D PW
M strategy is fou
n
d
t
o
perfor
m
b
e
tter
since
it pr
ovi
des re
lativ
e
ly
hig
her
fu
nd
amental
RMS o
u
t
put volt
age
an
d rel
a
tively
lo
w
e
r
stress on th
e
devic
es. It is displ
a
ye
d that
T
H
I (T
hi
rd H
a
rmonic
Injecti
on) refer
enc
e
w
i
th PS+
VF
an
d
CO+
PS provid
es output w
i
th relatively l
o
w
distor
tio
n
. APOD+
CO and CO+
PS PW
M strategy is foun
d
to
perfor
m
b
e
tter
since
it pr
ovi
des re
lativ
e
ly
hig
her
fu
nd
amental
RMS o
u
t
put volt
age
an
d rel
a
tively
lo
w
e
r
stress on
the
d
e
vices. It is
o
b
s
erved
that
60
de
gree
refer
e
nce w
i
th P
D
+
V
F
provi
des
out
put w
i
th re
lativ
e
ly
low
distorti
on.
CO+
P
D PW
M strategy
is
foun
d to
p
e
r
f
orm
better
si
nce
it pr
ovid
e
s
rel
a
tively
h
i
gher
funda
menta
l
R
M
S output vo
ltage
an
d rel
a
tiv
e
ly l
o
w
e
r
stress on the
dev
ic
es. It is noted t
hat stepp
ed w
a
ve
referenc
e w
i
th
APOD+
PD a
nd PD+
V
F
pr
ovid
es o
u
tput
w
i
th relative
ly
low
distorti
on
. APOD+CO and
CO+PD PWM strategy is found to perfo
r
m
be
tter since it pr
o
v
ides r
e
lativ
e
ly
hig
her fu
nda
mental
RMS (Ro
o
t
Mean
Squ
a
re)
outp
u
t volta
g
e
a
nd r
e
lativ
e
l
y
low
e
r stress
on t
he
devic
e
s
. T
he si
mu
lati
on
and
h
a
rdw
a
r
e
results clos
ely
match w
i
th eac
h other.
Ke
y
w
ords
: hy
brid, THD, DSPACE, RTI, co
ntrol desk
Copy
right
©
2015 In
stitu
t
e o
f
Ad
van
ced
En
g
i
n
eerin
g and
Scien
ce. All
rig
h
t
s reser
ve
d
.
1. Introduc
tion
Multilevel voltage
so
urce
in
verters h
a
ve
rece
nt
ly eme
r
ged
as very i
m
porta
nt alte
rnatives
in high po
we
r, medium voltage ap
plications. Th
e f
unction of a MLI is to synthe
si
ze a desi
r
e
d
AC
output voltag
e from seve
ral DC voltage
source
s wi
th
extremely low disto
r
tion. The MLIs p
r
o
v
ide
high o
u
tput voltage
s with l
o
w h
a
rm
oni
cs with
out the
use
of tra
n
sformers
or
serie
s
con
nect
e
d
synchro
n
ized
swit
chin
g de
vices. A
s
the
numbe
r
of o
u
t
put voltage l
e
vels in
crea
ses, the
harmo
nic
conte
n
t of th
e outp
u
t voltage
de
cre
a
ses
sig
n
ifica
n
tly. Incre
a
si
ng
the n
u
mb
er
of output volt
age
levels in the inverter
without
req
u
irin
g
highe
r ratin
g
s o
n
individ
ual devices
can in
crea
se
the
power
rating
of load. MLIs offer several
advant
ag
es.
These in
clu
de hig
her
DC bus
utilizatio
n,
improve
d
ha
rmonic
perfo
rmance an
d re
duced st
re
ss
on po
we
r dev
ice
s
. MLIs fin
d
appli
c
ation
s
in
adju
s
table sp
eed
d
r
ive
s
, electri
c
utilities and re
n
e
w
abl
e en
erg
y
system
s.
Initially the si
ngle
pha
se casca
ded MLI is i
m
pleme
n
ted
throug
h FPG
A
. For each and every P
W
M strategie
s
we
need th
e
sep
a
rated
codin
g
to be
written
usin
g veri
l
o
g
or
xilin
k software.
That coding sh
ould
be
downloadi
ng
throug
h em
ulater. So the p
r
oble
m
identif
ied is fo
r a p
a
r
ticula
r a
pplication the FP
GA
can
be
used.
Then th
e me
mory availa
bl
e, pro
c
e
s
sing
spe
ed i
s
ve
ry less in FP
G
A
. So the FP
G
A
is repl
aced
by dSPACE. The dSPACE is havi
ng more advant
age compared to FPGA.
In
dSPACE either
we
may us
e
DAC or I
O
s
to interf
ac
e the
c
ont
rol c
i
rcuit and power c
i
ruit.
I
n
dSPACE there are
many I
O
s
,
DA
C,
ADC and many interfac
ing port
s
are
available. Compared to
FPGA the DSPACE is
eas
i
er to implement any
power
elec
tronic
c
i
rcuits
. Simulation
s
t
udies
on
variou
s m
u
lti-carrie
r P
W
M
strategi
es for thre
e p
h
a
s
e
ca
scade
d typ
e
five level
in
verter foll
owe
d
by DSPACE
based implementation are pres
ented in
this
paper.
The dSPACE
DS 1103 is
us
ed
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Ne
w Bipola
r
Hybrid
Ca
rrie
r
PWM Strate
gies fo
r S
y
m
m
e
trical Multilevel
…
(C.
R
. Balam
u
rugan)
229
to overcom
e
the sho
r
tcomi
ngs of
F
P
G
A
b
e
i
ng
us
ab
le fo
r
s
e
le
c
t
ive
m
f
only. L
ee
and
Nojim
a [
1
]
prop
osed a quantitative power qu
a
lity and chara
c
teri
stic an
al
ysis of multilevel pulse width
modulatio
n method
s for
three level n
eutral poi
nt clamp
ed me
dium voltage
indust
r
ial dri
v
es.
Gupta an
d Jain [2] sugg
e
s
ted a topol
o
g
y for mult
ilevel inverters to attain maximum num
ber of
levels from gi
ven dc sources. Najafi an
d Ya
tim [3] m
ade a
de
sign
and im
pleme
n
tation of a
n
e
w
multilevel inverter to
polo
g
y
. Rosh
an
ku
mar et al [4]
discu
s
sed a f
i
ve-level inve
rter top
o
logy
with
singl
e dc
su
pply by ca
scadi
ng a flying capa
citor
inverter a
n
d
an H-b
r
id
ge. Wu
et al [5]
develop
ed t
w
o mo
dulate
d
digital
con
t
rol for thre
e pha
se
bid
i
rectio
nal inv
e
rter
with
wi
de
indu
ctan
ce variation. José et al [6]
discu
s
sed a
generalized
propo
rtional
integral tra
c
king
controlle
r for
a sin
g
le
pha
se multilevel
cascad
e inve
rter. Youn
gho
o
n
Ch
o et al
[7] pro
p
o
s
ed
a
carrie
r-ba
sed
neutral volt
age mo
dulati
on strat
egy for multilevel
casca
ded i
n
verters un
d
e
r
unbal
an
ced
DC
sou
r
ce
s. Shweta Ga
utam and
Rajesh Gupta
[8] sugge
st
ed a switchi
ng
freque
ncy
de
rivation for th
e
ca
scad
ed m
u
ltilevel inve
rt
er o
p
e
r
ating
i
n
current
co
n
t
rol mo
de
usi
n
g
multiband hy
stere
s
i
s
mod
u
lation. Choi
et al [9]
discu
ssed diag
no
sis and tole
ra
nt strategy of an
open
-switch f
ault for
T-typ
e
thre
e-level
inverter sy
ste
m
s. Nunta
w
a
t
Thitichai
wo
rako
rn
et al [1
0
]
made a
expe
rimental ve
rification
of a m
odula
r
multile
vel ca
scade i
n
verter
ba
se
d on do
uble
-
star
bridg
e
cell
s.
Till Boller et
a
l
[11] p
r
op
ose
d
a
neut
ral-p
o
int pote
n
tial
balan
cing
u
s
i
ng
synchro
n
o
u
s
optimal pul
se
width mo
dula
t
ion of multilevel invert
ers in medium
-vol
tage high
-po
w
er A
C
drive
s
.
Makoto
Hagi
wara a
nd
Hirofumi Aka
g
i [
12] mad
e
ex
perim
entation
and
simul
a
tion of a
mod
u
lar
push–p
ull P
W
M
conve
r
te
r for a
batte
ry ene
rgy
st
orag
e
syste
m
. Cha
ng
Wu an
d
Chou
[13]
develop
ed a
sola
r p
o
wer
gene
ration
system with
a
seve
n-level
inverter.
Gup
t
a and
Jain [
14]
prop
osed a
novel multile
vel inverter
based o
n
switch
ed
DC
sou
r
ces. E
s
p
i
nosa et al [
15]
develop
ed a
new mod
u
lati
on meth
od fo
r a
13-l
e
vel a
s
ymmetri
c
in
verter to
wa
rd
minimum
THD.
Makin
eni
and
Bha
s
kar [16]
mad
e
a
si
m
u
lation
on
ca
scade
d
H-b
r
i
dge
multileve
l inverte
r
b
a
sed
DSTATCOM.
Murali et al [
17] also mad
e
a de
sign
a
nd an
alysis
o
n
voltage so
urce inve
rter
for
rene
wa
ble e
n
e
rgy a
ppli
c
ations. Ba
baei
et al [
18] intro
duced a
si
ngl
e pha
se
cascaded
multi le
vel
inverter ba
se
d on a new
basi
c
unit wit
h
redu
ce
d nu
mber of po
wer switch
es.
Gran
di et al [19]
analyzed a
n
d
compa
r
e
d
pea
k to
pea
k ri
pple
in
a
two l
e
vel a
nd multilevel
PWM i
n
vert
ers.
Rud
e
rm
an in
[20] discu
s
se
d abo
ut voltage THD fo
r si
ngle a
nd thre
e pha
se m
u
ltilevel inverters.
Bailu xiao [2
1] prop
osed
a modul
ar
ca
scade
d H-bri
dge multileve
l PV inverter with dist
ribut
ed
MPPT for grid conn
ecte
d appli
c
ation
s
. Jamal
udin et al [22] propo
sed a multilevel voltage so
urce
inverter
with optimize
d
usage of bidirectional switch
e
s
.
2. Casc
aded
Multilev
e
l In
v
e
rter
The m
a
in fe
a
t
ure of
a
ca
scaded
MLI
(CMLI) i
s
its abi
lity to redu
ce
the voltage
st
ress
on
each power d
e
vice due to the utilization
of multip
le DC so
urce
s. Thoug
h there
are several types
of MLI, the
configuration
o
f
Modula
r
Structured
Mu
ltil
evel
Inverte
r
(MSMI) also
calle
d ca
scad
ed
type is u
n
iqu
e
wh
en
com
p
ared
to othe
r
types of multil
evel inverte
r
i
n
the
sen
s
e t
hat it co
nsi
s
ts of
several mod
u
les that re
q
u
ire Sepa
rat
e
DC Sou
r
ces (S
DCS
). The functio
n
of this MLI
is to
synthe
size a desi
r
ed volta
ge from SDCS which ma
y
be batterie
s
, fuel cells or
sola
r cell
s. The
numbe
r of module
s
(M
) which i
s
equal
to the
numbe
r of DC source
s req
u
ire
d
depe
nd
s on the
numbe
r of l
e
vels (m
) in
th
e output
of the MS
MI. M a
nd m a
r
e
rel
a
ted by m
=
2
M
+1. F
o
r
out
put
voltage con
s
i
s
ting of five levels, whi
c
h
are +2V
dc
, +
V
dc
, 0,-V
dc
and -2V
dc
, the number of mod
u
les
requi
re
d in
th
e MSMI i
s
t
w
o. Co
mpa
r
ed
to othe
r type
s of MLI, th
e
MSMI req
u
ire
s
le
ss n
u
mb
e
r
o
f
comp
one
nts
with n
o
extra
clam
ping
di
ode
s o
r
vo
lta
ge b
a
lan
c
ing
ca
pa
citors t
hat only fu
rther
compli
cate t
he overall in
verter op
eration.
Each m
odule of MS
MI has the
same
stru
ctu
r
e
whe
r
eby it i
s
rep
r
e
s
ente
d
by a sin
g
le p
hase fu
ll b
r
id
ge inverte
r
. T
h
is
simple
m
odula
r
st
ru
cture
not only allo
ws
practi
cally
unlimited
nu
mber
of le
vel
s
for th
e MS
MI by stackin
g
up th
e mod
u
les
but also fa
cilitates its pa
cka
g
ing. Figu
re 1
sh
o
w
s the th
ree ph
ase five level ca
sca
ded inverte
r
.
The
ca
scade
d MLI
can
be
used a
s
com
pen
sa
tor in
p
o
we
r
system
s b
e
cause it
doe
s not
pre
s
ent un
ba
lance pro
b
le
m in DC
sou
r
ce. The
st
ru
cture of se
parate DC
sou
r
ces is
well sui
t
ed
for variou
s
rene
wable
en
ergy source
s su
ch a
s
fue
l
cell, photo
voltaic cell
a
nd biom
ass
cell.
Table
1
displ
a
ys
swit
ch
st
ates
and
volt
age l
e
vels of
five level
ca
scade
d inve
rt
er fo
r
R-pha
se
.
Figure 2 sh
o
w
s
cycli
c
switchin
g se
que
n
c
e for MSMI.
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ISSN: 23
02-4
046
TELKOM
NI
KA
Vol. 14, No. 2, May 2015 : 228 – 240
230
R
Y
B
Sa
1
Sa
2
Sa
3
Sa
4
Sa
1
Sa
2
Sa
3
Sa
4
Sb
1
Sb
2
Sb
3
Sb
4
Sb
1
Sb
2
Sb
3
Sb
4
Sc
1
Sc
2
Sc
1
Sc
3
Sc
4
Sc
2
Sc
3
Sc
4
V
dc
V
dc
V
dc
V
dc
V
dc
V
dc
N
Figure 1. Three pha
se five
level casca
d
ed inverte
r
Table 1. Swit
ch state
s
an
d
voltage levels of
five level
ca
scade
d inverter fo
r R-ph
ase
S
11
S
21
S
12
S
22
Ou
tpu
t
(V
o
)
1 0
1 0
+2V
dc
1 0
0 0
+V
dc
1 0
1 1
+V
dc
0 0
1 0
+V
dc
1 1
1 0
+V
dc
0 0
0 0
0
1 1
1 1
0
1 0
0 1
0
0 1
1 0
0
0 0
1 1
0
1 1
0 0
0
0 1
1 1
-V
dc
0 1
0 0
-V
dc
1 1
0 1
-V
dc
0 0
0 1
-V
dc
0 1
0 1
-2V
dc
Figure 2. Cyclic switchi
ng seque
nce of chosen MSMI
3. Modulatio
n Strategies
This p
ape
r prese
n
ts the co
mpari
s
o
n
of resu
lt
s of hybrid ca
rrie
r
PWM techni
que
s for the
cho
s
e
n
three
phase
CML
I. In
general for a five
le
vel inverter four carriers
are ne
ede
d for
symmetri
c
al f
i
ve level inverter. The
prop
ose
d
wo
rk fo
cu
se
s on
the
hybrid
ca
rri
er tech
nique.
T
he
uppe
r two ca
rrie
r
s o
p
e
r
ate
at different PWM strategie
s
com
p
a
r
ed t
o
the lowe
r two carriers. PD,
APOD, CO,
VF and PS m
u
lti-ca
rri
er P
W
M st
rategi
e
s
are cho
s
en
in this work
and the p
r
o
p
ose
d
carrie
r a
r
ran
gement
uses com
b
inatio
n
of any
two
strategi
es a
m
ong th
e five. As fa
r a
s
the
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TELKOM
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ISSN:
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Ne
w Bipola
r
Hybrid
Ca
rrie
r
PWM Strate
gies fo
r S
y
m
m
e
trical Multilevel
…
(C.
R
. Balam
u
rugan)
231
particula
r ref
e
ren
c
e
wave
is con
c
e
r
ne
d, there i
s
al
so m
u
ltiple CFD (Co
n
trol
Free
dom
De
gre
e
)
inclu
d
ing fre
q
uen
cy, amplitude, pha
se a
ngle of the ref
e
ren
c
e
wave.
The cho
s
en
CMLI
i
s
cont
rolled with
(A
POD + CO
),
(APOD +
PS),
(APO
D +
VF
),
(CO +
VF), (CO + P
S
), (PD + VF), (PS + PD), (PS
+ VF), (APOD + PD) and (CO + PD) hybri
d
PWM
with triang
ula
r
ca
rri
er an
d sine, T
H
I, 60 degree an
d stepped
wave
referen
c
e
s
a
nd the variati
on
of %THD
an
d V
RM
S
(fundamental) of th
e outp
u
t volt
age
are o
b
served
for various mo
dulati
on
indices m
a
.
3.1. Carrier
Arran
g
emen
t for Various
Refe
renc
es
The followi
ng
strategie
s
a
r
e employed i
n
this pap
er.
3.1.1. (APO
D + CO
) H
y
brid PWM Stra
teg
y
This
strategy
requi
re
s ea
ch
of the two carri
er waves i
n
the uppe
r h
a
lf side to be
phase
displ
a
ced fro
m
each other by 180 deg
rees alte
rnatel
y. The vertica
l
offset of carriers for
cho
s
en
inverter can
be illustrated
in Figure 3 to 6. It
can
be
seen that
the two carr
iers i
n
the lower hal
f
side ove
r
la
p with ea
ch ot
her a
nd the
referen
c
e
sin
e
wave is
pla
c
ed at the mi
ddle of the f
our
car
r
ie
rs.
Figure 3. Sample Ca
rri
er
arrang
ement
fo
r (APOD
+ CO
) hybrid P
W
M strategy (m
a
= 0.8, m
f
=
40)
with sine referen
c
e
Figure 4. Sample Ca
rri
er
arrang
ement
fo
r (APOD
+ CO
) hybrid P
W
M strategy (m
a
= 0.8, m
f
=
40) with THIP
WM reference
Figure. 5 Sample Ca
rri
er
arrang
ement
fo
r (APOD
+ CO
) hybrid P
W
M strategy (m
a
= 0.8, m
f
=
4
0
)
w
i
th
60
de
g
r
ee
r
e
fer
e
nc
e
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TELKOM
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Vol. 14, No. 2, May 2015 : 228 – 240
232
Figure 6. Sample Ca
rri
er
arrang
ement
fo
r (APOD
+ CO
) hybrid P
W
M strategy (m
a
= 0.8, m
f
=
40) with
step
ped wave ref
e
ren
c
e
4. Simulation Resul
t
s
Simulation is perform
ed
usin
g MATL
AB-SIMU
LINK. It is obse
r
v
ed that (PS+APOD)
PWM with
si
nus
oidal
refe
ren
c
e, (PS
+
VF) PWM
wi
th THI refe
re
nce, (P
D
+
VF
) PWM
with
60
degree
refe
rence a
nd
(APOD+PS) P
W
M
with
ste
pped
wave
referen
c
e
p
r
o
v
ide output
with
relatively low dis
t
ortion. It is
also seen t
hat (C
O+
VF) PWM
strategy
with sine refe
ren
c
e,
(APOD+CO) and (CO+PS
)
PWM with
t
h
ird harmoni
c inje
ction,
(CO
+
PD) PWM with
60 d
e
gree
PWM refere
n
c
e a
nd
(APOD+CO) P
W
M with
stepp
ed wave referen
c
e
are f
ound to
pe
rform
better sin
c
e t
hey provide
relatively higher funda
ment
al RMS outpu
t voltage.
The
cho
s
en
three to
polog
ies of five le
vel inverter
are
simul
a
te
d usi
ng SIM
U
LINK
-
power sy
ste
m
block set.
Simulation
s a
r
e
pe
rform
ed
for different value
s
of m
a
rangin
g
from 0
.
6 to
1 and
re
sistiv
e load of 1
0
0
Ω
. Simulated
output volta
ge of cho
s
en
MLI with (A
POD+CO) P
W
M
strategy i
s
displayed only f
o
r a
sampl
e
value of m
a
=0.8. m
f
is ch
ose
n
as 4
0
as
a trade
off in view
of the follo
wi
ng rea
s
on
s: (i) to redu
ce
swit
chi
ng lo
sses
(which ma
y be hig
h
at l
a
rge
m
f
) (ii)
t
o
redu
ce
the
si
ze
of the
filter n
eede
d fo
r t
he
clo
s
ed
loo
p
control, the
filter
size b
e
i
ng m
ode
rate
at
mode
rate f
r
e
quen
cie
s
(iii) to effe
ctively utilize th
e
available
dS
PACE sy
ste
m
for ha
rd
ware
impleme
n
tation. The
co
rresp
ondi
ng %
T
HD and
RMS values
o
f
output voltage i
s
me
asured
usin
g FFT (F
ast Fou
r
ier T
r
ansfo
rm) bl
ock of SIMULINK and tabulat
ed.
Table
2 an
d
Figure 20
sh
ow th
e comp
arison
of %T
HD of outp
u
t
voltage (by si
mulation
)
with different
hybrid
bipol
ar P
W
M
swi
t
ching
strate
gies for va
ri
ous mod
u
lati
on indi
ce
s
a
n
d
sinu
soi
dal
ref
e
ren
c
e.
Tabl
e 3
sh
ows t
h
e comp
ari
s
on
of %T
HD of
output volta
ge
with diffe
rent
hybrid
bipol
a
r
PWM
swit
ching
strate
gi
es fo
r va
riou
s m
odulatio
n
indi
ce
s a
n
d
third
ha
rmo
n
ic
injectio
n refe
ren
c
e. Ta
ble
4 sh
ow th
e
comp
ar
i
s
o
n
of %THD
of output volta
ge with
different
hybrid
bipola
r
PWM
switching
strate
gi
es fo
r vari
ou
s mo
dulatio
n
indices and
60 de
gree P
W
M
referen
c
e. T
able
5
sho
w
s the
compa
r
iso
n
of %T
HD of o
u
tput
voltage
with
different
hybrid
bipola
r
PWM
swit
chin
g stra
tegies for va
ri
ous
mo
dulati
on indi
ce
s an
d stepp
ed wa
ve refere
nce.
Variation
s
of
RMS value o
f
fundamenta
l
output voltage for va
riou
s mod
u
lation
indice
s
(0.6-1)
are li
sted in Ta
ble
3 (Fig
ure 21
), 5, 7 and
9
respe
c
tively for
sine, T
H
I, 60 de
gre
e
a
n
d
stepp
ed wave referen
c
e
s
. Figure
7, 9, 11 and 1
3
show the
outp
u
t voltages o
f
casca
ded
MLI
with (APO
D+CO)
hybrid
PWM with
sine, T
H
I, 60 de
gre
e
a
nd ste
ppe
d
wave refere
nce
s
respe
c
tively and Fi
gure 8
,
10, 12
and
14
sho
w
co
rre
sp
ondi
ng
FFT plot fo
r
m
a
= 0.8.
From
simulate
d FF
T plot it is se
en that domin
ant har
mo
n
i
cs
a
r
e
pr
es
en
t in
(
APO
D+
CO
)
as
fo
llo
ws
:
(i)
2
nd
, 3
rd
, 35
th
to 40
th
with s
i
ne referenc
e
(ii) 2
nd
, 3
rd
, 9
th
, 3
1
st
, 33
rd
to 40
th
with THI PWM reference
(iii) 2
nd
, 3
rd
, 5
th
, 7
th
, 33
rd
to 38
th
,
40
th
with 60 degree refere
nce
(iv
)
2
nd
, 3
rd
, 15
th
, 21
st
, 23
rd
, 35
th
to 40
th
with stepped
wave
referen
c
e.
The follo
win
g
paramete
r
v
a
lue
s
a
r
e
use
d
for sim
u
lati
on: V
dc
= 100
V
and R (lo
a
d) =
1
0
0
ohms, f
c
= 20
00Hz an
d f
m
= 50 Hz.
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Ne
w Bipola
r
Hybrid
Ca
rrie
r
PWM Strate
gies fo
r S
y
m
m
e
trical Multilevel
…
(C.
R
. Balam
u
rugan)
233
Figure 7. Output voltage of casca
ded M
L
I wi
th (APO
D+CO
) PWM
strategy (sin
e
ref.)
Figure 8. FFT
plot of casca
ded MLI with
(APO
D+CO)
PWM strateg
y
for R-ph
ase
(sine
ref.)
Figure 9. Output voltage of casca
ded M
L
I wi
th (APO
D+CO
) PWM
strategy (THI
ref.)
Figure 10. FF
T plot of cascaded MLI wit
h
(APO
D+CO
) PWM strate
gy for R-p
h
a
s
e (THI ref.)
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046
TELKOM
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KA
Vol. 14, No. 2, May 2015 : 228 – 240
234
Figure 11. Ou
tput voltage of cascad
ed M
L
I wi
th (APO
D+CO
) PWM
strategy
(60 d
egre
e
PWM
ref.)
Figure 12. FF
T plot of cascaded MLI wit
h
(APO
D+CO
) PWM strate
gy for R-p
h
a
s
e (60 de
gree
PWM ref.)
Figure 13. Ou
tput voltage of cascad
ed M
L
I with
(APO
D+CO
) PWM
strategy (step
ped wave ref.)
Figure 14. FF
T plot of cascaded MLI wit
h
(
APOD+CO
) PWM strate
gy for R-p
h
a
s
e (step
ped
wave ref.)
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Ne
w Bipola
r
Hybrid
Ca
rrie
r
PWM Strate
gies fo
r S
y
m
m
e
trical Multilevel
…
(C.
R
. Balam
u
rugan)
235
Table 2. % THD of outp
u
t voltage (R-p
h
a
se
) of ca
sca
ded MLI for variou
s value
s
of m
a
with s
i
ne
ref (By
simula
tion)
m
a
APO
D+
CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 33.47
27.36
27.15
27.32
33.49
33.32
33.46
27.01
26.9
26.91
0.9 40.52
33.89
33.67
33.25
40.46
40.3
40.35
33.48
33.52
33.38
0.8 48.45
38.62
38.41
38.56
48.22
48.08
48.15
38.31
38.41
38.35
0.7 59.04
42.21
42.13
42.44
58.53
58.55
58.75
42.30
42.19
42.42
0.6 69.27
44.42
44.44
44.57
68.91
68.91
69.01
44.63
44.45
44.61
Table 3. V
RM
S
(funda
mental
) of output voltage (R-p
ha
se) of
ca
scade
d MLI for vari
ous valu
es of
m
a
with s
i
ne ref (By s
i
mulat
i
on)
m
a
APO
D+
CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 315
310.6
310.8
310.5
314.6
314.8
314.5
310.7
310.9
310.9
0.9 286.4
276.8
279.6
279.8
286.8
286.6
286.8
280 279.8
279.9
0.8 255.4
248.5
248.2
248.7
255.4
255.1
255.6
249 248.1
248.3
0.7 219.2
217.5
217
217.1
220
219.5
219.6
216.9
217.1
216.7
0.6 185
186.4
186.5
186.4
186
186.1
186
186.1
186.6
186.6
Table 4. %THD of output voltage (R-pha
se)
of
ca
scad
ed MLI for variou
s value
s
of m
a
with
THIPWM ref (By s
i
mulation)
m
a
APO
D+
CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 31.07
29.08
28.87
29.06
31.26
31.08
31.24
28.88
28.96
26.95
0.9 37.31
36.07
35.64
36.04
37.39
33.99
37.36
35.88
36.01
35.98
0.8 44.86
41.46
41.35
41.42
44.35
36.99
44.32
41.17
41.27
41.24
0.7 55.25
44.28
44.10
44.14
55.19
55.04
55.07
43.91
43.98
43.84
0.6 64.81
43.10
42.61
43.07
64.8
64.60
64.78
42.85
42.85
42.82
Table 5. V
RM
S
(fundam
ental
) of output voltage (R-p
ha
se) of
ca
scade
d MLI for vari
ous valu
es of
m
a
with THIPWM ref (By s
i
mulation)
m
a
APO
D+
CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 363.5
360.1
359.6
360
362.8
362.4
362.8
359.8
359.4
359.2
0.9 333
324.5
324.6
324.4
332.7
340.7
332.6
324.3
324.3
324.2
0.8 299
288.2
288.5
288.4
299
332.7
299.1
288.4
287.9
288
0.7 259.3
252.6
252.7
252.8
258.6
258.7
258.8
252.7
257.4
252.9
0.6 218.1
216.3
215.8
216.4
218.8
218.2
218.9
216.4
216
216.1
Table 6. %THD of output voltage (R-pha
se)
of
ca
scad
ed MLI for variou
s value
s
of m
a
with 60
degree ref (By simulation
)
m
a
APO
D+
CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 26.98
22.92
30
25.46
34.87
26.47
26.62
22.68
29.88
25.37
0.9 34.49
31.70
37.84
33.61
41.03
34.09
34.04
31.23
37.42
33.67
0.8 40.30
37.77
43.49
40.04
45.40
39.83
39.85
37.59
43.39
39.88
0.7 52.49
41.98
46.80
43.81
56.80
52.21
52.36
41.78
47.13
43.63
0.6 62.79
42.94
46.70
43.88
66.58
62.57
62.70
42.46
46.91
43.95
Table 7. V
RM
S
(fundam
ental
) of output voltage (R-p
ha
se) of
ca
scade
d MLI for vari
ous valu
es of
m
a
with 60 de
gree
ref (By simulation
)
m
a
APO
D+
CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 365.2
364.3
384.1
374.6
389.1
365.7
365.6
364.2
384.1
374.8
0.9 323.5
327.6
345.9
337.4
355.5
333.5
333.3
327.9
342.6
337.3
0.8 302.4
291.5
307.5
299.8
323.9
303
302.9
291.5
307.6
300
0.7 260.3
255.1
269
262.3
279.1
260.9
261.2
255.3
269.3
262.4
0.6 220.6
218.6
230.6
224.7
236.7
220.9
220.9
218.7
230.7
224.8
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TELKOM
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KA
Vol. 14, No. 2, May 2015 : 228 – 240
236
Table 8. %THD of output voltage (R-pha
se)
of
ca
scad
ed MLI for variou
s value
s
of m
a
with
stepp
ed wave ref (By sim
u
lation)
m
a
APO
D+
CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 31.92
23.86
24.35
23.98
31.56
32.05
31.65
24.49
23.96
24.10
0.9 39.60
32.95
32.77
33.12
39.91
39.84
40.04
33.36
33.01
33.18
0.8 46.99
39.02
38.83
38.90
48.15
47.95
48.03
38.83
39.29
39.18
0.7 58.07
42.02
42.30
41.57
58.73
58.73
58.28
41.20
42.36
41.92
0.6 68.80
45.95
46.04
46.49
69.26
69.18
69.62
46.83
45.71
46.26
Table 9. V
RM
S
(fundam
ental
) of output voltage (R-p
ha
se) of
ca
scade
d MLI for vari
ous valu
es of
m
a
with s
t
epped wave ref (By s
i
mulation)
m
a
APO
D+
CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 315.9
314.7
312.1
314.9
320.5
317.9
320.7
315.5
317
317.2
0.9 287
282
280.7
282.3
287.6
286.3
286
283.1
283.3
283.6
0.8 259.2
250.3
251
250.9
255.8
256.5
256.3
252.2
250.6
251.2
0.7 224.5
219.9
221.4
220.9
220
221.5
221
222.6
219.4
220.3
0.6 189.3
188.6
189.2
188.6
186.7
187.3
186.7
189.6
187.8
187.8
4. Experimental Re
sults
This sectio
n pre
s
ent
s the results of exp
e
rime
ntal wo
rk (Fig
ure
15)
carrie
d out on cho
s
en
CMLI using dSPACE DS1103
cont
roller board. The
result
s of the
experim
ental
study are
shown
in the form
of the oscillo
gram
s of P
W
M outp
u
ts
and corre
s
po
nding h
a
rm
o
n
ic spe
c
trum
of
cho
s
e
n
MLI. Experiment
s are pe
rforme
d with app
rop
r
iate m
f
(sam
e as in simul
a
tion studie
s
)
and
for different v
a
lue
s
of m
a
. The co
rre
sp
o
nding
%THD and
V
RM
S
(fundamental
)
out
put voltage
s
are
cal
c
ulate
d
(from the F
FT
spectrum
obtai
ned), ta
bulat
ed an
d a
naly
z
ed. T
he
exp
e
rime
ntal out
put
voltages a
n
d
the co
rre
sp
ondin
g
ha
rm
onic
spe
c
tra
are
sho
w
n f
o
r only o
ne
sampl
e
value
of
m
a
=0.8 of ca
scad
ed five level inverter top
o
logy.
Figure 16
-19
sho
w
the
sa
mple expe
rim
ental
output
voltages a
nd
FFT of ch
ose
n
CMLI
obtained usi
ng dSPACE/
RTI for
(AP
O
D
+
CO) hybrid P
W
M
with
sine, T
H
I, 60 degree and
stepp
ed
wav
e
refe
re
nces
respe
c
tively. After suita
b
ly
scaling down
the sim
u
lation values, in view
of laborato
r
y
con
s
traint
s,
the peak-to
-
pea
k
outp
u
t voltage obtained exp
e
ri
mentally is
40V.
Variation
s
of RMS value of
fundamental
output volt
ag
e of casca
d
e
d
MLI using triangul
ar carri
e
rs
for vario
u
s m
odulatio
n indi
ce
s an
d for d
i
fferent hybri
d
PWM
strategie
s
with
va
riou
s referen
c
e
s
are
sh
own i
n
Tabl
e 11,
13, 15
and
17 respe
c
tively. Table
10, 12, 1
4
and 1
6
sho
w
the
experim
ental
%THD for h
y
brid PWM strategie
s
. Th
e following p
a
ram
e
ter val
ues a
r
e u
s
ed
for
experim
entati
on: V
dc
=20V, R(lo
ad
)=100
Ω
, f
c
=2000
Hz a
nd f
m
=50Hz
,
m
f
=40 fo
r
bipola
r
(AP
O
D
+
CO) PWM, (APOD
+
PS)
PWM,
(APOD
+
VF) P
W
M, (CO
+
VF)
PWM,
(CO
+ PS) PWM, (PD
+
VF) PWM, (PS +
PD) P
W
M, (PS +
VF) PWM,
(APOD +
P
D
) PWM and (CO
+
PD) P
W
M
strategi
es
with triangul
ar
carri
ers and va
riou
s refe
ren
c
es.
Figure 15. Ha
rdware setu
p of three pha
se five level cascade
d invert
er
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Ne
w Bipola
r
Hybrid
Ca
rrie
r
PWM Strate
gies fo
r S
y
m
m
e
trical Multilevel
…
(C.
R
. Balam
u
rugan)
237
Figure 16. Ou
tput voltage and FFT plot o
f
ca
scade
d ML
I with (APOD+CO) PWM strategy
for R-pha
se (sine ref.)
Figure 17. Ou
tput voltage of cascad
ed M
L
I
with (APOD+CO) PWM s
t
rategy (THI ref.)
Figure 18. Ou
tput voltage and FFT plot o
f
ca
scade
d ML
I with (APOD+CO) PWM strategy
for R-pha
se (60 deg
ree
ref
.
)
Figure 19. Ou
tput voltage of cascad
ed M
L
I
with (APOD+CO) PWM s
t
rategy (s
tepped
wave ref.)
Table 10. % THD of o
u
tpu
t
voltage (R-p
hase) of ca
scaded MLI for
variou
s value
s
of m
a
with
sine ref (By experime
n
tatio
n
)
m
a
APO
D
+CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 22.93
22.41
8.77
15.03
10.20
19.92
13.46
3.636
1.739
0.7462
0.9 26.89
25.05
12.13
17.24
13.51
20.40
14.38
3.703
1.904
0.8695
0.8 34.35
33.08
21.12
18.63
15.15
20.45
18.45
6.097
3.38
4.854
0.7 35.7
36.58
22.38
20.37
18.90
22.72
18.51
6.84
4.895
5.281
0.6 36.9
38.28
26.42
22.58
23.21
25
19.06
7.425
9.523
7.936
Table 11. V
RMS
(fundam
ent
al) of output voltage (R-pha
se) of
ca
scad
ed MLI for variou
s value
s
of
m
a
with sine ref (By experimentation
)
m
a
APO
D
+CO
APO
D+P
D
APO
D+P
S
APO
D+V
F
CO+P
D
CO+P
S
CO+V
F
PD+V
F
PS+P
D
PS+V
F
1 14.9
14.5
14.2
14.5
14.7
14.7
14.9
14.6
14.3
14.2
0.9 14
13.6
13.4
13.5
14
13.8
13.9
13.5
13.3
13.4
0.8 13.1
12.3
12.3
12.4
13.2
13.2
13
12.3
12.6
12.6
0.7 11.9
11.1
11.4
11
11.9
12
11.8
11
11.5
11.5
0.6 10.9
9.98
10.3
9.98
11.1
11
10.8
10.1
10.5
10.3
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