TELKOM
NIKA Indonesia
n
Journal of
Electrical En
gineering
Vol.12, No.6, Jun
e
201
4, pp. 4485 ~ 4
4
9
0
DOI: 10.115
9
1
/telkomni
ka.
v
12i6.548
6
4485
Re
cei
v
ed
De
cem
ber 2
4
, 2013; Re
vi
sed
Febr
uary 20,
2014; Accept
ed March 5, 2
014
Realization of Direct Current System In
sulation
Monitoring Device Based on Fault Amplifying Method
Zhou Jun*, Y
a
ng Sheng
-
q
i
ang, Zhu Bo
-nan
Electrical E
ngi
neer
ing Institut
e Northe
ast Di
anli U
n
iv
ersit
y
,
Jilin, 1
320
12,
Chin
a
*Corres
p
o
ndi
n
g
author, e-ma
i
l
: jlzho
uju
n
@1
26.com
A
b
st
r
a
ct
T
h
is pa
per
has
ana
ly
z
e
d
the e
x
isting
direct c
u
rrent
(DC) sys
tem i
n
su
latio
n
mo
nitori
ng
methods.
I
n
view
of poor anti-ja
mmi
ng a
n
d
low
sensitivit
y of existing methods, a
new
insulati
on
mo
nitori
ng dev
ice
is
desi
gne
d b
a
se
d on
Fault
a
m
plifyin
g
met
hod
. Under
t
he c
o
nditi
on
of ens
u
r
ing syste
m
se
curity, the d
e
vi
ce
detection resist
ors are put into the
system
by
control switches
, data is collected by
the s
ensors and set
to
host com
put
er by CAN bus. A
t
last, the host deter
m
i
ne
s insulation conditi
on of the system
by calc
ulating
the insu
latio
n
resistanc
es. T
h
is pap
er has i
n
troduc
ed
the
ma
in test circu
i
t and pro
g
ra
m flow
chart.
It i
s
verifie
d
by
ex
peri
m
e
n
ts a
n
d
field
op
erati
o
n that th
e
de
vice w
h
ich
is
perfectly su
ita
b
le for
on
lin
e
DC
insulation monito
ring of
pow
er plants
and
transformers c
an
m
onit
o
r the ins
u
lation condition of
syste
m
accurate
ly an
d the sensitiv
ity is high.
Ke
y
w
ords
:
DC system
, ins
u
lation, resistanc
e
switching, gr
ound fault, DC
bus
Copy
right
©
2014 In
stitu
t
e o
f
Ad
van
ced
En
g
i
n
eerin
g and
Scien
ce. All
rig
h
t
s reser
ve
d
.
1. Introduc
tion
DC sy
stem
is extre
m
ely
impo
rtant
aux
iliary p
o
w
er supply
in po
we
r pl
ants
and
sub
s
tation
s, its reliability and stability directly
ha
s impact on the se
curity of the entire po
wer
system. T
he
DC
groundi
n
g
is
a comm
on malfu
n
ct
io
n. It can n
o
t
cau
s
e
se
riou
s con
s
eq
uen
ce
s
whe
n
sin
g
le
point gro
undi
ng fault witho
u
t a loop
occurs.
Ho
wever, it may cause the malfun
ction
of
prote
c
tion device and
control circuit whe
n
do
uble
point g
r
ou
nd
ing fault o
c
cu
rs
at the
sa
me
time, even ca
use
sh
ort
circuit [1-5]. The
r
efore, r
eal-ti
m
e onlin
e m
onitorin
g
is
n
e
ce
ssary fo
r
DC
system
.Wh
e
n
groun
d faul
t occurs, th
e
device
s
houl
d sent
warnin
g si
gnal
to th
e staff a
nd th
en
the fault can
be discove
r
e
d
and re
move
d.
Comm
only u
s
ed
method
s con
c
lu
de A
C
varia
b
le freque
ncy a
n
d
balan
ce
re
sistan
ce
method. AC
variable frequ
ency is to inj
e
ct
low-fre
q
u
ency AC voltage si
gnal be
tween
DC b
u
s
e
s
and g
r
ou
nd,
the grou
ndi
ng fault bra
n
ch
can
be
determi
ned a
c
cordi
ng to the AC vari
a
b
le
freque
ncy
[1
0
-
12]. Disadva
n
tage of
this approa
ch
i
s
t
hat
it
ne
ed
s signal circuit
s
and
te
st re
sul
t
s
are influe
nce
d
by the distri
buted
capa
cit
ance. The sy
stem may be
affected be
ca
use AC
sign
a
l
is
applie
d to the system. Ba
lance re
si
sta
n
ce m
e
thod
i
s
to form a b
a
lan
c
e re
si
st
ance bri
dge
with
whi
c
h the in
sulation
state can
be dete
r
mined by
con
nectin
g
a pai
r of re
si
stan
ces (th
e
same
as
each othe
r) i
n
po
sitive gro
und a
nd n
e
g
a
tive gro
und.
This
metho
d
can
only d
e
fine the in
sul
a
tion
con
d
ition of the entire sy
stem, but can not ac
curatel
y
find out the
groun
ding b
r
anch and wh
en
two g
r
oun
din
g
faults a
nd
the re
si
stan
ces
redu
ce
d with
the sam
e
value,
the method can
n
o
t
accurately send al
arm [1
3-16]. Th
e a
ppro
a
ch of this d
e
vice h
a
s n
o
impa
ct on the sy
stem
becau
se it do
es not ne
ed a
n
y signal inje
cted into t
he
system, its a
c
curacy is hi
gh
and it won’t be
affected by e
n
vironm
ent.
2.
Work Princi
ple of the
De
v
i
ce
I
n
t
he ca
se t
hat
en
suri
ng
sy
st
em
se
cu
r
i
t
y
,
suitable d
e
tection
re
sistors a
r
e
put into the
system
by controlling swi
t
ches
the function of
whi
c
h is i
n
crea
si
ng fault
signal and improving
measurement
accuracy.
The voltage
and the
le
aka
ge curre
n
t shoul
d b
e
mea
s
ured
and
insul
a
tion re
sistan
ce ca
n be
o
b
taine
d
according
to of
the circuit
theo
rem
cutting
resi
stan
ce.
Dete
ction
pri
n
cipl
e i
s
sho
w
n i
n
Fi
gure
1. In th
e
case that
gua
ra
ntee the
r
e
is no
effect
on
DC
system. Dete
ction re
sisto
r
s
a
r
e put
int
o
po
siti
ve bu
s a
nd n
egati
v
e bu
s respe
c
tively by rel
a
y
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 23
02-4
046
TELKOM
NI
KA
Vol. 12, No. 6, June 20
14: 4485 – 4
490
4486
swit
che
s
. Cu
rre
nt sen
s
o
r
s are in
stalled
in eac
h b
r
a
n
ch by which the unbal
a
n
ce
d cu
rrent
of
bran
ch
es
ca
n
be colle
cted
. Unde
r no
rm
al circ
u
m
sta
n
c
e
s
, no
sign
al output
wh
en the
swit
ch
es
are conn
ecte
d [17].
Figure 1. Prin
ciple of Detection
a)
Whe
n
S-i
s
on
, S
+ i
s
off a
nd the
resi
sto
r
s R a
r
e i
nput
ted into
neg
at
ive bu
s, the
n
the
voltage of n
e
gative bu
s to
gro
und i
s
U’
-
, the equiva
lent ci
rcuit is sho
w
n
in Fi
gure
2
(a), t
he
equatio
n is gi
ven by (1-1
).
b)
Whe
n
S + is on , S- is off
and the re
sist
ors
R are in
p
u
tted into positive bus, then the
voltage of po
sitive bu
s to grou
nd i
s
U’
+
, the equival
ent circuit i
s
sho
w
n i
n
Fig
u
re 2
(b
), the
equatio
n is g
i
ven by (1-2
).
U
(a)
Neg
a
tive bus in
put R
U
(
b
)
po
s
i
tive
bu
s
in
pu
t R
Figure 2. Equivalent Circuit
of Detection
for Bus
R
U
U
R
R
R
U
//
(1)
R
U
U
R
R
R
U
//
(
2
)
Equation (1), (2) a
r
e
synthesi
z
ed to solve R+
、
R-:
R
U
U
U
R
1
(3)
R
U
U
U
R
1
(4)
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Reali
z
ation of
Dire
ct Cu
rre
nt System
Insulation
Monit
o
ring
De
vice Based o
n
Fa
ult… (Zho
u Jun)
4487
Whe
r
e
U
U
U
is total voltage, R is detectio
n
re
si
stor.
d
R
R
R
I
U
//
(5)
Equation
(5
) is the
eq
ua
tion of in
sul
a
tion resi
sta
n
ce
for
bra
n
c
h
(the
deri
v
ation is
omitted).
∆
U i
s
voltage va
ri
ation that is e
qual to t
he
differen
c
e
of an
ode voltag
e to ground
whe
n
the dete
c
tion
resi
stan
ce
s
are p
u
t into
negative bu
s and p
o
sitive
bus
re
spe
c
ti
vely.
∆
I is
the
variation
of leakage
cu
rre
n
t that is
eq
ual to th
e
dif
f
eren
ce
of le
aka
ge
cu
rre
n
t
whe
n
dete
c
tion
resi
sto
r
s a
r
e
inputted
neg
ative bu
s
an
d po
sitive b
u
s
re
spe
c
tivel
y
. The va
riati
on i
s
a
slight
and
the influen
ce
of environm
e
n
tal factors can be ign
o
re
d. R
d
is insul
a
tion re
si
stan
ce of the bra
n
ch
and it is a
n
e
quivalent valu
e that is eq
ua
l to t
he value of positive in
sulation resi
st
ance
in parall
e
l
with neg
ative insul
a
tion re
si
stan
ce.
3.
The Ha
rd
w
a
r
e
Design o
f
DC Sy
stem Insulation M
onitoring De
v
i
ce
3.1. Structu
r
e of Sy
stem
Structu
r
e of
system a
s
sh
ow in Fi
gure
3,
the device mainly in
cl
ude
s two
parts: main
control mod
u
l
e
and sen
s
or acqui
sition
module. PC
communi
cate
s with the main control mo
dule
that inclu
d
e
s
C805
1F04
0 MCU a
n
d
pe
riphe
ral
circuit
s
、
vol
t
age dete
c
ti
on mo
dule
of
bus
、
m
e
mo
ry module
s
etc by PCI bus. The mai
n
control module tra
n
sm
its comm
and
of
detectio
n
by
CAN b
u
s.
The sen
s
o
r
s detectio
n
m
odule
colle
ct
the data of
monitor
bu
s and
bran
ch
es
of the entire DC system
in
rea
l
-time and th
e data is
sen
d
back to the
host of syste
m
by CAN bu
s. The host ju
dge
s the insulation stat
e
of bus an
d b
r
an
ch throug
h the differe
nce
betwe
en the i
n
sul
a
tion re
si
stan
ce an
d the norm
a
l.
Figure 3. Structure of Syste
m
3.2. Hard
w
a
r
e
Design
PC c
o
mmunic
a
tes
with MCU by PCI bus
.
T
he sen
s
or commu
nicates with M
CU
by CAN
bus. CA
N bu
s have the propertie
s
of strong
erro
r det
ecting a
b
ility and lon
g
com
m
unication
distan
ce (ove
r 10kV
)
. C80
51F04
0 integ
r
ates
CAN
co
ntrolle
r and a
n
external CA
N tran
sceiver is
need
ed so that the hard
w
a
r
e structu
r
e i
s
simp
le an
d p
e
rform
a
n
c
e is stable. Thu
s
,
using
C80
51F0
40 n
o
t only can complete the control of
sy
stem but also
can simplify ha
rdware de
sig
n
of the system
greatly and redu
ce
the co
st of system [18, 19].
3.2.1. Dete
cti
on Module o
f
Bus Voltag
e
Dete
ction mo
dule of b
u
s v
o
ltage tra
n
sm
its t
he colle
cted voltage
da
te whi
c
h i
s
collecte
d
by isolating a
m
plifier ci
rcui
t that consist
s
of
Linea
r O
p
tical Co
uple
r
HCNR20
0 a
nd ope
ration
al
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ISSN: 23
02-4
046
TELKOM
NI
KA
Vol. 12, No. 6, June 20
14: 4485 – 4
490
4488
amplifier L
M
3
58 to ho
st. As sh
own in F
i
gure
4,
the isolatin
g ci
rcu
i
t concl
ude
s
optical
cou
p
l
e
r,
two o
p
e
r
atio
nal a
m
plifiers and
two
resistan
ce
s.
Th
e two
op
erational
amplifie
rs u
s
e
different
power
sup
p
ly to achieve
electri
c
al i
s
ol
ation [
20]. The gain
of the isolatin
g a
m
plifiers ca
n
be
regul
ated by cha
ngin
g
R2
6 and R2
4 according to
th
e cha
r
a
c
teri
st
ics of HCNR200.Capa
cita
nce
C18 i
s
used to eliminat oscillation.
R26
= R24 = 300k in this design.
Figure 4. Det
e
ction
Circuit of Voltage Bus
3.2.2. S
w
i
t
c
h
ing Resis
t
an
ce Circui
t
This mo
dule
puts suitable
curre
n
t-limitin
g re
si
sta
n
ces (1k, 2
k
, 4k,
8k, 16
k, 32k,
64k a
nd
128
k can b
e
sele
cted
) into
circuit by the
relay
swit
ch
es. Th
e rang
e of the
resi
stance i
s
1~2
5
5
K
and any valu
e can be cho
s
en in this ra
nge. No
rmall
y
, the smaller the testing resi
stan
ce is, the
greate
r
the le
aka
ge
current
is an
d the hi
gher th
e
dete
c
tion
sen
s
itivity is. It may cause protecti
on
misop
e
r
a
t
i
on
if
t
e
st
ing re
si
st
an
ce is t
o
o
small,
so t
h
e sy
st
em p
u
t
s
all re
si
st
or
s
int
o
sy
st
em
in
initial state a
nd ch
ang
es t
he cu
rr
ent-li
m
iting re
sista
n
ce by
cont
rolling relay switch
es
s1
~s8 to
sho
r
t
-
cir
c
uit
c
u
rr
ent
-limit
in
g
resi
st
an
ce
s in t
u
rn
acco
rd
ing to the curre
nt value in the circuit so
that the cu
rre
n
t value ca
n
be re
gul
ate
d
. Accu
ra
cy re
quire
ment i
s
thus m
e
t. Mea
n
whil
e, isolati
on
amplifier
circuit that is the
same
as the
one of
bu
s voltage dete
c
ti
on is
con
n
e
c
ted to the out
put
end of cu
rren
t-limiting re
si
stan
ce so tha
t
the in
terfere
n
ce
sign
al that cau
s
ed by
comm
on gro
und
in an
alog
ci
rcuit a
n
d
oth
e
r
rea
s
o
n
s
can b
e
e
limin
ated. Th
e p
r
incipl
e di
agram of
switch
ing
resi
stan
ce i
s
sho
w
n in Fig
u
re 5. When
the sw
it
che
s
are off S = 0
and on S =
1, the value o
f
swit
chin
g re
si
stor
R is give
n by:
1
1
2
2
3
3
44
5
5
6
6
77
8
8
R
S
R
SR
S
R
SR
S
R
S
R
SR
S
R
Figure 5. The
Principl
e Dia
g
ram of Te
sti
ng Re
si
stan
ce
3.2.3. Senso
r
Acquisition
Circuit
The
device m
onitors
all b
r
a
n
ch
es by
cu
rrent
sen
s
o
r
s i
n
real-tim
e. T
he
colle
cted
date i
s
delivere
d
to C80
51F0
40
by the amplifying circui
t that is stru
ct
ured by ope
rational amplif
ier
LF347 a
nd voltage co
mp
arato
r
LM31
1
DR an
d then
C8051
F04
0
sent the date
to the host by
CAN bu
s. As sho
w
in Fig
u
re 6, LF3
4
7
is the
co
re compon
ent of amplifying ci
rcuit. Sine wa
ve
can
be
ch
an
ged into
squ
a
re
wave
wit
h
the
sam
e
freque
ncy by
u
s
ing
LM3
1
1
D
R a
s
the
an
a
l
og
and digital
circuit interfa
c
e.
8
4
7
5
6
2
U
31B
L
M
358
D
3
00k
R2
6
1K
R3
2
0.
01u
F
C1
8
2K
R3
0
+1
2
V
C
C
8
4
7
5
6
2
U3
2
B
L
M
35
8D
3
00K
R2
4
AI
N1
2
00K
R2
2
2
00K
R3
6
M
UXI
AN+
M
UXI
AN-
VGND
4
3
5
6
2
1
U2
9
HC
NR
2
0
0
100
R3
3
+
1
2
VDC
-
1
2
VDC
-
12V
+1
2
V
1K
R1
2K
R2
4K
R3
8K
R4
16K
R5
32K
R6
64K
R7
128
K
R8
S1
S2
S3
S4
S5
S6
S7
S8
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Reali
z
ation of
Dire
ct Cu
rre
nt System
Insulation
Monit
o
ring
De
vice Based o
n
Fa
ult… (Zho
u Jun)
4489
Figure 6. Signal Amplifying Circuit
4. Soft
w
a
re
De
sign
The
softwa
r
e
of the
syst
em is
mixed
pro
g
ra
mmin
g
of a
s
semb
ly langua
ge
and
C
langu
age
pro
g
rammi
ng
ba
sed
on
ha
rd
ware
req
u
ire
m
ent [21,
22
]. The d
e
vice
sta
r
ts
pro
g
ram
self-che
cking
whe
n
it begi
ns to
run
by che
c
king
ea
ch interfa
c
e a
nd ci
rcuit to e
n
su
re the
no
rmal
operation of the device. Th
e sam
e
testin
g re
sista
n
ce is input into p
o
sitive and
n
egative bu
s a
fter
monitori
ng ho
st has
sen
d
testing
comm
and
s by CA
N bus re
gula
r
ly. The insulati
on re
sista
n
ce
s of
bus
and b
r
a
n
ch
es
can
b
e
cal
c
ulate
d
after mea
s
u
r
i
ng voltage a
nd lea
k
ag
e current twi
c
e
and
then it can b
e
obtained th
at whethe
r there is
a g
r
ou
nding fault a
nd whi
c
h bra
n
ch ha
s o
c
cu
rre
d
fault. The fault one will ap
p
ear fault flag.
The sy
st
em'
s
monitorin
g
in
terface
ca
n show the
histo
r
y
curve
of e
a
ch
bra
n
ch eve
n
if the
system
is
well
insula
ted. The
staff
ca
n al
so
see
the in
sul
a
tion
resi
stan
ce val
ue of each branch [23]. The flow ch
art o
f
main prog
ra
m is sh
own in
Figure 7.
Figure 7. Flow Ch
art of Main Prog
ram
5. Conclu
sion
The pa
pe
r ha
s intro
d
u
c
ed
a ne
w insulati
on monito
ring
device u
s
e
d
in DC syste
m
based
on fault
ampli
f
ying metho
d
after tra
d
ition
a
l in
sulatio
n
t
e
sting
meth
o
d
s
are a
nalyzed. Th
e d
e
vice
+
12V
-
12V
LI
N
1
+
L
I
N
1
-
+
12V
3V
HT
I
M
E
1
10K
R1
2
5K
R1
9
5K
R1
8
20K
R8
10K
R2
2
1K
R1
4
D9
D1
1
0.
1uF
C2
1
0.
1uF
C2
5
10K
R6
0.
1uF
C1
9
W1
2nf
C-
2
1
3
BA
L
/
S
T
B
6
BA
L
5
V-
4
2
7
V+
8
U9
-
1
L
M
311D
R
-
12V
0.
1uF
C2
3
1K
R9
5
6
7
2
4
11
U8
B
L
F
347M
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 23
02-4
046
TELKOM
NI
KA
Vol. 12, No. 6, June 20
14: 4485 – 4
490
4490
that ha
s
coo
perate
d
m
a
in
co
ntrol
mod
u
le
with
s
e
ns
o
r
ac
q
u
i
s
i
tion
mo
du
le
c
a
n
mo
n
i
tor
the
insul
a
tion
co
ndition
of b
u
s
a
n
d
bran
ch
es i
n
real
-tim
e. A
seri
es o
f
test exp
e
ri
ments have
been
con
d
u
c
ted in
laborato
r
y in the initial stage in or
der
to verify the
accura
cy of the device. T
he
experim
ents
simulate
d the
con
d
ition of
bran
ch. T
he
device
ha
s th
e pro
p
e
r
ties
of high p
r
e
c
ision
and
high
inte
rfere
n
ce. Th
e
device
can
d
i
stingui
sh
the
fault b
r
an
ch
and it
s fault
d
egre
e
co
rre
ct
ly
in the
ca
se t
hat insulation
re
sista
n
ce i
s
le
ss than
1
00 k
Ω
. Th
e i
n
sul
a
tion m
o
nitoring
sch
e
me
introdu
ce
d in
this p
ape
r h
a
s
b
een
in
stall
ed in
a
numb
e
r of
substati
ons an
d it
ca
n op
erate
safely
and
reliably. I
t
has p
r
ovid
e
d
relia
ble b
a
sis for
gro
undi
ng fault dete
c
ting in
DC system, save
d
a
lot of time and improve
d
the se
curity of power sy
ste
m
.
Referen
ces
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an, Ji
an
g Jiuc
hu
n, Z
h
a
ng W
e
i
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Nov
e
l on-line
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u
lation s
u
pe
rvising m
e
thod
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.
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e E
ngi
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hao Bin
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