TELKOM
NIKA Indonesia
n
Journal of
Electrical En
gineering
Vol. 15, No. 2, August 201
5, pp. 229 ~
236
DOI: 10.115
9
1
/telkomni
ka.
v
15i2.808
4
229
Re
cei
v
ed Ma
y 14, 201
5; Revi
sed
Jun
e
26, 2015; Accepted July 1
2
,
2015
Assessment of Equal and Unequal Amplitude Carriers
for a 1
Φ
Five Level Flying Capacitor Multilevel Inverter
P.Sureshpan
d
iarajan, S.P.Nata
rajan*,
C.R.Balamur
ugan, K.Ramasamy
P.S.R Rengas
am
y
C
o
ll
eg
e of Engin
eer
i
ng fo
r W
o
men, Siva
kasi, India
*Corres
p
o
ndi
n
g
author, e-ma
i
l
: spn_a
nn
amal
ai@re
d
iffmail.c
o
m
A
b
st
r
a
ct
T
h
is w
o
rk pres
ents the c
o
mp
ariso
n
of var
i
o
u
s Pu
l
s
e
Wi
d
t
h Mo
d
u
l
a
ti
on
(PWM) te
ch
n
i
qu
es fo
r the
chose
n
si
ngl
e
phas
e h
a
lf br
i
dge F
C
M
L
I (F
lying
Ca
pacitor
Multi L
e
ve
l In
verter). In this
pap
er, a s
i
ng
l
e
phas
e h
a
lf br
i
dge
flyin
g
ca
p
a
citor
mu
ltilev
e
l i
n
verter
is c
ontrol
l
ed
w
i
th
sinus
oid
a
l, T
H
I
(T
hird
Har
m
o
n
ic
Injectio
n), T
r
ape
z
o
i
d
a
l
a
nd
T
A
R (T
rape
z
o
i
dal A
m
alg
a
m
a
t
ed Refer
enc
e)
referenc
e w
i
th Equ
a
l A
m
plit
ud
e
Carriers
(EAC)
an
d UEA
C
(U
n Eq
ual
A
m
pl
itude
Carr
iers).
T
he pr
opos
ed
EAC a
nd
UEA
C
is
ap
pli
ed fo
r
vario
u
s PW
M strategies. T
h
e
PW
M meth
ods
used
for
the
a
nalysis
are
PD
(Phase
Disp
o
si
tion) PW
M, POD
(Phase Op
pos
i
t
ion a
nd D
i
sp
o
s
ition) PW
M, APOD (Alt
erna
tive Phas
e Op
positi
on a
nd
D
i
spositi
on) PW
M
and
CO (C
arri
er Overl
app
in
g
)
PW
M w
i
th EAC a
nd
UEAC
. F
o
r all
the
P
W
M meth
ods
and
refere
nces
the
UEAC pr
od
uce
s
less T
H
D
a
n
d
hi
gh
er fun
d
a
m
e
n
tal
RMS (
R
oot Me
an
Sq
uare) v
a
l
ues
e
xcept for
m
a
=1. Fo
r
m
a
=
1
th
e EA
C prov
id
es l
e
s
s
T
HD (T
otal
Har
m
on
ic
D
i
stortion)
an
d
hig
her fu
nda
ment
al RMS
(Ro
o
t
Mea
n
Squar
e) v
a
lu
es
for a
l
l
the
PW
M metho
d
s
an
d refer
enc
es. T
o
va
lid
ate th
e
d
e
vel
ope
d tec
h
n
i
qu
e, si
mu
lati
o
n
s
are carri
ed out
throug
h Pow
e
r System Bl
ock Set.
Ke
y
w
ords
: VAPWM, 60 degr
ee PWM, TAR, THD, FCMLI.
Copy
right
©
2015 In
stitu
t
e o
f
Ad
van
ced
En
g
i
n
eerin
g and
Scien
ce. All
rig
h
t
s reser
ve
d
.
1. Introduc
tion
FCMLI i
s
a
multiple volta
ge level i
n
verter
topol
ogy whi
c
h uses
capa
citors (cal
led
flying
cap
a
cito
rs) fo
r cl
ampin
g
th
e voltage a
c
ross the p
o
we
r semicond
uctor devi
c
es.
DCMLI h
a
s m
u
ch
difficulty beyond four lev
e
ls in output
voltage
in controlling o
r
balanci
ng voltage of ea
ch
cap
a
cito
r co
n
s
tituting DC-li
n
k. DCMLI is hard to be e
x
pande
d to high level syst
ems st
ru
ctura
lly
due to l
a
rge
numb
e
r
of
clampi
ng
dio
des. F
C
M
L
I doe
s
not re
q
u
ire
i
s
ol
ated DC
source
s and
addition
al cla
m
ping di
ode
s. FCM
L
I top
o
logy c
an be
easily expa
nded to hi
gh
level syste
m
s.
FCMLI offe
rs
also
a great a
d
vantage
wit
h
re
spe
c
t to t
he availa
bility of voltage re
dund
an
cies.
On
the othe
r ha
n
d
FCM
L
I ha
s
a drawba
ck
d
ue to the
nee
d for p
r
ovidin
g additio
nal fl
ying ca
pa
cito
rs
and
bala
n
cin
g
control of
flying ca
pa
citor voltag
es.
Variou
s m
u
lti-ca
rri
er PWM
strategie
s
a
r
e
develop
ed an
d simul
a
ted u
s
ing MAT
L
AB-SIMULI
NK
for ch
osen th
ree p
h
a
s
e F
C
MLI. Chi
a
sson
[1]
propo
sed
the method t
o
eliminate h
a
rmo
n
ics in a
switching
co
nverter i
s
co
n
s
ide
r
ed. Th
at is,
given a
de
si
red fun
dame
n
t
al output volt
age, the
p
r
ob
lem i
s
to fin
d
the
switchin
g time
s
(angl
es)
that produ
ce
the fundame
n
tal while not
generating s
pecifi
c
ally ch
ose
n
harm
oni
cs. In cont
ra
st to
the well
kno
w
n work of P
a
tel an
d
Hoft a
nd oth
e
rs, he
re all
po
ssibl
e
solution
s to
the p
r
obl
em
are
found. Thi
s
i
s
do
ne
by first convertin
g
the tran
scen
dental e
quati
ons th
at spe
c
ify the ha
rm
onic
elimination p
r
oble
m
into an equival
e
n
t
set of polynomial equ
ations.
Juan
and Mo
ran
[2]
focu
ssed on minimizi
ng
th
e
num
ber
of power su
ppli
e
s
and
se
micondu
ctors fo
r a given
num
ber
of levels. M
u
ltilevel inverte
r
s
with
a la
rg
e num
ber of
step
s (more t
han 5
0
level
s
) can
gene
rat
e
high quality voltage wave
forms, goo
d enou
gh
to
b
e
con
s
ide
r
ed
as
suitable
voltage
templ
a
te
gene
rato
rs. Many
level
s
or step
s can
follow a
voltage referen
c
e
with accu
racy,
and
wit
h
the
advantag
e th
at the g
ene
rated voltag
e
can
be
mo
du
lated in
am
plitude in
stea
d
of pul
se
-wid
th
modulatio
n. The main di
sadva
n
tage
of this ty
pe of topology is the larg
e numbe
r of p
o
we
r
sup
p
lie
s and
semi
con
d
u
c
tors
req
u
ired to obtain the
s
e multistep v
o
ltage waveform
s.
Well
s et
al
[3] sugge
sted
calculating
e
a
sily and
qui
ckly the d
e
si
red wavefo
rm
without solut
i
on of co
uple
d
transce
nde
ntal equation
s
.
A modulation-ba
se
d met
hod for ge
ne
rating pul
se
waveforms
with
sele
ctive harmonic
elimin
ation is p
r
op
ose
d
. Ha
rmo
n
ic elimin
atio
n, traditionall
y
digital, is shown
to be achiev
able by com
pari
s
on of a
sine wave
with modified
triangle carrier.
Urmil
a
a
nd
Subba
rayud
u
[4] presents
a compa
r
ativ
e stu
d
y of
ni
n
e
level
diod
e
clamp
ed i
n
ve
rter fo
r
co
nst
a
n
t
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 23
02-4
046
TELKOM
NI
KA
Vol. 15, No. 2, August 2015 : 229 –
236
230
Switchin
g fre
quen
cy of
si
nusoidal P
u
lse widt
h
Mo
d
u
lation a
nd
sinusoidal
Nat
u
ral P
u
lse
wi
dth
Modulatio
n
with
swit
chin
g fre
quen
cy
Optimal
Mo
dulation. Kh
oucha
et al
[5]
present
s the
comp
ari
s
o
n
study for a ca
scad
ed H-b
r
id
ge multileve
l
dire
ct torqu
e
control (DT
C
) inductio
n
mo
tor
drive. Earlie
r studie
s
h
a
ve pointe
d
ou
t the limitat
ions of
conve
n
t
ional inverte
r
s, e
s
pe
cially
in
high-volta
ge
and
high
-po
w
er ap
plications. In
re
ce
nt years, mul
t
ilevel inverte
r
s
are b
e
co
ming
increa
singly
popul
ar fo
r
h
i
gh-p
o
wer ap
plicatio
ns du
e to th
eir i
m
proved
ha
rm
onic p
r
ofile
a
nd
increa
sed
po
wer rating
s.
Several
studi
es
have
bee
n re
po
rted in
the literature on
multilev
e
l
inverters top
o
logie
s
, co
ntrol techni
que
s, and appli
c
a
t
ions. Ho
wev
e
r, there
are
few studi
es t
hat
actually
di
scu
ss or evaluat
e
t
he pe
rformance of ind
u
ction m
o
to
r drives asso
ci
ated
with
th
ree-
phase m
u
ltilevel inverter.
Nami
et al [6]
pro
p
o
s
ed
a
comp
arative
study h
a
s be
en
carrie
d ou
t to
pre
s
ent hi
gh
perfo
rman
ce
of the prop
osed co
nfig
u
r
ati
on to app
roa
c
h a ve
ry low total harmo
n
i
c
distortio
n
of voltage and
curre
n
t, which leads to
th
e possible eli
m
ination
of the output filter.
A
novel
H-b
r
id
ge multilevel
pul
se
width
modul
at
ion
co
nverte
r t
opolo
g
y ba
sed o
n
a
se
ries
con
n
e
c
tion
of a hi
gh-volta
ge di
ode
-cl
a
mped i
n
verte
r
a
nd
a lo
w-v
o
ltage
co
nve
n
tional i
n
vert
er i
s
prop
osed in
this pap
er. A dc link voltage arra
n
g
e
m
ent for the
new hybri
d
and a
s
ymme
tric
solutio
n
is prese
n
ted to
h
a
ve a m
a
ximum num
be
r
of output volt
age level
s
b
y
pre
s
ervin
g
the
adja
c
ent
switchin
g ve
ctors between
voltage l
e
vels
.
Hence, a
15-l
e
vel hybrid
co
nverter can
b
e
attained
with
a minimu
m n
u
mbe
r
of p
o
w
er compo
n
e
n
ts.
Kang
arlu
et al [7, 8]
p
r
opo
se
s
a ne
w
topology b
a
sed o
n
the
n
on-in
sul
a
ted
dc volta
ge
source
s fo
r m
u
ltilevel inverter with
re
du
ced
numbe
r of
switching
device
s
. Multilevel i
n
verter
s h
a
ve
an impo
rtant
portion i
n
po
wer
processi
ng
in power
syst
ems.
Baba
ei
et al [9, 10] develop
ed
a
new g
ene
ral
ca
scade
d mu
ltilevel inverter
usin
g H-b
r
idg
e
s i
s
propo
sed. The
pro
p
o
se
d topol
og
y requi
re
s a
lesser
num
b
e
r of d
c
volt
age
sou
r
ces a
nd
power switch
es an
d con
s
i
s
ts of lowe
r bl
ocking voltag
e on switche
s
, which results in
decrea
s
e
d
co
mplexity and
total co
st of t
he inve
rter. T
hese
a
b
ilities
obtain
ed wit
h
in comp
ari
n
g
the prop
osed
topology with the conven
tional t
opolog
ies from afo
r
emention
ed
points of view.
More
over, a new al
gorith
m
to determin
e
the m
agnitu
de of dc volta
ge so
urce
s is propo
se
d.
2. Fl
y
i
ng Capacitor Mul
t
ile
v
e
l In
v
e
rte
r
Figure 1
sh
o
w
s the g
ene
ral structu
r
e
of half b
r
i
dge five level flying c
a
pac
i
tor inv
e
rter for
R-p
h
a
s
e. FCMLI requi
re
s 8 semi
con
d
u
c
tor switche
s
(S1-S4, S1’-S4’) 3 flying
cap
a
cito
rs (C3’,
C4’,
C5’) and 2
DC link capacitors
(C
1
’
, C
2
’)
. T
h
is
FC
M
L
I
c
o
ns
is
ts
o
f
fo
ur switch pairs (S1, S1’),
(S2,S2’), (S3
,
S3’) and (S
4,S4’). The
swit
che
s
a
r
e
clamp
ed by
DC-lin
k tog
e
ther
with flying
cap
a
cito
rs.
T
he fou
r
switches (S1
-
S4)
must
be
co
nn
ected
in
se
rie
s
b
e
twe
en
DC in
put a
nd l
oad
and li
kewi
se f
o
r switche
s
(S4’-S1’). Th
e
three flying
capa
citors C3’
,
C4’ an
d C5’
are
cha
r
g
ed
to
different volta
ge levels. By chan
ging th
e tran
si
sto
r
switchi
ng state
s
, the ca
pa
citors
and the
DC
sou
r
ce a
r
e
conne
cted
in
d
i
fferent
ways
to produ
ce
di
fferent lo
ad v
o
ltage l
e
vels.
A typical
swi
t
ch
combi
nation
use
d
to synth
e
si
ze the vari
ous lo
ad voltage
s are
sho
w
n in Tabl
e 1
.
Table 1 al
so
indicate
s th
e state of the fl
ying capa
citor
corre
s
p
ondin
g
to the swit
ch
combi
nation
cho
s
e
n
. Ch
arging of
a
ca
pacito
r
i
s
in
d
i
cated
by ‘+’,
discha
rgi
ng
by ‘-’ while
NC
indicates n
e
ither cha
r
gin
g
nor di
scha
rgi
ng. By pr
ope
r sele
ction of
capa
citor
co
mbination
s
, it is
possibl
e to balance the
capacito
r charge.
The capacitor states
(+ and -)
will reverse for the
negative
cu
rrent. The
flying capa
citor fi
ve level inve
rter i
s
mo
dele
d
in SIM
U
LI
NK u
s
ing
po
wer
system
block set. Switching si
gnal
s fo
r ch
os
en
F
C
MLI
are deve
l
oped usin
g PWM
techniq
ues
discu
s
sed
previously. Sim
u
lation
s a
r
e
p
e
rform
e
d
with
differe
nt valu
es
of m
a
ran
g
i
ng from 0.6
t
o
1 an
d resi
stive loa
d
of
100
Ω
. Simulated
output volta
ges of
cho
s
e
n
MLI
with v
a
riou
s
strate
gies
are di
splaye
d
only for a sample value of m
a
=
0
.8. In th
is
c
h
apter m
f
is cho
s
en a
s
20 as a trad
e
off in view of
the followi
ng
rea
s
on
s: (i
) t
o
red
u
ce swit
chin
g lo
sses
(whi
ch
may b
e
high
at larg
e
m
f
) (ii
)
to red
u
ce th
e
size
of the filter n
eede
d fo
r th
e clo
s
e
d
loo
p
co
ntrol, the
filter si
ze
be
ing
mode
rate at mode
rate fre
quen
cie
s
(iii) to e
ffectively utilize the available dS
PACE syste
m
for
hard
w
a
r
e
im
plementatio
n. FCM
L
Is
are
espe
cia
lly well de
signe
d
for
ap
plica
t
ions wh
ere
the
numbe
r of o
u
tput voltage
levels i
s
hi
gh. The a
ppl
ication
s
of F
C
MLI a
r
e fa
ns a
nd p
u
m
p
s,
comp
re
ssors,
conveyors,
mills,
mine wi
nding ma
chi
n
es, propul
sio
n
drives in m
a
rine a
ppli
c
at
ions
and metal i
ndu
strie
s
. Appro
p
ri
ate PWM
strategi
es may b
e
employed
de
pendi
ng on
the
perfo
rman
ce
measure req
u
ired in a p
a
rt
icula
r
appli
c
at
ion.
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Asse
ssm
ent of Equal and
Une
qual Am
plitude Ca
rri
ers for a 1
Φ
Fi
ve… (P.Sure
s
hpan
diarajan
)
231
Figure 1. Half
bridge five le
vel flying cap
a
citor inve
rter
Table 1. Swit
ch state
s
an
d
output voltage levels
for o
ne pha
se of flying cap
a
cito
r inverter
S1
S2 S3 S4
C3’
C4’
C5’
V
an
1 1
1
1
NC
NC
NC
+V
dc
/2
1 1
1
0
NC
NC
+
+V
dc
/4
1 1
0
1
NC
+
-
1 0
1
1
+
-
NC
0 1
1
1
-
NC
NC
0 0
1
1
NC
-
NC
0
0 1
0
1
-
+
-
0 1
1
0
-
NC
+
1 0
0
1
+
NC
-
1 0
1
0
+
-
+
1 1
0
0
NC
+
NC
1 0
0
0
+
NC
NC
-V
dc
/4
0 1
0
0
-
+
NC
0 0
1
0
NC
-
+
0 0
0
1
NC
NC
-
0 0
0
0
NC
NC
NC
-V
dc
/2
3. Modulatio
n Strategies
Several
CF
Ds exi
s
t in m
u
lti-ca
rrie
r
P
W
M strategie
s
for MLI
s
. Th
ese
strategie
s
h
a
ve
more
than
on
e carrier opti
on that
can
b
e
trian
gula
r
, saw to
oth, a n
e
w fu
nctio
n
e
t
c. As fa
r a
s
the
particula
r carrier
sig
nal
s a
r
e
con
c
e
r
ne
d
,
there a
r
e
m
u
ltiple CFDs i
n
clu
d
ing fu
nction, frequ
en
cy,
amplitude, p
h
a
se
of each carri
er a
nd off
s
et bet
we
e
n
carrie
rs. Alth
ough m
u
ltilevel inverter
offers
several a
d
va
ntage
s, the
control
strategi
es
of MLI
are
quite
ch
allen
g
ing
due
to t
he
com
p
lexity to
cater the tran
sition
s bet
we
en the voltag
e levels
(o
r steps).
A num
ber of
mod
u
lation
st
rategi
es
are u
s
e
d
in m
u
ltilevel powe
r
co
nversio
n
appli
c
at
ion
s
. In this p
r
op
osed topol
ogy two meth
od
s
are
use
d
.
1. Equal Amplitude Ca
rri
ers
2. Un Equal
Amplitude Ca
rrie
r
s
(or) Variable Amplitu
de Ca
rri
ers (VAC)
3.1. Equal Amplitude Carriers
In this m
e
tho
d
, all the tri
a
ngula
r
carrie
rs
u
s
ed
will
h
a
ve the
same
amplitud
e. T
he PWM
method
s u
s
e
d
are P
D
PWM, PODPWM
, APODPWM
and COPWM with sin
e
, THI, trape
zoi
dal,
TAR a
nd
ste
pped
wave re
feren
c
e
s
. Fig
u
re
2 to
4
sh
ows the
sam
p
le
carrie
r a
r
rangem
ent, ou
tput
voltage an
d
FFT plot fo
r
PDPWM
strategy with
sin
e
refe
ren
c
e
(m
a
= 0.8
and
m
f
=20
)
. Where
m
a
and m
f
are the amplitude a
nd frequ
en
cy modulatio
n in
dex.
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02-4
046
TELKOM
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KA
Vol. 15, No. 2, August 2015 : 229 –
236
232
Figure 2. Sample ca
rri
er a
rra
ngem
ent for
equal am
plitu
de ca
rri
ers wi
th PDPWM st
rategy
(sin
e refe
ren
c
e for m
a
= 0.8
and m
f
= 20
)
Figure 3. Sample Output
voltage of five level
inverter b
a
se
d on equ
al a
m
plitude carri
e
rs
with PDPWM s
t
rategy (s
ine referenc
e for m
a
=
0.8 and m
f
=20)
Figure 4. Sample THD plo
t
for five level output
voltage based on e
qual amplitu
d
e
carrie
rs
with
PDPWM
strat
egy
(sin
e refe
ren
c
e for m
a
= 0.8 and m
f
=20
)
3.2. Un Equal Amplitude Carriers (or)
Variable Am
plitude Carriers (VAC)
In this metho
d
, all the triangula
r
ca
rri
ers
used will n
o
t have the same amplitu
d
e. The
PWM methods
us
ed
are
UEAPD (Un Equal
Amplitude Phas
e
Dis
p
os
ition) PWM,
UEAPODP
WM, UEAAPODPWM and UEACOPWM wi
th s
i
ne,
THI, trapezoidal
and TAR
referen
c
e
s
. Figure
5 to 7
sh
ows the
sam
p
le ca
rrier
arrangem
ent, ou
tput voltage a
nd FFT
plot for
PDPWM
stra
tegy
with si
n
e
refe
ren
c
e
(
m
a
= 0.8 a
n
d
m
f
=20
)
. Fig
u
r
e 8 to
10
sh
ow the
sa
mp
le
referenc
e waveforms
.
m
a
is va
ried
from
1 to
0.6
for
equal
amplitu
de
ca
rrie
r
m
e
thod
s. In E
A
C
method if m
a
i
s
vari
ed from
1 to 0.5
1
the
n
the inve
rter
will
wo
rk
as
a five level in
verter
and if t
he
m
a
is varie
d
from 0.5 to
ze
ro then th
e in
verter
will
wo
rk a
s
a th
ree
level inverter.
But in case
of
UEAC method if m
a
is vari
ed from
1 to
0.26 then th
e
inverter
will
work a
s
a five l
e
vel inverte
r
and
if the m
a
is varied from 0.25 to zero then the inve
rter
will work as a
three level inverter.
Whe
r
e,
m
a
c
A
m=
A
(
1
)
c
f
m
f
m=
f
(
2
)
m
f1
- Frequ
en
cy modulatio
n index for up
per an
d lower carriers.
m
f2
- Frequ
en
cy modulatio
n index for interme
d
iate carriers.
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Asse
ssm
ent of Equal and
Une
qual Am
plitude Ca
rri
ers for a 1
Φ
Fi
ve… (P.Sure
s
hpan
diarajan
)
233
Figure 5. Sample ca
rri
er a
rra
ngem
ent for
uneq
ual ampl
itude ca
rri
ers with PDPWM
strategy (sin
e
refere
nce for m
a
= 0.8 and
m
f
=20
)
Figure 6. Sample output voltage of five level
inverter b
a
se
d on une
qual
amplitude
ca
rriers
with PDPWM s
t
rategy (s
ine referenc
e for m
a
=
0.8 and m
f
=20)
Figure 7. Sample THD plo
t
for five level output
voltage based on u
nequ
al amplit
ude carriers
with
PDPWM
strat
egy
(sin
e refe
ren
c
e for m
a
= 0.8 and m
f
=20
)
Figure 8. Sample ca
rri
er a
rra
ngem
ent for
uneq
ual ampl
itude ca
rri
ers with PDPWM
s
t
rategy (THI
referenc
e for
m
a
= 0.8 and
m
f
=20
)
Figure 9. Sample ca
rri
er a
rra
ngem
ent for
uneq
ual ampl
itude ca
rri
ers with PDPWM
strategy
(t
rap
e
zoi
dal refe
re
nce for m
a
=
0.8
and m
f
=20)
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 23
02-4
046
TELKOM
NI
KA
Vol. 15, No. 2, August 2015 : 229 –
236
234
Figure 10. Sample ca
rri
er a
rra
ngem
ent for une
qual
a
m
plitude carri
e
rs
with PDP
W
M strategy
(TAR referenc
e for m
a
= 0.
8 and m
f
=20)
4. Simulation Resul
t
s
The follo
wing
para
m
eters
are u
s
e
d
for t
he sim
u
lation
V
dc
= 200V,
R (Re
s
ista
nce) =
100
ohms,
C1’
=
C2’= 47
00µF,
C3’
=
10
00µF,
C4’=150
0µF
,
C5’=3
000µ
F, A
c
(Amplitude of the ca
rrie
r
sign
al)
=
0.5, 1 an
d 1.5, A
m
(Amplitude
of the mo
dul
ating
signal
= 2, f
c
(fre
que
ncy of the
ca
rrie
r
sign
al) = 10
0
0
Hz an
d 200
0Hz and f
m
(freque
ncy of the modulatin
g sign
al) = 50
Hz. Tabl
e 1 and
2 sh
ows the
THD
and V
RM
S
values for t
he propo
se
d
five level inverter. In table
s
it is rep
r
e
s
en
ted
as 3-l
e
vel for
m
a
= 0.5 to 0.3. The equal
amplitude
ca
rrier meth
od
s will give five levels only up
to
m
a
= 0.59
bu
t the UEAC
method
will g
i
ve five levels up to m
a
=
0
.
26. The tabl
es
comp
are the
total harmo
ni
c disto
r
tion a
nd voltage in
terms of RMS for variou
s re
feren
c
e
s
and
carrie
rs.
Table 2. %THD for five level output voltage ba
sed o
n
equal am
plitu
de and u
neq
u
a
l amplitude
carrie
rs
with variou
s mod
u
lation indi
ces
Ref.
m
a
%
TH
D
for 5-le
v
e
l
in
v
e
rter
PDPWM PO
DPWM
A
P
O
DPWM
COPWM
PD
UE
A
P
D
POD
UE
A
P
OD
A
P
OD
UE
A
A
P
O
D
CO UE
A
C
O
Sine reference
1 26.85
27.55
26.57
27.35
26.85
27.21
26.85
30.22
0.9 33.11
31.52
32.66
31.74
33.11
31.81
33.11
34.43
0.8 38.47
35.10
37.66
35.38
38.47
35.36
38.47
37.90
0.7 42.02
38.21
41.85
38.19
42.02
38.25
42.02
40.68
0.6 44.51
39.61
43.45
39.70
44.51
39.60
44.51
43.58
0.5
3-
leve
l
40.62
3-
leve
l
40.51
3-
leve
l
40.59
3-
leve
l
46.2
0.4 40.53
42.70
40.38
49.31
0.3 42.57
43.52
41.5
60.03
THI ref
e
renc
e
1 27.58
32.18
28
32.30
28.09
32.49
33.28
33.55
0.9 35.53
35.72
35.80
35.62
35.8
35.82
37.94
37.64
0.8 41.34
39.84
41.40
39.99
41.43
39.91
41.52
41.49
0.7 43.92
43.26
43.77
43.27
43.92
43.18
45.87
44.73
0.6 43.08
45.41
42.92
45.56
43.05
45.54
52.52
47.46
0.5
3-
leve
l
45.54
3-
leve
l
46.06
3-
leve
l
45.84
3-
leve
l
48.80
0.4 44.80
44.87
44.89
48.61
0.3 39.20
39.2
39.27
51.38
Trapezoidal
referenc
e
1 22.36
26.48
22.40
26.49
22.45
26.58
29.41
29.25
0.9 31.50
32.08
31.42
32.25
31.67
32.13
34.33
34.02
0.8 37.50
36.68
37.62
36.84
37.37
36.80
39.58
38.49
0.7 41.85
40.22
41.77
40.28
41.96
40.39
44.12
42.04
0.6 42.18
42.52
42.37
42.68
42.28
42.71
48.75
45.11
0.5
3-
leve
l
44.13
3-
leve
l
44.14
3-
leve
l
44.24
3-
leve
l
46.78
0.4 43.23
43.04
43.10
48.07
0.3 39.12
39.22
39.17
48.71
TAR refe
renc
e
1 34.76
37.50
34.67
37.70
34.67
36.29
42.29
38.98
0.9 42.96
42.62
42.35
42.78
42.53
39.42
47.09
43.34
0.8 49.75
47.13
48.26
47.34
49.35
42.49
51.63
48.14
0.7 53.88
50.27
51.64
50.41
53.84
46.32
55.76
52.36
0.6 55.06
52.99
52.38
52.59
54.70
49.32
58.90
55.89
0.5
3-
leve
l
54.34
3-
leve
l
54.12
3-
leve
l
51.99
3-
leve
l
58.66
0.4 54.70
55.28
54.5
60.36
0.3 50.80
51.86
59.15
61.60
0
0.
0
0
2
0.
0
0
4
0.
0
0
6
0.
008
0.
0
1
0.
012
0.
0
1
4
0.
0
1
6
0.
018
0.
0
2
-2
-1.
5
-1
-0.
5
0
0.
5
1
1.
5
2
Ti
m
e
i
n
s
e
c
A
m
pl
i
t
ud
e i
n
v
o
l
t
s
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Asse
ssm
ent of Equal and
Une
qual Am
plitude Ca
rri
ers for a 1
Φ
Fi
ve… (P.Sure
s
hpan
diarajan
)
235
Table 3. V
RM
S
(fundam
ental
) for five level output voltage based on e
qual amplitu
d
e and un
equ
a
l
amplitude
ca
rriers with vari
ous mo
dulati
on indi
ce
s
Ref.
m
a
V
RM
S
(Funda
me
ntal)
for 5
-
le
v
e
l i
n
v
e
rter
PDPWM PO
DPWM
A
P
O
DPWM
COPWM
PD UE
A
P
D
PO
D
U
E
A
P
O
D
A
P
O
D
U
E
A
A
P
OD
CO UE
A
C
O
Sine reference
1 70.63
76.7
70.51
76.85
70.32
76.79
70.63
77.5
0.9 63.52
71.97
63.29
71.96
63.52
71.91
63.52
72.89
0.8 56.42
67.19
56.52
67.27
56.42
67.13
56.42
68.25
0.7 49.2
62.04
49.21
62.13
49.2
65.05
49.2
63.63
0.6 42.17
57.21
42.36
57.24`
42.17
57.2
42.17
58.74
0.5
3-
leve
l
52.07
3-
leve
l
52.04
3-
leve
l
52.03
3-
leve
l
53.7
0.4 46.45
46.38
46.46
48.01
0.3 39.83
41.20
41.30
40.04
THI ref
e
renc
e
1 81.85
84.53
81.81
84.46
81.73
84.43
84.17
84.73
0.9 73.66
78.74
73.63
78.83
73.6
78.75
78.75
79.54
0.8 65.37
73.41
65.44
73.22
65.39
73.39
73.59
74.29
0.7 57.08
67.78
57.09
67.78
56.98
67.82
67.97
69.17
0.6 48.78
62.34
48.8
62.2
48.87
62.23
61.31
63.92
0.5
3-
leve
l
56.75
3-
leve
l
56.63
3-
leve
l
56.79
3-
leve
l
58.47
0.4 50.81
50.78
50.79
53.01
0.3 44.69
44.79
44.78
46.05
Trapezoidal
referenc
e
1 82.84
84.94
82.82
84.92
82.86
84.96
84.63
85.24
0.9 74.46
79.41
74.56
79.38
74.41
79.36
79.26
79.98
0.8 66.11
73.77
65.89
73.77
66.12
73.75
73.66
74.72
0.7 57.75
68.17
57.92
68.19
57.59
68.14
68
69.5
0.6 49.35
62.63
49.36
62.59
49.4
62.61
61.95
64.02
0.5
3-
leve
l
56.79
3-
leve
l
56.71
3-
leve
l
56.83
3-
leve
l
58.59
0.4 50.89
51.15
50.87
52.87
0.3 44.76
44.67
44.62
46.62
TAR refe
renc
e
1 75.94
77.97
75.86
77.94
75.86
77.39
76.79
78.43
0.9 68.31
73.02
68.03
72.88
68.84
73.48
71.89
73.72
0.8 60.74
67.96
60.14
67.68
61.68
69.45
67.02
68.75
0.7 52.81
62.64
52.34
62.33
53.76
65.46
62.06
63.71
0.6 45.18
56.93
45.22
56.96
45.93
61.51
56.91
58.33
0.5
3-
leve
l
51.33
3-
leve
l
51.48
3-
leve
l
57.34
3-
leve
l
53.02
0.4 45.61
45.46
45.68
47.69
0.3 40.29
40.13
34.2
42.73
4. Conclusio
n
The propo
se
d work comp
are
s
the vari
ous p
u
lse wi
dth modulati
on tech
niqu
e
s
for the
cho
s
e
n
si
ngl
e pha
se
half
bridg
e
DCM
L
I. For all the
PWM st
rategi
es a
nd
refere
nce
s
the
UE
AC
prod
uces l
e
ss T
HD
and hi
gher fu
nda
m
ental RM
S
(Root Mean S
q
uare
)
valu
es
except fo
r m
a
=1.
For m
a
=1 the
EAC provide
s
less THD (Total Ha
rmon
ic Di
stortion
) and high
er fu
ndame
n
tal RMS
(Ro
o
t Me
an
Square) val
u
es fo
r
all the
PWM m
e
tho
d
s
and
refe
re
nce
s
. T
able
2 an
d 3
di
spl
a
ys
the total harmonic di
sto
r
tion and outp
u
t
fundament
al
voltages for
variou
s PWM
techniq
u
e
s
and
r
e
fe
re
nc
es
.
Referen
ces
[1]
J Chiass
on J,
T
o
lbert LM, McKennz
ie K, Z
Du
. A complete so
luti
on
to the harmo
n
i
c elimi
nati
o
n
prob
lem.
IEEE Trans. On Power Electronics.
200
4; 19(2): 49
1-49
9.
[2]
Di
xon J
u
a
n
, Lu
is Moran. H
i
gh
level m
u
ltistep
inverter o
p
timi
zation
usin
g a
minimum
num
ber of p
o
w
e
r
transistors.
IEEE Trans. on Power Electronics
.
2006; 21(
2): 330-3
37.
[3]
W
e
lls JR, Gen
g
X,
Cha
p
ma
n
PL, Krein PT
, Nee BM. Mo
d
u
lati
on b
a
se
d
harmo
nic e
limi
natio
n.
IEEE
T
r
ans. on Pow
e
r Electron
ics.
200
7; 22(1): 33
6-34
0.
[4]
Urmila B, Sub
bara
y
u
du D.
Multilev
e
l Inve
rter
s: A comparative stud
y
of
pulse
w
i
dth
modul
ati
o
n
techni
qu
es.
Journa
l of Scienti
f
ic & Engine
eri
ng Res
earch.
2
010; 1(3): 1-5.
[5]
F
a
rid kho
u
ch
a
,
Mouna S
o
u
m
ia La
go
un,
Adel
aziz Kh
el
oui, Mo
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