Indonesi
an
Journa
l
of El
ect
ri
cal Engineer
ing
an
d
Comp
ut
er
Scie
nce
Vo
l.
13
,
No.
2
,
Febr
uar
y
201
9
, pp.
461
~
468
IS
S
N: 25
02
-
4752, DO
I: 10
.11
591/ijeecs
.v
1
3
.i
2
.pp
461
-
468
461
Journ
al h
om
e
page
:
http:
//
ia
es
core.c
om/j
ourn
als/i
ndex.
ph
p/ij
eecs
Sim
pli
fied five
-
level
volt
age s
ourc
e inve
rter w
i
th le
ve
l
-
ph
ase
-
shifted
carri
er
s
based mo
du
lation techniq
ue
Suro
s
o
1
,
Daru
Tri
N
u
gr
oho
2
, Abdulla
h
Nur
A
z
is
3
, To
shi
hiko N
oguchi
4
1
,2,3
El
e
ct
ri
ca
l
En
gine
er
ing
Dep
artm
ent
,
Jend
era
l
Soedirman
Univ
er
sit
y
,
Indon
esia
4
Gradua
te Schoo
l
of Engin
ee
ring
,
Shizuoka Univers
ity
,
Jap
an
Art
ic
le
In
f
o
ABSTR
A
CT
Art
ic
le
history:
Re
cei
ved
J
ul
1
1
, 2
018
Re
vised
Sep
1
2
, 2
018
Accepte
d
Se
p
2
6
, 201
8
A
sim
pli
fie
d
ci
rcu
it
topol
og
y
of
the
five
-
le
v
el
i
nver
te
r
for
DC
-
AC
power
conve
rsion
wit
h
non
-
insula
t
ed
DC
power
source
s
a
long
wi
th
red
uc
ed
sw
it
chi
ng
dev
ice
count
is
int
ro
duce
d
and
discu
ss
ed
in
thi
s
rese
arc
h
pap
er
.
The
inve
rt
er
c
irc
uit
is
b
ase
d
on
th
e
thre
e
-
le
ve
l
H
-
bridg
e
inve
r
te
r
conf
iguration.
T
he
deve
lop
ed
fiv
e
-
le
v
el
PW
M
in
ver
te
r
ne
eds
five
cont
rolled
power
sw
it
che
s
and
four
iso
la
t
ed
gate
dri
ve
ci
r
cui
ts
.
Furthermore
,
the
proposed
to
polog
y
do
es
not
req
uire
bid
ire
c
t
iona
l
power
se
m
ic
onduct
or
cont
rolled
sw
it
c
hes,
hen
ce
a
c
onvent
ion
al
dis
cre
t
e
power
M
OS
FETs
or
IGBTs
ca
n
be
used
to
buil
d
the
inve
rt
er
ci
r
cui
ts.
To
ac
hie
v
e
a
b
et
t
er
quali
t
y
AC
output
voltage,
the
l
evel
-
p
hase
-
shifte
d
ca
r
rie
rs
base
d
sinu
soidal
pulse
width
m
odula
ti
o
n
was
appl
ie
d
to
cre
ate
a
fiv
e
-
le
v
e
l
PW
M
volt
age
wave
form
.
The
develope
d
inve
rte
r
c
irc
u
it
was
exa
m
ine
d
b
y
utilizin
g
computer
sim
ula
ti
on
with
Pow
er
PS
IM
sof
twar
e.
Th
e
basi
c
princ
ip
le
oper
a
t
ion
of
th
e
inve
rt
er
c
irc
ui
t
was
ver
ified
exp
eri
m
ent
a
lly
in
l
a
bora
tor
y
apply
in
g
two
non
-
insula
te
d
DC
in
p
ut
voltage
sour
ce
s
as
th
e
inpu
t
s
of
the
inv
erter
’s
prototy
pe
ci
rcu
it
.
Som
e
ana
l
y
sis
of
in
ver
te
r’s
outpu
t
wave
form
s
are
provide
d
and
discussed
.
Ke
yw
or
ds:
Har
m
on
ic
s
Modula
ti
on
Power
i
nverter
Copyright
©
201
9
Instit
ut
e
o
f Ad
vanc
ed
Engi
n
ee
r
ing
and
S
cienc
e
.
Al
l
rights re
serv
ed.
Corres
pond
in
g
Aut
h
or
:
Su
r
oso
,
Ele
ct
rical
En
gi
neer
i
ng D
e
par
t
m
ent,
Jen
der
al
S
oe
dirm
an
Un
i
ver
sit
y,
Jl. May
j
en
S
ungkono km
.5
, P
urbali
ngga
, J
a
wa
Te
ngah
, In
donesia.
Em
a
il
:
su
ro
s
o.
t
e.uns
oed@g
m
ai
l.com
1.
INTROD
U
CTION
The
dem
and
of
high
po
wer
and
high
qual
it
y
po
we
r
inv
e
rters
f
or
m
any
util
iz
at
ion
s
as
industrial
m
oto
r
dr
i
ves
and
re
ne
wab
le
ene
rg
y
c
onve
rsions
e
nc
our
ages
t
he
re
sea
rch
e
rs
t
o
devel
op
ne
w
c
onver
te
r
topolo
gies
s
uc
h
as
m
ulti
le
v
el
powe
r
in
ve
rters.
Co
ntra
st
to
the
t
ra
di
ti
on
al
tw
o
-
le
vel
power
in
ver
te
r
,
the
m
ulti
le
vel
powe
r
inv
e
rter
s
po
s
sess
so
m
e
m
erit
s
su
ch
as
their
pote
nt
ia
l
to
yi
e
ld
a
higher
ou
t
pu
t
powe
r,
reduce
d
volt
ag
e
change (
dv/d
t),
dec
rease
d
gradie
nt
cu
rr
e
nt
change (
di/dt
),
an
d
prefe
rab
le
ch
aracte
risti
c
of
AC
vo
lt
age
wa
vefor
m
s
eff
ect
ing
in
le
ss
el
ect
rom
agn
et
ic
no
ise
.
The
m
ulti
le
vel
power
in
ve
rter
can
al
s
o
re
duce
the
ou
t
pu
t
filt
er s
iz
e b
y e
nh
a
ncin
g t
he
in
ve
rter’
s
l
evel co
unt [
1
-
5]
.
The
def
i
niti
on
of
m
ulti
le
vel
powe
r
in
ver
te
r
ci
rcu
it
s
i
nclu
des
a
th
ree
-
le
ve
l
powe
r
in
ve
r
te
r,
a
nd
the
inv
e
rters
with
higher
le
vel
num
ber
.
T
o
dat
e,
a
lot
of
i
nverter
to
polo
gies
especial
ly
volt
age
source
i
nvert
e
r
(V
S
I)
ci
rc
uits
hav
e
been
de
ve
lop
e
d.
Ba
sic
a
ll
y,
there
are
fo
ur
m
ajo
r
topo
log
ie
s
of
m
ultilevel
VS
I
to
po
log
ie
s
hav
e
bee
n
pr
e
s
ented
[
6].
The
y
are
the
casca
ded
H
-
br
i
dg
e
s
m
ul
ti
le
vel
VS
I
with
disju
nct
DC
powe
r
sou
rces
,
the
ne
utral
cl
a
m
ped
m
ulti
lev
el
VSI,
t
he
fly
ing
ca
pacit
or
s
VSI
an
d
the
hybri
d
t
opol
og
y
of
m
ulti
le
vel
VS
I
[7
-
12
]
.
The
topolo
gy
of
casca
ded
f
ul
l
-
br
id
ge
po
we
r
inv
e
rter
with
cl
oistered
DC
power
sou
rce
s
has
a
gr
eat
m
erit
with
it
s
m
od
ularit
y.
Ev
en
th
ought,
it
has
disad
va
nta
ge
s
uc
h
as
the
nee
d
of
m
any
dis
j
unct
DC
volt
age
powe
r
source
s
,
an
d
the
la
r
ge
nu
m
ber
of
con
t
ro
ll
ed
po
wer
s
witc
hes.
The
m
or
e
the
con
tr
olled
s
witc
hes,
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2502
-
4752
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci,
Vo
l.
13
, N
o.
2
,
Fe
bru
ary 2
019
:
461
–
468
462
the
m
or
e
co
unt
of
isolat
e
d
dr
i
ving
ci
rc
ui
ts
are
re
qu
isi
te
.
The
s
eco
nd
to
polo
gy
i.e
.
the
diode
cl
a
m
ped
m
ul
ti
le
vel
VS
I
has
been
wide
ly
app
li
ed
in
m
od
ern
AC
m
oto
r
dr
ive
a
pp
li
cat
io
n.
Th
e
top
ol
og
y
of
fly
ing
capaci
tor
V
SI
i
s
an
oth
e
r
al
te
r
native.
H
ow
e
ve
r,
t
he
nu
m
ber
of
ca
pacit
or
s
r
equ
i
red
in
t
his
inv
e
rter
ci
rc
uits
will
cause
an
oth
e
r
chall
eng
e
suc
h
as
the
interm
ediat
e
vo
lt
a
ge
co
ntro
l
of
the
capaci
tor
vo
lt
age
s.
The
four
t
h
topolo
gy
is
the
hybr
id
m
ulti
lev
el
VS
I
.
Ba
sic
al
ly
,
the
hybr
id
topolo
gy
is
t
he
topolo
gy
of
m
ultilevel
inv
e
rte
r
dev
el
op
e
d
t
o
reduce
s
om
e
sh
ort
fall
s
in
the
th
ree
t
opol
og
ie
s
of
m
ult
il
evel
inv
e
rter
ci
rcu
it
s
pr
e
vi
ou
sly
discusse
d. Sti
ll
, th
e ci
rcu
it
c
om
plexit
y has
be
com
e ano
the
r i
ssu
e
of the m
ulti
le
vel p
ower i
nv
e
rter ci
rcu
it
s
.
Ci
rcu
it
of
a
hy
br
i
d
m
ulti
le
vel
powe
r
i
n
ver
te
r
c
reated
from
the
H
-
br
i
dg
e
volt
age
s
ource
inv
e
rter
a
nd
su
b
-
m
ulti
le
vel
ci
rcu
it
s
was
di
scusse
d
in
[
13
]
.
The
sub
-
m
ulti
le
vel
ci
rcu
it
i
s
con
st
ru
ct
e
d
us
in
g
capaci
to
r
an
d
two
bid
irect
io
nal
co
ntr
olled
switc
hes.
A
no
t
her
ci
rcu
it
to
polo
gy
of
m
ultilevel
VSI
crea
te
d
f
ro
m
a
fu
ll
-
bri
dg
e
inv
e
rter
an
d
an
ad
diti
on
al
bi
directi
onal
act
i
ve
powe
r
switc
h
as
sh
ow
n
in
Fig
ur
e
1
wa
s
pr
ese
nted
in
[1
4
]
.
Nev
e
rtheles,
t
he
a
dd
it
io
nal
bid
irect
io
nal
c
on
t
ro
ll
ed
po
w
er
s
witc
hes
i
n
inv
e
rter
to
polog
ie
s
desc
rib
ed
in
ref
e
ren
ce
[
13
]
an
d
[1
4
]
will
cause
so
m
e
draw
bac
ks
of
the
in
ve
rter.
T
he
c
onve
ntio
na
l
bid
irect
io
na
l
powe
r
sem
ic
on
duct
or
con
t
ro
ll
ed
s
witc
hes
c
onstructe
d
by
c
om
bin
ing
tw
o
un
i
directi
onal
powe
rsem
ic
on
duct
or
con
t
ro
ll
ed
s
witc
hes
or
a
sin
gle
con
tr
olled
power
s
witc
h
wit
h
f
our
di
od
es
c
ause
the
total
inv
e
rter
power
losse
s
go
u
p.
A
nother
structu
re
of
m
ulti
le
vel
inv
ert
er
ci
rcu
it
s
buil
t
fr
om
the
three
-
le
vel
cel
l
of
H
-
bri
dge
in
ver
te
r
was
pro
vid
e
d
in
[
1
5
]
.
Eigh
t
act
iv
e
switc
hes
are
entai
le
d
in
this
inv
erte
r
ci
rc
uit.
Ci
rcu
it
structu
re
of
a
fi
ve
-
le
v
el
m
ul
ti
string
in
ver
te
r
was
dis
cusse
d
in
[1
6
]
and
[
1
7
]
.
T
w
o
detac
hed
D
C
vo
lt
age
s
ou
rces
with
six
act
ive
switc
hes
are
dem
and
ed
in
th
is
inv
erter
ci
r
cuit.
The
five
-
le
vel
m
ulti
stri
ng
in
ver
te
r
str
uctu
re
is
sh
own
in
Figure
2.
T
he
la
rg
e
qu
a
ntit
y
of
c
ontrolle
d
po
we
r
switc
he
s
an
d
the
re
quirem
ent
of
se
par
at
e
d
DC
volt
age
powe
r
s
ources
will
escal
at
e
the
intryc
acy
of
i
nv
e
rter
powe
r
ci
rcu
it
s.
Pa
pe
rs
[1
8
]
de
scri
bed
an
oth
er
m
ulti
l
evel
vo
lt
age
s
ource
powe
r
i
nv
e
rte
r
c
on
st
ru
ct
e
d
by
H
-
br
id
ge
V
SI
a
nd
tw
o
-
le
ve
l
vo
lt
a
ge
s
our
ce
m
od
ules.
I
n
this
topolo
gy,
six
c
on
t
ro
ll
ed
powe
r
switc
hes
with
five
dis
j
unct
gate
dr
i
ve
po
wer
s
upplies
a
re
entai
le
d
to
op
e
rate
the s
witc
hes of i
nv
e
rter.
Figure
1. Five
-
le
vel inverte
r
e
m
plo
yi
ng
H
-
br
idg
e
VS
I
and
au
xili
ary bi
directi
on
al
sw
it
ch [1
4]
Figu
re
2. Five
-
le
vel m
ulti
s
tring
in
ve
rter
[16]
2.
RESEA
R
CH MET
HO
D
In
this
researc
h
pa
per,
a
dist
inct
topolo
gy
of
five
-
le
vel
V
SI
with
non
i
nsula
te
d
DC
volt
age
powe
r
so
urces
a
nd
re
du
ce
d
s
witc
hing
de
vice
c
ount
is
pr
ese
nted
.
Fu
rt
her
m
or
e,
t
he
de
velo
pe
d
f
ive
-
le
vel
VS
I
ci
rcu
it
s
need
only
f
our
gate
dr
i
ve
ci
r
cuits
f
or
gatin
g
sig
nal
ge
nerat
ion
.
I
n
the
de
velo
ped
in
vert
er
to
po
l
og
y,
the
D
C
input
pow
er
s
ources
a
re
no
n
-
i
ns
ulate
d
D
C
so
urces.
F
urt
her
m
or
e,
al
l
con
t
ro
ll
ed
powe
r
sem
ic
ondu
ct
or
switc
hes
a
re
s
ole
directi
onal
switc
he
s.
The
five
-
le
vel
VSI
ci
rcu
it
was
des
ign
e
d
an
d
te
ste
d
th
rou
gh
c
ompu
te
r
si
m
ulati
on
s
util
iz
ing
Powe
r
P
SI
M
S
of
twa
re.
Fu
rt
her
m
or
e,
t
he
basic
pr
i
nciple
operati
on
of
the
in
ver
te
r
ci
rcu
it
was veri
fied
e
xperim
ental
ly
in
laborat
ory
of t
he
in
ve
rter’
s
pr
oto
ty
pe
ci
rcu
it.
2
.
1.
Pr
opose
d Inverter
C
ir
cuits
an
d
It
s
B
as
ic
O
pera
tio
n
Figure
3
is
the
new
ci
rc
uit
of
five
-
le
vel
pow
er
inv
e
rter.
I
n
this
new
to
polo
gy,
only
five
act
ive
powe
r
switc
hes
with
four
isolat
e
d
ga
te
dr
ive
powe
r
supp
li
es
an
d
a
sing
le
discre
te
dio
de
are
re
qu
i
red.
The
le
ss
the
act
ive
se
m
ic
on
du
ct
or
s
witc
he
s,
the
si
m
pler
inv
e
rter
ci
rcu
it
s
will
be
ob
ta
ined
.
A
lo
w
pa
ss
filt
er
con
sis
ts
of
inducto
r
(L
f
)
a
nd
ca
pacit
or
(
C
f
)
is
co
nnect
ed
to
the
in
ver
te
r.
Ta
ble
1
ind
i
cat
es
the
switc
hing
co
ndit
ions
of
th
e
new
f
i
ve
le
vel
VS
I for f
ive le
vel v
oltag
e ev
oc
at
ion
. Moreo
ve
r,
Fig
ur
e
4
pr
esents the d
et
ai
le
d
op
e
rati
on m
od
es
for
five
-
le
vel
P
WM
vo
lt
a
ge
w
aveform
(V
PWM
)
evo
cat
io
n,
s
pecifica
ll
y
+2V
,
+V
,
0,
-
V
a
nd
-
2V
outp
ut
vo
lt
age
le
vels.
The
loa
d
volt
age
wa
ve
form
get
near
to
a
sinu
s
oid
a
l
vo
lt
age,
wh
ic
h
is
a
five
-
le
ve
l
P
W
M
vo
lt
a
ge
after
filt
ering
by t
he
low pa
ss f
il
te
r
.
Evaluation Warning : The document was created with Spire.PDF for Python.
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci
IS
S
N:
25
02
-
4752
Simpli
fi
ed
fi
ve
-
le
vel
vo
lt
ag
e
s
ou
r
ce invert
er
wi
th leve
l
-
phase
-
sh
if
te
d
c
ar
rie
rs base
d mod
ula
ti
on
…
(
Suro
s
o
)
463
Figure
3. The
c
ircuit
of
pro
posed five
-
le
vel
VS
I
(a)
Mod
e
I
: +
V
le
vel volt
age
(b)
Mod
e
II: +2
V
l
evel volt
age
(c)
Mod
e
III:
-
V
level v
oltage
(d)
Mod
e
IV:
-
2V
le
vel volt
age
(e)
Mod
e
V
:
0
le
ve
l vo
lt
ag
e
(f)
Mod
e
VI: 0
lev
el
v
oltag
e
Figure
4. O
perat
ion
m
od
es
of f
ive
-
le
vel
VSI
Table
1.
Sw
it
c
hing
C
onditi
ons
of Fi
ve
-
Le
vel
VSI
Op
eration
M
o
d
es
Q
1
Q
2
Q
3
Q
4
Q
5
D
V
P
W
M
I
1
0
1
0
0
1
+V
II
1
0
1
0
1
0
+2
V
III
0
1
0
1
0
1
-
V
IV
0
1
0
1
1
0
-
2V
V
0
0
1
1
0
0
0
VI
1
1
0
0
0
0
0
2
.
2
.
In
ver
ter’
s Modul
at
i
on
Te
chnique
A
pure
sin
usoi
dal
wa
vefo
rm
of
c
urre
nt
an
d
volt
age
are
id
eal
sh
ap
e
f
or
a
l
m
os
t
al
l
AC
powe
r
loa
d.
Nev
e
rtheless
,
i
n
r
eal
co
ndit
ion
m
any
factors
aff
ect
t
he
real
sh
a
pe
of
cu
rret
and
volt
age.
Be
cause
of
volt
age
dro
p
in the circ
uits and
vo
lt
a
ge
r
ipp
le
of
the
DC i
nput volt
age sour
c
e, h
a
r
m
on
ic
w
il
l app
ear in
the A
C
volt
age
and
cu
rrent
wa
vefor
m
s
of
a
powe
r
i
nv
e
rter.
In
m
any
inv
ert
er
ci
rc
uits
s
ome
m
od
ulati
on
s
trat
egies
are
a
ppli
ed
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2502
-
4752
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci,
Vo
l.
13
, N
o.
2
,
Fe
bru
ary 2
019
:
461
–
468
464
to
achieve
lo
w
er
disto
rtion
of
cur
re
nt
an
d
volt
age
[
19,
20]
.
Fu
rt
her
m
or
e,
powe
r
filt
er
c
ircuit
s
are
al
so
adde
d
to
filt
er
switc
hi
ng
ha
rm
on
ic
s
in
or
der
to
obta
in
a
cl
os
er
sin
us
oi
dal
wav
e
f
orm
s.
In
t
his
res
earch
,
the
le
ve
l
an
d
ph
a
se
sh
ifte
d
carriers
base
d
m
od
ulati
on
wa
s
i
m
ple
m
ented
fo
r
t
he
dri
ving
sig
nal
s
ge
ne
rati
on
of
in
ve
r
te
r’
s
switc
hes
a
s
disp
la
ye
d
in
Fig
ure
5
.
T
w
o
ca
rri
er
sig
nals
with
a
n
ide
ntica
l
fr
e
qu
e
ncy
bu
t
hav
e
co
ntra
ry
ph
a
se
and
di
ff
e
ren
t
offset
le
vel
w
ere
us
ed
to
get
her
with
a
si
nuso
i
dal
m
od
ul
at
ing
si
gn
al
a
s
sho
wn
the
f
igure.
The
basic
f
re
qu
e
ncy
com
ponen
t
of
AC
c
urren
t
an
d
vo
lt
age
wav
e
f
or
m
s
is
reg
ulate
d
by
the
sinusoidal
m
od
ulati
ng
si
gn
al
a
s
the
m
odulato
r
wav
e
form
.
Sw
it
ching
ra
pid
it
y
of
the
in
ve
rter’
s
powe
r
sem
ico
nd
uct
or
switc
hes
is
the
sa
m
e
with
the
fr
e
qu
e
ncy
of
tria
ngular
ca
rr
i
er
sig
nals
[
21,
22
]
.
Gati
ng
sig
nals
of
in
ver
te
r
ar
e
pro
du
ce
d
by
t
he
P
W
M
ge
ne
rator
c
ontr
olli
ng
the
O
N/O
FF
co
ndit
ion
of
in
ve
rter’s
powe
r
sem
i
con
du
ct
or
switc
hes
to
out
pu
t
the
de
sired
five
-
le
vel
volt
age
sh
a
pe.
T
he
gate
dr
ive
ci
rc
uits
work
as
in
te
rf
ace
an
d
isol
at
ion
betwee
n
the
h
i
gh po
wer an
d
c
on
t
ro
l ci
rc
uits.
Figure
5. Mo
dula
ti
on
tec
hniq
ue of
the
five
-
le
vel VSI
3.
RESU
LT
S
A
ND AN
ALYSIS
3.1.
Co
m
pu
t
er Simul
ati
on
Te
st
R
esults
Com
pu
te
r
sim
ulati
on
s
ex
pe
rim
ents
wer
e
pe
rfor
m
ed
to
ver
i
fy
an
d
t
o
prove
the
basic
pr
i
nciple
wor
ks
of
t
he
de
velo
pe
d
five
-
le
vel
V
SI
ci
rc
uits.
Par
a
m
et
ers
of
sim
ulati
on
te
st
we
re
in
dicat
ed
i
n
Table
2.
A
five
-
le
vel
VS
I
ci
rc
uit
a
s
disp
la
ye
d
in
F
igure
3
wa
s
e
xam
ined.
A
lo
w
-
pass
filt
er
ci
r
cuit
with
i
nduc
tor
L
f
=
1
m
H
a
nd
capaci
tor
C
f
=
5
µF
was
us
ed
.
The
fi
ve
-
le
vel
VS
I
ci
rcu
it
w
as
co
nn
ect
e
d
with
a
resist
ive
and
i
nductive
powe
r
load,
i.e
.
powe
r
resist
or
10
Ω
,
an
d
powe
r
in
du
ct
or
1
m
H.
The
s
witc
hing
op
e
rati
on
fr
e
quency
of
c
on
tr
olled
powe
r
sem
ic
on
duct
or
switc
he
s
was
desig
ne
d
as
21
kH
z
to
m
ini
m
iz
e
the
aud
i
ble
noise
and
to
pus
h
the
switc
hing
ha
r
m
on
ic
s
into
hig
he
r
f
reque
nc
y
or
de
rs.
T
he
ou
t
pu
t
vo
lt
age
fund
am
ental
fr
eq
ue
ncy
was
50
Hz.
Tw
o non
-
is
olate
d 12 V
D
C
in
pu
t
volt
age s
ou
rces
wer
e
u
se
d as t
he
i
nv
e
rter
’
s in
pu
ts.
Figure
6
i
nd
ic
at
es
te
st
res
ults
of
c
om
pu
te
r
sim
ulatio
n
presenti
ng
the
outp
ut
volt
age
wav
e
f
or
m
s
create
d
by
t
he
five
-
le
vel
VSI
ci
rc
uit.
A
five
-
le
vel
volt
a
ge
wavef
or
m
has
bee
n
c
onf
ir
m
ed.
Further
m
or
e,
a
sinu
s
oid
al
volt
age
was
a
ppli
ed
to
the
power
loa
d
after
filt
ering
by
a
low
-
pa
ss
filt
er.
Figure
7
is
ha
r
m
on
ic
prof
il
e
of
the
ge
ner
at
e
d
five
-
l
evel
volt
age
w
aveform
fo
r
frequ
e
ncy
ra
nge
up
t
o
50
kHz.
Sw
it
chin
g
harm
on
ic
com
po
ne
nts
an
d
it
s
si
deb
an
ds
app
ea
red
ar
ou
nd
fr
e
qu
e
ncy
21
kHz
an
d
it
s
m
ul
ti
ples.
Figure
8
prese
nts
the
low
har
m
on
ic
orde
rs
of
the
pr
oduc
ed
five
-
le
vel
ou
t
pu
t
volt
age.
The
am
plit
ud
es
of
al
l
l
ow
ha
rm
on
ic
orde
rs
we
r
e
le
ss
tha
n
1
%
.
Fu
rt
her
m
or
e,
F
igure
9
disp
la
y
s
a
c
urren
t
wa
vefor
m
flo
wing
th
r
u
th
e
pow
er
loa
d,
power
switc
h
Q
5
a
nd
powe
r dio
de
D of
in
ve
rter circ
uits. A
sin
us
oi
dal cu
r
ren
t,
IL
oad, fl
ow
e
d
sup
plyi
ng
elec
tric
po
wer
to
t
he
load
ci
rc
uit.
The
cu
rr
e
nts
flo
wing
via
the
switc
h
Q
5
and
diode
D
we
re
the
P
W
M
cu
rr
e
nt
s
with
fr
e
qu
e
ncy
21 kHz.
Table
2.
T
est
P
aram
et
ers
No
.
Para
m
eters
Valu
es
1
DC in
p
u
t po
wer
so
u
rce
v
o
ltag
es
1
2
V
2
Switch
in
g
op
eration
f
requ
en
cy
2
1
kHz
3
Ind
u
cto
r
p
o
wer
f
ilters,
L
f
1
m
H
4
Cap
acito
r
p
o
wer
f
i
lter,
C
f
5
µF
5
Po
wer
lo
ad
R
= 10
,
L
=1
m
H
6
Fu
n
d
a
m
en
tal o
u
tp
u
t
f
requ
en
cy
5
0
Hz
Evaluation Warning : The document was created with Spire.PDF for Python.
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci
IS
S
N:
25
02
-
4752
Simpli
fi
ed
fi
ve
-
le
vel
vo
lt
ag
e
s
ou
r
ce invert
er
wi
th leve
l
-
phase
-
sh
if
te
d
c
ar
rie
rs base
d mod
ula
ti
on
…
(
Suro
s
o
)
465
Figure
6. Five
-
le
vel P
W
M
AC
volt
age (V
pw
m
),
an
d l
oa
d vol
ta
ge
(
V
Load
)
w
aveform
s
Figure
7. Ha
rm
on
ic
pro
file
of
five
-
le
vel
vo
lt
a
ge wit
h
the
s
witc
hin
g ha
rm
on
ic
s consti
tuents
Figure
8. Pro
file
of the
lo
w ha
rm
on
ic
co
m
ponen
ts
Figure
9.
W
a
ve
form
s o
f
c
urr
ents f
l
ow
i
ng th
ru the l
oad, s
w
it
ch
Q
5
a
nd
diode
D
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2502
-
4752
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci,
Vo
l.
13
, N
o.
2
,
Fe
bru
ary 2
019
:
461
–
468
466
3.2.
L
aborat
ory Pr
ototype
Test
Resul
ts
In
orde
r
to
ex
a
m
ine
the
five
-
le
vel
V
SI
ci
rc
uits
ex
per
im
ental
ly
,
a
five
-
le
vel
inv
e
rter
prototype
wa
s
m
ade
us
i
ng
fiv
e
powe
r
M
OSFETs
F
K
30S
M
-
6,
an
d
a
sin
gle
po
wer
diod
e
VS
-
30ET
H
06PBF.
T
he
le
ve
l
-
phase
sh
ifte
d
car
riers
base
d
P
W
M
te
chn
i
qu
e
was
app
li
ed
.
T
he
D
C
inp
ut
powe
r
so
urces
we
re
a
cqu
i
red
f
ro
m
the
t
w
o
adjusta
ble
DC
vo
lt
age
sou
rce
s
co
nn
ect
e
d
in
series.
Fi
gure
10
sho
ws
the
l
aborato
ry
ex
pe
rim
ental
set
-
up
of
t
he
prototype
f
iv
e
-
le
vel inverte
r
.
Figure
11
pr
es
ents
the
firi
ng
sign
al
s
of
the
MOSFET
s
s
witc
hes
Q
2
an
d
Q
3
ob
ta
ine
d
from
the
P
WM
ci
rcu
it
s
after
pa
ssing
the d
ri
ve
r
IC TLP
250.
Fig
ur
e 12
is
th
e
gatin
g
sig
nal
s
of
s
witc
hes
Q
1
an
d
Q
4
. Th
e
gatin
g
sign
al
of
M
OSFET
s
witc
h
Q
5
is
pr
e
sente
d
i
n
Fi
gure
13.
T
hese
si
gn
al
s
w
ere
use
d
t
o
c
ontr
ol
the
op
e
ra
ti
on
of
five
-
le
vel in
ve
r
te
r
ci
rcu
it
s t
o g
ener
at
e a
f
i
ve
-
l
evel P
WM
vo
lt
age
wav
e
f
or
m
.
Figure
14
s
hows
the
e
xp
e
ri
m
ental
wav
ef
orm
of
a
five
-
le
vel
P
W
M
ou
t
put
volt
age
ge
ne
rated
by
the
inv
e
rter
wh
e
n
the
m
od
ulati
on
ind
e
x
0.9.
A
f
ive
le
vel
P
W
M
AC
volt
age
was
e
xp
e
rim
e
ntall
y
con
fi
rm
ed.
T
h
e
har
m
on
ic
s
pec
trum
of
t
his
w
aveform
is
show
n
i
n
Fig
ur
e
15.
The
s
witc
hing
har
m
on
ic
s
com
ponen
t
a
nd
it
s
sideba
nds appe
ared
ar
ound th
e fr
eq
ue
ncy 2
1 kH
z an
d
it
s
m
ulti
ples. Th
is f
reque
ncy is the sw
it
chin
g
fr
e
quency
of
t
he
powe
r
MOSFET
s
us
e
d
in
in
ver
te
r
.
Fu
rt
her
m
or
e,
the
m
easur
ed
load
volt
age
w
aveform
is
show
n
i
n
Figure
16.
A
sinu
s
oid
al
vo
lt
age
was
obta
ined
a
fter
filt
er
ing
the
five
-
le
vel
P
W
M
vo
lt
age
wa
vefo
rm
.
The
la
borator
y t
est
resu
lt
s a
gr
ee
d wit
h
the
co
m
pute
r
sim
ulati
ons.
Figure
10. E
xp
erim
ental
set
-
up
of
the la
borat
or
y
prototype
Figure
11. Gat
ing si
gnal
s
of s
witc
hes Q
2
a
nd Q
3
Figure
12.
Gati
ng sig
nals
of s
witc
hes Q
1
a
nd Q
4
Figure
13. Gat
ing si
gnal
of
sw
it
ch
Q
5
Figure
14. E
xp
erim
ental
test
r
esult o
f five
-
le
vel volt
age
Figure
15.
Harm
on
ic
p
r
of
il
e
of f
ive
-
le
vel
volt
age
Evaluation Warning : The document was created with Spire.PDF for Python.
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci
IS
S
N:
25
02
-
4752
Simpli
fi
ed
fi
ve
-
le
vel
vo
lt
ag
e
s
ou
r
ce invert
er
wi
th leve
l
-
phase
-
sh
if
te
d
c
ar
rie
rs base
d mod
ula
ti
on
…
(
Suro
s
o
)
467
Figure
16. E
xp
erim
ental
test
r
esult o
f
the
loa
d vo
lt
age
w
a
ve
form
4.
CONCL
US
I
O
N
A
sim
plifie
d
ci
rcu
it
struct
ur
e
of
five
-
le
vel
vo
lt
age
sour
ce
inv
e
rter
is
be
ing
dev
el
oped
.
Pr
inci
ple
works
of
the
inv
e
rter
ci
rc
uits
hav
e
been
presente
d
an
d
di
scusse
d.
The
pr
ese
nted
five
-
le
vel
vo
lt
age
s
ource
inv
e
rter
nee
ds
five
co
ntr
olled
power
s
witc
he
s
and
a
sin
gle
discrete
di
od
e
on
ly
,
to
gen
e
ra
te
a
five
-
le
vel
P
W
M
vo
lt
age
wav
e
f
or
m
with
non
in
su
la
te
d
dc
powe
r
sour
ces.
Nethe
rm
os
t
qu
a
ntit
y
of
co
ntr
olled
pow
e
r
sem
ic
on
duct
or
switc
he
s
needed
t
o
c
reate
thi
s
five
-
le
vel
V
S
I
ci
rc
uit
is
the
m
ai
n
featu
re
of
this
po
wer
in
ver
te
r
.
So
m
e
data
obt
ai
ned
by
us
i
ng
com
pu
te
r
sim
ulati
on
s
an
d
la
borato
ry
proto
ty
pe
te
st
ha
ve
co
nf
i
rm
ed
that
the
dev
el
op
e
d
in
ve
rter
ci
rc
u
it
s
w
orke
d
pro
duci
ng
a
five
-
le
vel
ou
t
pu
t
volt
age
wav
e
form
.
Usin
g
the
in
sta
ll
ed
lo
w
pass fil
te
r,
this
P
W
M
wavef
orm
w
as f
il
te
red
beco
m
e a sin
usoidal
vo
lt
a
ge wit
h
lo
we
r dist
or
ti
on.
REFERE
NCE
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urve
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-
Bridge
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-
Le
v
el
Pow
er
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le
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wer
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,
”
I
E
EE
Int
ernati
onal
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renc
e
on
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r
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iv
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ani
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arg
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-
Le
v
el
Vol
t
age
Source
Inve
r
te
r
with
Sinus
oi
dal
Puls
e
W
idt
h
Modulat
or
for
Medium
-
Volta
ge
Appli
ca
t
io
ns,”
IEEE
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ansacti
ons
on
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r
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t
ronics
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L
ai a
nd
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“
Multi
le
v
el
inve
rt
er:
a
surve
y
of
topo
logi
es
,
cont
rols,
and
ap
pli
c
at
ion
,
”
IEEE
Tr
ansacti
ons on Indus
trial
E
le
c
tronic
s
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vo
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738
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2.
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M.
F.
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nt
e
,
J.
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er,
an
d
A.
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nd
é,
“
Fly
ing
Cap
ac
i
t
or
Multi
l
eve
l
In
ver
te
rs
and
DT
C
Motor
Drive
Applic
a
ti
ons,”
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EE
E
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ansacti
o
ns on
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ronics
,
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809
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815
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M.
M.
Renge
an
d
H.
M.
Sur
y
aw
anshi,
“
Five
-
Le
v
el
Diode
Cl
amped
Inve
rt
er
to
Elim
ina
te
Com
m
on
Mode
Volta
ge
and
Reduce
dv/
dt
in
Medium
V
olt
ag
e
Rating
In
duct
ion
Motor
Drive
s,”
I
EE
E
Tr
ansacti
ons
on
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r
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cs
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B.
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in
ec
i
,
L.
M
.
Tol
b
e
rt
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J.
N.
Chi
a
son,
“
DC
-
AC
ca
sca
des
H
-
bridge
m
ult
il
evel
boost
inve
rt
er
with
no
induc
tors
for
el
e
ct
ri
c/
h
y
brid
elec
tri
c
v
ehi
c
le
ap
plications,”
I
EE
E
T
rans
act
ions
on
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i
cation
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963
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i,
F.
Z
ar
e,
A
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h,
an
d
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bj
erg
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“
A
Hy
br
id
Cas
c
ade
Conv
erter
T
opolog
y
with
Serie
s
-
Conne
ct
ed
S
y
m
m
et
ric
a
l
an
d
As
y
m
m
et
rical
Diode
-
Cla
m
ped
H
-
Bridge
Cel
ls,
”
IEE
E
Tr
ansacti
ons
on
Powe
r
El
e
ct
ronics
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an
d
Y.
Fam
il
ia
nt,
“
A
new
ca
sca
ded
m
ult
il
ev
el
H
-
bridge
Drive
,
”
IEE
E
Tr
ansacti
ons
on
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El
e
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d
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eg
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-
Pi
neda
,
"M
ult
ileve
l
Casc
ade
Inv
erter
with
Volta
g
e
and
Curre
nt
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put
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d
Us
ing
a
Pass
ivi
t
y
-
Based
Contro
ller",
Conf
ere
nc
e
Re
cord
of
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20
06
IEE
E
Industry
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ic
a
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ons Co
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ult
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u
ce
d
num
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it
che
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an
sacti
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Gim
enez,
“
A
new
sim
pli
fie
d
m
ult
il
evel
inve
rt
er
top
olog
y
for
DC
-
AC c
onver
sion
,
”
IE
EE Tr
ansacti
ons on
Pow
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E
le
c
tronic
s
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”
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ansacti
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ns on
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Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2502
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4752
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci,
Vo
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13
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2
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Fe
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019
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468
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a
nd
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“
C
om
pre
hensive
r
evi
ew
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a
re
c
ent
l
y
proposed
m
ult
il
evel
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te
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e
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o,
A.
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y
ar
to
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guchi
,
“
A
Diffe
ren
t
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-
Phase
Hy
br
id
Five
-
L
e
vel
Volta
g
e
-
Sou
rce
Inve
rt
er
Us
ing
DC
-
Volta
ge
Modules,
”
TEL
KOMNIKA
Tele
com
municat
ion
,
Computi
ng,
El
e
ct
ro
nic
s
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Control
,
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2014
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[19]
Suros
o,
A.
N.
Azis
and
T
.
Noguchi,
“
Five
-
l
evel
PW
M
inve
rte
r
with
A
Single
DC
Pow
er
Source
for
DC
-
AC
Pow
e
r
Conversion,
”
Int
ernati
onal
Journ
al
of
Powe
r
Elec
tronic
s and
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ive
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em
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l. 8,
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1212
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017.
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G.
C.
Raj
,
M.
K
al
i
amoorth
y
,
V.
Raj
ase
k
ara
n
and
R.
M.
Sekar
,
“
Single
-
Phase
Cas
ca
ded
Grid
Con
nec
t
ed
Multi
l
evel
Inve
rte
r
for
Int
e
rfa
ci
ng
Rene
wa
ble
En
erg
y
Sour
ce
s
W
it
h
Mic
ro
grid,
”
Journal
o
f
Solar
En
ergy
Engi
ne
ering
,
vo
l.
137,
p
p
.
1
-
10
,
2
014.
[21]
D.
Kart
hik
e
y
an
,
R.
Pal
ani
sam
y
,
K.
Vijay
a
kum
ar,
A.
Velu
and
D.
Selva
bh
ara
th
i,
“
Para
ll
el
Conne
ct
ed
VS
I
Inve
rt
e
r
Us
ing
Multi
-
Ca
rrie
r
Based
Si
nusoidal
PW
M
Te
chn
ique
,
”
TEL
KOMNIKA
Tele
communic
ati
on,
Computi
ng,
El
e
ct
ronics
and
Control
,
vo
l. 15, pp. 1625
-
1631,
2017.
[22]
Suros
o,
and
A.
N.
Aziz
,
"V
olt
ag
e
bal
an
ci
ng
c
ircuits
for
five
-
le
v
e
l
power
inve
rter
with
a
single
DC
volt
age
source
"
,
3rd
Inte
rnation
al
Confe
renc
e
o
n
Information
Technol
og
y,
Com
pute
r,
and
Elec
tric
al
Eng
ine
eri
ng
(
ICITACEE
),
pp.
147
-
150,
201
6.
BIOGR
AP
HI
ES OF
A
UTH
ORS
Suros
o
rec
ei
ved
the
B.
Eng
.
de
gre
e
in
el
e
ct
ri
cal
engi
ne
eri
ng
,
fr
om
Gadja
h
Mada
Univer
si
t
y
,
Indone
sia
in
20
01,
and
the
M.
Eng.
degr
e
e
i
n
elec
tr
ic
a
l
and
elec
tron
ic
s
en
gine
er
ing
from
Naga
oka
Unive
r
sit
y
of
Technol
og
y
,
Japa
n
in
2
008.
He
was
a
rese
arc
h
stude
nt
at
el
e
c
tr
ic
a
l
engi
ne
eri
ng
dep
art
m
ent
,
Tok
y
o
Univer
sit
y
,
Jap
a
n
from
2005
to
2
006.
He
ea
rne
d
t
he
Ph.D
degr
ee
in
ene
rg
y
and
en
vironment
engi
n
ee
ring
d
epa
rtme
nt,
Naga
ok
a
Uni
ver
sit
y
of
T
ec
hn
olog
y
,
Japa
n
in
2011.
He
was a
visit
ing
rese
arc
h
er
at
elec
tr
ical
a
nd
el
ectroni
c
s e
n
gine
er
ing
depa
rt
m
ent
,
Shizuoka
Univer
sit
y
,
Jap
a
n
from
2009
to
2011.
He
is
an
associa
t
e
profe
s
sor
at
dep
art
m
e
nt
of
elec
tri
c
al
engi
ne
eri
ng,
an
d
dea
n
of
fa
cul
t
y
of
engi
n
ee
r
in
g,
Jende
r
al
Soe
dirman
Univer
si
t
y
,
Purw
oker
to
,
Jawa
Te
ng
ah,
Indone
sia.
His
rese
ar
c
h
int
e
r
est
in
cl
udes
stat
i
c
power
con
ver
te
rs,
and
it
s
appl
i
ca
t
ion
in
re
newa
ble e
n
erg
y
conve
rsion
and distri
bute
d
powe
r
gene
r
ation.
Daru
Tri
Nugroho
rec
e
ive
d
ba
c
hel
or
(B.
Eng.
)
degr
ee
in
elec
tr
i
ca
l
eng
ineeri
ng
from
Instit
ute
Te
knologi
Sepul
uh
Novem
ber
,
S
ura
ba
y
a
,
Indone
sia
and
M.E
ng.
degr
ee
in
e
lectr
i
ca
l
eng
ine
er
ing
from
Univer
sitas
Indone
sia.
Cu
rre
ntly
He
is
a
le
c
ture
r
in
Elec
t
ric
a
l
Engi
n
ee
r
in
g
Depa
rtment
,
Jende
ral
Soedir
m
an
Univer
sit
y
.
His
rese
arc
h
int
ere
sts
are
po
wer
el
ectroni
cs
and
ren
ewa
bl
e
ene
rg
y
s
y
stem.
Abdulla
h
Nur
A
zi
z
was
born
in
1974.
He
rec
ei
v
ed
the
the
B.
Sc
.
and
M.Sc.
degr
e
es
in
el
ec
t
ronic
s
and
instrumentat
ion
from
Gadja
h
Mada
Univer
sit
y
in
1997
and
20
02,
respe
ct
iv
ely
.
He
ea
rn
ed
the
Ph.D
degr
e
e
in
elec
tron
ic
s
of
ph
y
sics
from
Instit
ut
Te
kno
logi
Bandung,
Indo
nesia
in
2011
.
Curre
ntly
he
is
an
assistant
profe
ss
or
in
Phy
sics
Depa
rtment,
Je
nder
al
Soedirma
n
Univer
sit
y
.
His re
sea
r
ch
in
terests a
re
e
lectr
on
ic
s a
nd
instrume
nta
ti
on
.
Tosh
ihi
ko
Nogu
chi
was
born
in
1959.
He
re
ceive
d
t
he
B.
En
g.
d
egr
ee
in
elec
tr
ical
e
ngine
er
ing
from
Nago
y
a
In
stit
ute
of
Techn
olog
y
,
Nago
y
a
,
Japa
n,
and
the
M.
Eng.
and
D.
Eng.
degr
ee
s
in
el
e
ct
ri
ca
l
and
el
e
ct
roni
cs
s
y
st
ems
engi
nee
r
in
g
from
Naga
o
ka
Univer
si
t
y
of
Technol
og
y
,
Naga
oka,
Japa
n
,
in
1982,
1986,
1996,
r
espe
c
t
iv
ely
.
In
1982,
he
joi
ned
Tosh
ib
a
Corpora
ti
on
,
Tok
y
o
,
Jap
an.
He
was
a
L
ectu
rer
a
t
Gifu
Na
tional
Col
le
ge
of
Te
chno
log
y
,
Gi
fu,
Japa
n
,
from
1991
to
1993
a
nd
a
Resea
r
ch
As
socia
te
in
e
lectr
i
ca
l
and
elec
t
ronic
s
s
y
stems
engi
ne
eri
ng
a
t
Naga
oka
Unive
rsit
y
o
f
Techno
log
y
from
1994
to
1995.
He
was
an
Associ
at
e
Profess
or
at
Naga
oka
Univer
sit
y
o
f
T
ec
hnol
og
y
from
1996
to
2009.
He
has
bee
n
a
Profess
or
at
Shizuoka
Univer
sit
y
sinc
e
2009.
His
rese
arc
h
in
te
rests
ar
e
stat
i
c
pow
er
conve
rt
ers
and
m
otor
drive
s.
Dr.
Noguchi
is
a
Mem
ber
of the
I
EE
-
Japa
n
and
a
Senior
Mem
ber
of
the IEEE.
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