TELKOM
NIKA Indonesia
n
Journal of
Electrical En
gineering
Vol. 14, No. 2, May 2015, pp. 215 ~ 22
1
DOI: 10.115
9
1
/telkomni
ka.
v
14i2.740
4
215
Re
cei
v
ed
Jan
uary 21, 201
5
;
Revi
sed Ap
ril 10, 2015; Accepted Ap
ril 24, 2015
An Approach of PFC in BLDC Motor Drives Using
BLSEPIC Conv
erter
Murugan M*,
Je
y
a
bharath R, Saranku
m
ar V
K.S. Rangasa
m
y
col
l
e
ge of T
e
chn
o
lo
g
y
,T
iruchen
go
de, Indi
a
*Corres
p
o
ndi
n
g
author, e-ma
i
l
: marimurug
a
n
81@
gmai
l.com
A
b
st
r
a
ct
T
h
is pap
er pre
s
ents the an
al
ysis and d
e
si
g
n
of
on front end br
id
gel
ess
singl
e-en
de
d pri
m
ary-
inductanc
e converter (BLSEPI
C) bas
ed
power factor rect
ification, with output vo
ltage r
e
gulatio
n and high
freque
ncy iso
l
a
t
ion w
o
rkin
g i
n
disco
ntinu
ous
cond
uctio
n
mo
de. T
he sw
itchi
ng l
o
ss in V
S
I is mini
mi
z
e
d
b
y
an
electro
n
ic
commutatio
n
of Brush
l
ess
DC
mot
o
r (BL
DCM) is
us
ed
to o
per
ate i
n
a
low
-
frequ
e
n
cy
oper
ation. T
o
i
m
pr
ove th
e eff
i
ciency, th
e d
i
ode
brid
ge r
e
c
t
ifier is re
plac
e
d
w
i
th the a
l
te
rnate br
id
gel
es
s
topol
ogi
es w
h
i
c
h offers less
cond
uctio
n
los
s
es, advis
ed
b
y
the inter
nati
ona
l pow
er
qu
ality stan
dar
ds
, a
w
i
de ran
ge of
spee
d contro
l i
s
obtain
ed w
i
th impr
ov
ed p
o
w
er quality BL
DC motor driv
e is pro
pose
d
an
d
simulat
ed in M
A
TLAB/SIMULINK.
Ke
y
w
ords
:
BL
DC motor, DC
M, pow
er factor corre
ction, bri
dge
less SEPIC
,
pow
er-qual
ity
Co
p
y
rig
h
t
©
2015 In
stitu
t
e o
f
Ad
van
ced
En
g
i
n
eerin
g and
Scien
ce. All
rig
h
t
s reser
ve
d
.
1. Introduc
tion
A Brushle
s
s DC moto
r (B
LDCM) po
ssesse
s
m
any advantag
es such a
s
high
efficien
cy,
silent o
p
e
r
ati
on, varie
d
sp
eed
ran
ge a
nd lo
w ma
i
n
tenan
ce
re
qui
reme
nts. It is a ki
nd
of three
pha
se syn
c
hronou
s motor with
p
e
rm
ane
nt
mag
nets
o
n
the
roto
r
a
nd trape
zoid
al ba
ck EMF
is
obtaine
d [1-4
]. It requires
a thre
e-pha
se voltage
so
urce inve
rter (VSI) to b
e
operated
as
an
electroni
c
co
mmutator ba
sed
on
the
rotor
po
sition
sign
als of th
e BL
DC obta
i
ned
usi
ng
Hall
Effect Senso
r
s. T
he th
ree
-
pha
se
VSI of the BL
DC drive i
s
fed
from
single
-
p
hase AC
mai
n
s
throug
h a di
ode b
r
idg
e
rectifier follo
wed by a sm
ootheni
ng DC capa
citor,
whi
c
h d
r
a
w
s an
uncontroll
ed
cha
r
gin
g
current for the
DC capa
cito
r
resultin
g in a
pulsed
curren
t. So, many powe
r
quality pro
b
le
ms a
r
ise such as
poo
r po
wer f
a
cto
r
, hi
gh Total
Ha
rmonic
Di
stort
i
on (T
HD) of
AC
mains curren
t and its hig
h
crest fa
cto
r
. Moreover
, t
here
a
r
e m
a
ny intern
ation
a
l PQ
stand
a
r
ds
such
as IEC
61000, IEEE 519
et
c
[5]. Whi
c
h emphasi
ze on
l
o
w harmoni
c
cont
ents and
near
unity PF current to be dra
w
n from A
C
mains by vari
ous lo
ad
s.
Therefore,
an
improve
d
po
wer quality
conver
te
r ba
sed d
r
ive is
al
most e
s
senti
a
l for the
BLDC [6]. Th
ere ha
s be
en
some effort
s for use of p
o
we
r facto
r
correctio
n
(PF
C
)
conve
r
ters for
the power q
u
a
lity enhan
ce
ment, however it use
s
,
a
two-stage PF
C drive
s
whi
c
h con
s
ist of
a
boo
st conve
r
ter fo
r PF
C
at
front-e
nd foll
o
w
ed
by
anoth
e
r DC
–
DC
converte
r
in
se
con
d
stage
fo
r
voltage reg
u
l
a
tion. At second sta
ge u
s
ually a fly
back o
r
a forwa
r
d converte
r
has b
een u
s
e
d
for
low po
we
r a
pplication an
d a full-bri
d
g
e
conve
r
ter f
o
r high
er p
o
w
er
appli
c
ati
ons [7]. A Single
Ended P
r
ima
r
y Indu
ctor
Converte
r (SE
P
IC), as a
si
ngle
stage P
F
C
conve
r
ter, is propo
se
d
for
Power Fac
t
or Correc
tion in a BLDC mot
o
r [16].
2. Proposed
Con
t
rol Sch
e
me for brid
gless PFC
Conv
erter
Bridgel
ess P
F
C to
pologi
e
s
a
r
e
currentl
y
gainin
g
i
n
tere
sts gen
era
lly, due to th
e
difficulty
of implement
ation and co
ntrol of bridg
e
less
PFC
converte
rs, bu
t a bridgele
s
s topolo
g
y can
redu
ce
co
nd
uction lo
sse
s
from
re
ctifying brid
ge
s with overall
system effi
cien
cy ca
n
be
increa
sed, wi
th a bridg
e
le
ss top
o
logy h
a
s t
he adva
n
t
age of THD decrea
s
in
g from input dio
de
redu
ction. T
h
e brid
gele
s
s
conve
r
ter
ci
rcuit sho
w
n
i
n
Figure 1 i
s
typically p
opul
a
r
for
brid
gele
ss
topologi
es, in
which the converte
r ope
rates sepa
rat
e
ly over posit
ive and neg
a
t
ive cycles. T
h
is
circuit i
s
si
m
p
le an
d ea
sy
to implem
en
t, theref
ore
there
are fe
wer limitation
s
to ch
oo
sing
the
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046
TELKOM
NI
KA
Vol. 14, No. 2, May 2015 : 215 – 221
216
main p
a
ssive
com
pon
ents.
This ci
rcuit
can b
e
a
dapte
d
into
a
singl
e-switch b
r
id
gele
s
s conve
r
ter,
whi
c
h ha
s lo
w co
ndu
ction
loss and requ
ires fe
we
r co
mpone
nts.
2.1. Po
w
e
r S
t
age Spe
c
ifi
cation
The po
wer
stage sp
ecification of the bridg
e
le
ss S
EPIC PFC converte
r, as sho
w
n in
Figure 1, is d
e
sig
ned
with followi
n
g
po
wer stag
e sp
ecification:
1)
Input voltage (
V
in
) :95 ~13
5
V RMS
at 60 Hz
2)
Output voltag
e (
V
o
) : 50 V
3)
Output po
wer (
P
0
) : 150
W
4)
Switchin
g fre
quen
cy (
F
s
) : 100 kHz
5)
Powe
r Facto
r
(PF) : > 0.95
2.2. Compon
ents Selec
t
i
ons
The co
mpo
n
e
n
ts we
re
sele
cted a
c
cordi
n
g to the following rational
e.
1)
Energy tran
sf
er ca
pa
citor
C
1
: 0.47
µ
F
2)
The two ind
u
c
tors current
ripple
stee
rin
g
effect depe
nds o
n
the C
1
capa
citan
c
e
3)
Output ca
pa
citor Co: 3mF
4)
The ma
gnitu
de of the
regulate
d
out
put voltage
ripple i
s
d
e
cided by the
C
2
cap
a
cit
a
nc
e.
5)
Input indu
ctor L
1
& output indu
ctor L
2
: 6
00µH
6)
The indu
cto
r
curre
n
t ripple
of is deci
ded
by the size of
the L
1
induct
ance.
Figure 1. Control schem
e of the
proposed Bridgel
ess
SEPIC converter
3. Modeling of Bridg
e
les
s
Sepic PFC Conv
erter
3.1. Bridgeless SEPIC Conv
erter Model
Single-ended primary
-
induc
t
or converter (SEPIC)
is
a type of DC-DC
c
o
nverter allowing
the ele
c
trical
voltage at its
output to be
greate
r
th
a
n
, less than, o
r
equal to th
at at its input; th
e
output of the SEPIC is
c
o
ntrolled by the duty c
y
c
l
e
of the c
o
ntrol trans
i
s
t
or. A SEPIC is
s
i
milar to
a traditional
buck- b
o
o
s
t conve
r
ter, bu
t has
advant
age
s of having non
-invert
ed output. The
amount of en
ergy exch
ang
ed
is controll
ed by swit
ch.
The single-switch bridgeless SEPIC PFC c
onvert
e
r has only one active switch that
makes the topology
simpl
e
, but
the m
odelling is complicated
wi
th the two inductors and two
cap
a
cito
rs. Fi
gure 2
(
a
)
and
(b) de
pict the
operatio
ns fo
r each cycl
e of the switch on-time a
nd the
swit
ch off-tim
e
in the po
siti
ve half cycle.
L
1
only con
d
u
cted d
u
ri
ng the po
sitive h
a
lf cycle, an
d
L
2
is left uncontrolled. Even thoug
h the de
sire
d se
n
s
ing
curre
n
t is th
e only cu
rren
t through
L
1
, the
actual
sen
s
in
g current i
s
t
he
sum
of cu
rre
nts flo
w
in
g
into L
1
and
L
2
. The
cu
rre
n
t flowin
g in
L
2
cre
a
tes a
n
un
desi
r
ed
ripple
of the sense
d
curre
n
t duri
ng po
sitive half line cycle.
Inducta
nces of
L
1
an
d L
2
sh
ould
be
sele
cted
with
co
nsi
deratio
n of the
s
e
ripple
s
.
Alternative di
fference of this topol
ogy is the unde
si
red ci
rculatin
g curre
n
t from the capa
ci
tive
cou
p
ling
loop
, as
sh
own i
n
Figu
re
2(a) and
(b
).
T
h
e
ci
rcul
ating
current
cau
s
e
s
p
o
wer l
o
ss but
doe
s not sign
ificantly affects the
total effi
cien
cy, so, in this it will not
be con
s
id
ere
d
. Although the
two features mentione
d above a
ffect
the system
performan
ce, thus the
effects a
r
e
not
signifi
cantly impact the mo
del of the system. Thus
, the input and o
u
tput voltage is co
nsid
ered
to
be con
s
tant
voltages
due
to the exploration
of the small
-
sign
al linea
r mo
del which
was
perfo
rmed
while a
s
sumin
g
a q
u
a
s
i-sta
t
ic conditi
on,
becau
se the
swit
chin
g fre
quen
cy is m
u
ch
highe
r than th
e line frequ
en
cy.
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TELKOM
NIKA
ISSN:
2302-4
046
An Approac
h
of PFC in BLDC Motor Driv
es
Us
ing BLSEPIC Converter
(Murugan M)
217
Figure
2(a). Bridgel
ess SEPIC PFC Converter
(
s
w
i
tc
h-
on
)
Figure 2(b). Bridgel
ess SEPIC PFC Converter
(switc
h-off)
3.2. S
w
i
t
c
h
o
n
Stage of S
EPIC Conv
erter
The Figu
re 3
sho
w
s the o
n
-time dia
g
ra
m for swit
ch
S
1
, for whic
h s
w
itch S
1
is on, and
diode D
1
i
s
off. The input
side i
nductor L
1
is
cha
r
g
e
d
from th
e in
put voltage i
n
this
stag
e, the
cha
r
ge
d C
1
transfe
rs en
erg
y
into the out
put sid
e
in
du
ct
or
Lo, an
d
Lo is chargin
g
in thi
s
sta
g
e
. In
addition, the l
oad
cu
rre
nt comes from th
e ch
arged
ou
tput cap
a
cito
r Co. Ba
sed
o
n
the in
duct
o
r
volt-se
c
on
d b
a
lan
c
e an
d the cap
a
cito
r charg
e
bala
n
ce is obtain
ed.
Figure 3. Operation of the
SEPI
C Converter S
w
itc
h
On-Stage
The voltage a
c
ro
ss L
1
and i
t
s input voltage Vin are
sa
me.
The voltage a
c
ro
ss Lo an
d the voltage a
c
ro
ss capa
citor, C
1
.are s
a
me.
The cu
rrent throu
gh C
1
an
d the cu
rre
nt throug
h indu
ctor L
2
are sa
me.
The cu
rrent throu
gh C
2
an
d the load current is the
sa
me.
3.3. S
w
i
t
ch-Off stage of
SEPIC Converter
The Figu
re 4
sho
w
s the o
ff-state diag
ram for switch
S1, in which
switch S1 is off and
the diode
D1
is on. Indu
ct
or L1
cha
r
g
e
s
the c
apa
cit
o
r C1 and
provides the l
o
ad cu
rrent. T
h
e
Inducto
r L2 i
s
co
nne
cted
and the outp
u
t capa
citor
Co get charg
ed whi
c
h p
r
o
v
ides the loa
d
curre
n
t are o
b
tained a
c
cording to the volt-se
c
bala
n
ce and the cap
a
citor
cha
r
g
e
balan
ce.
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046
TELKOM
NI
KA
Vol. 14, No. 2, May 2015 : 215 – 221
218
Figure 4. Operation of the
SEPI
C Converter S
w
itc
h
Off-Stage
The voltage a
c
ro
ss L1 an
d the input voltage are sa
me
as the Vin.
The voltage a
c
ro
ss Lo an
d the voltage a
c
ro
ss capa
citor C
1
are sa
m
e
.
The cu
rrent throu
gh C
1
an
d the cu
rre
nt throug
h indu
ctor L
2
are sa
me.
The current t
h
rou
gh
Co a
nd the curre
n
ts thro
ugh
both indu
cto
r
s an
d the cu
rre
nt of the load
sub
s
trate.
A stabilized
system i
s
not
easy to achi
eve
with a
second resonanc
e point due to the
signifi
cant hi
gh quality-fa
ctor of it. The un-dam
ped
resona
nce causes o
scill
a
t
ions in the input
curre
n
t with t
he same f
r
eq
uen
cy of the
se
con
d
reson
ance poi
nt. The o
scill
ating
cu
rre
nt ma
kes
the system u
n
stabl
e.
4. Simulation Resul
t
The p
r
op
ose
d
BLDCM
drive is mo
dell
ed in M
a
tlab
- Simulin
k e
n
vironm
ent a
nd its
perfo
rman
ce
is eval
uated
with lo
ad
The
DC lin
k volt
a
ge i
s
kept
co
nstant
at 40
0
V with
an
in
put
AC RMS voltage of 225V. The
components of SEPIC co
nverter are select
ed
on the basi
s of
power q
uality con
s
trai
nts a
t
supply main
s and
allo
wa
ble rip
p
le in
DC-lin
k volta
ge as
discu
s
sed
as sho
w
n in
Figure 5.
Figure 5. Simulation Di
agram
of the Pro
posed Ci
rcuit
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TELKOM
NIKA
ISSN:
2302-4
046
An Approac
h
of PFC in BLDC Motor Driv
es
Us
ing BLSEPIC Converter
(Murugan M)
219
Figure 6. Source voltag
e a
nd so
urce current of
a BLDCM drive rep
r
ese
n
ting unit
y power fa
cto
r
at peak
sou
r
ce voltage of 240V
The
cont
rolle
r gai
ns are
tuned to
get
the
de
si
red
power quali
t
y param
eters. The
perfo
rman
ce
evaluation
is
made
on
the
ba
sis of
va
ri
ous po
we
r
q
uality pa
rame
ters i.e. T
H
D of
c
u
rr
en
t (
T
HD %)
a
t
in
pu
t
AC
ma
in
s,
po
wer fa
ctor an
d inp
u
t AC
current
(Is).
Fi
gure
6
sho
w
s the
curre
n
t (I) waveform
at in
put AC main
s i
s
in
ph
ase
with th
e
sup
p
ly voltage
(Vs)
re
pre
s
e
n
ting
nearly unity
power fa
ctor.
The wavefo
rms of po
we
r
factor of BL
DC motor d
r
iv
e are
sho
w
n
in
Figure 7.
Figure 7. Power fa
ctor of the BLDC mot
o
r at
pea
k so
urce
voltage of 24
0V
Figure 8. Tra
pezoidal ba
ck emf of the BLDC
motor
Figure 8-10
show va
riation
of
cu
rre
nt a
nd its T
H
D at
AC main
s
wi
th AC input v
o
ltage.
The total ha
rmonic
disto
r
tions of AC m
a
ins
cu
rre
nt is ob
se
rved
well bel
o
w 5
%
in most of the
ca
se
s a
n
d
sa
tisfies th
e i
n
ternatio
nal
sta
ndards alo
n
g
with
ne
arly
unity PF in
wide
ran
ge
of
AC
input voltage.
Figure 9. FFT
analysi
s
of a BLDCM dr
ive
at peak source voltage of
240V
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046
TELKOM
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KA
Vol. 14, No. 2, May 2015 : 215 – 221
220
Figure 10. Performa
nce of the PMBLDCM
drive at pe
ak source vol
t
age of 240V
Table 1. PQ Paramete
rs o
f
a BLDCM
at
Variable Input AC Voltage
(Vs) (Is)
RPM
(THD %
)
(PF)
300 3.714
1354
1.94
0.9991
270 3.333
1220
1.71
0.9989
209 1.049
1030
1.30
0.9988
178 2.225
970
1.14
0.9987
120 1.486
690
0.98
0.9984
88 1.114
560
0.90
0.9982
56 0.723
381
1.24
0.9980
30 0.371
230
0.96
0.9985
The
perfo
rma
n
ce
of the
p
r
opo
sed
BLDC m
o
tor
driv
e is evalu
a
te
d un
der varyi
n
g in
put
AC voltage to
demon
strate
the effective
ness of the
propo
sed i
n
various
pra
c
tical
situation
s
a
s
in
Table 1.
5. Conclusio
n
The Power quality of the
BL
DC motor
drive had improved
us
ing SEPIC c
o
nverter with
the utilization of MATLAB
Simulink
software. T
he P
F
C converter has en
sured reasonable
high
power fa
ctor
clo
s
e to u
n
ity in wid
e
ra
ng
e of input volt
age. The
pa
rameters
sho
w
n in th
e Fig
u
re 6
to
Figu
re1
0
repre
s
e
n
ts an
improved po
wer
qu
a
lity, smooth
spe
e
d
co
ntrol
of th
e BL
DCM
d
r
i
v
e
.
The THD of AC main
s cu
rrent is withi
n
spe
c
if
ied limit
s of internatio
nal norms. T
he perfo
rma
n
c
e
of the d
r
ive i
s
ve
ry goo
d
in the
wid
e
range
of
in
pu
t AC voltage
with
de
sire
d
po
wer qu
ality
para
m
eters At input
sup
p
ly voltage
and
wide
ra
nge
of
sp
eed
is e
n
sured
rea
s
on
a
b
le hi
gh
po
wer
factor cl
ose t
o
unity
with P
F
C
co
nverte
r. The
in
ternati
onal
stan
dard
of T
H
D for A
C
m
a
in
cu
rre
n
t
is sati
sfied a
s
5% in most of the case
s in
BLDC m
o
tor drive. M
o
reove
r
an i
m
prove
d
po
wer
quality with l
e
ss torque
ri
pple, smooth
spe
ed
cont
rol of the BL
DC moto
r d
r
ive whi
c
h
sh
o
w
n by
perfo
rman
ce para
m
eters.
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ipo
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