TELKOM
NIKA Indonesia
n
Journal of
Electrical En
gineering
Vol. 14, No. 1, April 2015, pp. 103 ~ 1
0
9
DOI: 10.115
9
1
/telkomni
ka.
v
14i1.746
9
103
Re
cei
v
ed
Jan
uary 5, 2015;
Re
vised Ma
rc
h 3, 2015; Accepte
d
March
20, 2015
Scaling Model for Silicon Germanium Heterojunction
Bipolar Transistors
Engelin Shintade
w
i
Julian*, Rud
y
S
.
Wahjudi
Electrical E
ngi
neer
ing D
e
p
a
rtment,
T
r
isakti Univers
i
t
y
,
Jl. Kiai T
apa No. 1 Jakarta Ba
rat Indones
ia 1
141
0,
*Corres
p
o
ndi
n
g
author, e-ma
i
l
: eshinta
d
e
w
i
j
@
yah
oo.com
A
b
st
r
a
ct
In the
past h
a
lf
-century, scal
i
n
g
h
a
s b
een
us
ed
to i
m
prov
e semico
nductor
devic
es
p
e
rfor
ma
nce
.
In this pap
er, w
e
study the effects of scalin
g o
n
SiGe(C) heter
oju
n
c
tion bi
po
lar transistors (HB
T
s)
perfor
m
a
n
ces i
.
e. cutoff frequency (f
T
), maxi
mu
m fre
que
nc
y of oscillati
on
(f
ma
x
) and g
a
t
e
del
ay (
τ
g
). T
he
SiGe HBT
sc
al
ing
mod
e
ls
are
dev
elo
p
e
d
fro
m
more t
han
tw
enty years
a
ccumul
a
ted r
e
ported
d
a
ta. T
h
e
results sh
ow
that the p
eak c
u
toff freque
ncy
show
s an
i
n
cr
easi
ng tren
d w
i
th e
m
itter w
i
dt
h scali
ng w
i
th
a
factor of ~
W
E
-
0
.
719
,
the pe
ak
maxi
mu
m fre
que
ncy of osci
ll
atio
n
show
s a
n
i
n
c
r
easi
ng tre
nd
w
i
th emitter w
i
dth
scalin
g w
i
th a
factor of ~
W
E
-
0
.723
and the g
a
t
e del
ay sh
ow
s a d
e
creas
in
g
trend w
i
th e
m
itter w
i
dth scal
i
n
g
with a factor of
~W
E
0.7
7
8
.
Ke
y
w
ords
: HBT, SiGe, scaling, m
o
del
Copy
right
©
2015 In
stitu
t
e o
f
Ad
van
ced
En
g
i
n
eerin
g and
Scien
ce. All
rig
h
t
s reser
ve
d
1. Introduc
tion
Semico
ndu
ct
or device
s
ha
ve
co
ntinuo
u
s
ly
be
en
scal
ed d
o
wn in
si
ze
over the
p
a
st fe
w
decade
s. Smaller devi
c
e
s
are n
eede
d for several
re
aso
n
s. Th
e m
a
in re
ason to make tran
sist
ors
smalle
r i
s
to
add m
o
re
de
vices i
n
a
given chip
are
a
. This re
sult
s i
n
chi
p
s with
more fu
nctio
n
ality
in a
smalle
r
area. Sm
aller ICs
allo
w m
o
re
chi
p
s
pe
r wafe
r, re
du
cing the
chi
p
price. It is al
so
expecte
d that
small
e
r d
e
vice
s ha
s b
e
tter pe
rform
a
n
c
e. The n
u
mb
er of tran
sist
ors pe
r chip
has
been
dou
bled
every 2 yea
r
s an
d was fi
rst ob
se
rbed
b
y
Gord
on Mo
ore in
196
5 a
nd is
co
mmo
nly
reffere
d a
s
Moore’s l
a
w.
For
exampl
e
,
the num
ber of tran
si
stors in
Intel
microp
ro
ce
ssors ha
s
doubl
ed
every 26 m
onth
s
. The
40
04
proce
s
sor in
tro
duced i
n
1
9
7
1
ha
s 230
0 t
r
an
sisto
r
s
while
the Xeon pro
c
e
s
sor introd
uce
d
in 200
7 has 8
20 millio
n transi
s
to
rs [
1
].
Figure 1
and
2 sho
w
the
perfo
rma
n
ce
trend
s of Si
-ba
s
ed
bip
o
lar transi
s
to
rs, which
inclu
de SiGe
and SiGe
C
HBTs. Th
e d
a
ta points
are accum
u
late
d for more th
an two d
e
ca
des
sin
c
e
early
1
980
s to
200
0s [2]. T
he
cutoff fre
que
ncy trend
in
Figu
re
1
sh
ows that i
n
t
w
o
decade
s, the
cutoff frequ
e
n
cy i
s
in
crea
sed
by a
fa
ctor
of 30, f
r
o
m
le
ss than
10 G
H
z to
m
o
re
than 35
0 G
H
z. The
tren
d
of the gate
d
e
lay in Fi
gur
e
2 sho
w
s that
over th
e pa
st
two d
e
cade
s the
gate d
e
lay ha
s b
een
re
du
ced by
a facto
r
of 1/2
5
, fro
m
more tha
n
100
ps to le
ss tha
n
4
ps.
The
Si-ba
s
ed bip
o
lar tra
n
si
stors are
suitabl
e
for RF
and
mixed-sign
al appli
c
ation
s
, whi
c
h nee
d h
i
gh
device
spe
e
d
but do not
requi
re devi
c
e de
nsity a
s
high a
s
th
e digital appl
ication
s
.
The
s
e
perfo
rman
ce
trend
s a
r
e
the evident
result
s of co
nstant im
pro
v
ement effort
s, ultimately
by
vertical an
d lateral scali
n
g
,
suppo
rted b
y
material an
d stru
ctural in
novation
s
.
Over the p
a
st half-cent
ury, scali
ng
has
be
en
the key to the improv
ement of
semi
con
d
u
c
tor d
e
vice
pe
rf
orma
nce. Scaling
has work
ed
for
all typ
e
s
of tran
si
stors,
incl
udin
g
the
SiGe dan Si
GeC h
e
teroju
nction bi
pola
r
transi
s
tors
(HBTs). SiGe
HBTs h
a
ve SiGe as th
e b
a
se
material
whi
c
h have small
e
r ban
dga
p than that
of Si. The SiGe base give
s
new d
egree
s o
f
freedo
m for the desi
gn of SiGe HBTs a
nd allows
mu
ch high
er val
ues of cutoff freque
ncy to be
achi
eved tha
n
in conventi
onal sili
con
BJTs. T
he i
m
provem
ent in SiGe HBTs perfo
rma
n
ce is
sho
w
n by the
repo
rted SiG
e
HBTs
with cutoff frequ
en
cy excee
d
ing
350 G
H
z [3].
Scaling
rule
s are de
sign rules
whi
c
h m
u
st be follo
wed while
scali
ng do
wn geo
metry of
s
e
mic
o
nd
uc
to
r
d
e
v
ic
e
s
an
d
in
te
rc
o
nne
c
t
lin
es
. Th
ey provide d
e
vice de
sig
n
param
eters
and
perfo
rman
ce
paramete
r
s for a given saling
fa
ctor based o
n
certai
n re
quire
ment
s and
con
s
trai
nts.
Scaling
rule
s for CMOS d
e
vi
ce
s have
been exten
s
i
v
ely develop
ed and
used
as a
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046
TELKOM
NI
KA
Vol. 14, No. 1, April 2015 : 103 – 10
9
104
tool for
CM
O
S
perfo
rma
n
ce imp
r
oveme
n
t. Even thou
gh scaling rul
e
s
fo
r
bi
pola
r
transi
s
to
rs
ha
ve
not been ext
ensively u
s
e
d
in bipola
r
tran
sisto
r
pe
rf
orma
nce imp
r
oveme
n
t, there h
a
ve be
en
several efforts to develop
ed scaling ru
les for
bipol
a
r
transi
s
to
r i.e. by Solomon and Tang [
4
],
Bellaoua
r, Ro
sseel and
Ra
je
[3].
While
t
here a
r
e rul
e
s to estimate the gate dela
y
, as far as our
kno
w
le
dge th
ere a
r
e no d
i
rect
scaling
rule
s to esti
mate the cut
o
ff frequen
cy
and maxim
u
m
freque
ncy of oscillation. In this work, the sc
aling mo
dels to estim
a
te the cutoff frequen
cy (f
T
),
maximum fre
quen
cy of oscillation (f
max
) and gate de
lay (
τ
g
) for SiGe(C)-hete
r
oj
unctio
n
bipol
ar
transi
s
to
rs i
s
develop
ed ba
sed o
n
publi
s
hed data ove
r
the span of o
f
two deca
d
e
s
.
Figure 1. The
trend of cutof
f
frequen
cy (f
T
) fo
r
Si-bas
ed trans
is
tors
[3]
Figure 2. The
trend of gate
delay (
τ
g
) for
Si-
based tran
si
stors [3]
2. State o
f
th
e Art o
f
Bipo
lar Transis
t
o
r
Scaling Rules and Scali
ng Model De
v
e
lopment
2.1. State o
f
the Ar
t Bipol
ar Transis
t
or
Scaling Rules
A theory for
scalin
g bipol
ar transi
s
to
rs fo
r
ECL
circuit
s
has b
een
de
veloped by S
o
lomon
and Ta
ng
sin
c
e 19
79 a
nd
is shown in T
able 1 [4]. Th
e
basi
c
con
c
ept in this
scaling theo
ry is to
redu
ce the d
o
minant re
si
stance a
nd ca
pacita
n
ce
co
mpone
nts in
a coo
r
din
a
ted
manne
r so that
the domina
n
t delay comp
o
nents a
r
e red
u
ce
d pro
p
o
r
tionally as the
hori
z
ontal di
mensi
o
n
s
of the
transi
s
to
r are
scaled d
o
wn
. In this way, if a trans
i
s
to
r is optinli
zed f
o
r a give
n ci
rcuit de
sign
p
o
int
before
scalin
g, the transi
s
t
o
r rem
a
in
s m
o
re o
r
less op
timized after
scaling.
Table 1. Solo
mon and T
a
n
g
scaling rule
s
Parameter Scaling
Rules
Feature
size or emitter-stripe
w
i
dt
h W
E
1/
κ
Base doping N
B
κ
1.6
Base w
i
dth W
B
1/
κ
0.8
Collector doping
N
C
κ
2
Collector current
density
J
C
κ
2
Gate dela
y
τ
g
1/
κ
Scaling fa
ctor
κ
> 1
The othe
rs bi
polar tran
sist
or scalin
g ru
l
e
s have b
e
e
n
develop
ed
by Bellaoua
r, Rosse
e
l
and
Raj
e
, ho
wever de
spit
e the
differe
n
t
con
s
traints
and
app
roa
c
hes a
s
sumed
,
overall
tren
ds
sug
g
e
s
ted b
u
these
scalin
g rul
e
s fo
r
ke
y bipola
r
pa
rameters a
r
e
not sig
n
ifica
n
tly far apa
rt [3].
For exam
ple,
when
emitter stripe
width i
s
scale
d
by 1
/
κ
, the gate d
e
lay is expe
ct
ed to de
cre
a
se
by 1/
κ
.
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TELKOM
NIKA
ISSN:
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046
Scaling M
odel for Silicon Germ
anium
Heterojunc
tion B
i
polar… (Engelin Shintadewi Juli
an)
105
2.2. Data
Col
l
ection and
Mathem
atica
l
Model Dev
e
lopment
Before the
scalin
g mod
e
l
s
for SiG
e
(C) HBT
s
a
r
e
develop
ed, the rel
a
tion o
f
lateral
emitter width
W
E
to the
cutoff frequenc
y
(f
T
), maxi
mum
frequency
of oscillati
on (f
max
) and
gate
delay (
τ
g
) d
a
ta are
colle
cte
d
from secon
dary source
s,
i.e. from pub
lishe
d pap
ers over the spa
n
of two deca
d
e
s, from 198
9 – 2010 [5] – [67]. The scaling mod
e
ls
are a
s
sumed
to have a simple
power eq
uati
on, for examp
l
e the cutoff freque
ncy (f
T
)
B
E
T
AW
f
(
1
)
Linea
rization
of Equation (1) yields:
E
T
W
B
A
f
log
log
log
(
2
)
Lea
st squ
a
re
linear
reg
r
e
s
sion is then a
p
p
lied for fitting the best lin
e to data, and
yields:
i
T
i
E
f
B
W
A
n
,
,
log
log
log
(
3
)
i
T
i
E
i
E
i
E
f
ogW
l
B
W
A
W
,
,
2
,
,
log
log
log
log
(
4
)
3. Results a
nd Analy
s
is
The correlati
on between t
he pea
k
cuto
ff frequen
cie
s
(f
T
) a
nd emit
ter strip
e
wi
dths (W
E
)
are p
r
e
s
ente
d
in Figure 3, whi
c
h sho
w
s
compil
ed pu
b
lishe
d data o
b
tained fro
m
SiGe and SiG
e
C
HBTs
over th
e past two d
e
ca
de
s. The
pea
k cu
toff freque
ncy sho
w
s a
n
in
cre
a
s
ing trend
wi
th
emitter width scaling, with a
facto
r
of ~WE
-0.719
. It should b
e
n
o
te
d, though, th
at the data
p
o
ints
in the
plot a
r
e spread
an
d the
co
rrela
t
ion facto
r
(R
2
) is 0.49,
which
mea
n
s t
here
a
r
e
stro
ng
relation
shi
p
b
eetwe
n f
T
and
W
E
.
Figure 4
sh
o
w
s the trend
of pea
k m
a
ximum fre
que
n
c
y of o
scill
ation f
max
over the emitte
r
width, with co
rrel
a
tion facto
r
(R
2
) 0.58, which i
s
better
correl
ated tha
n
the cutoff freque
ncy tren
d.
A scalin
g fact
or of ~W
E
-0.72
3
is extracted
,
which i
s
si
milar to cutof
f
frequen
cy trend. Co
ntra
ry to
our expe
ctation
b
a
se
o
n
our previou
s
re
su
lts [69], the p
e
a
k
cu
toff frequen
cy and th
e p
eak
maximum fre
quen
cy of oscillation h
a
ve simila
r increa
sing tre
nd wit
h
emitter widt
h scaling.
The correlati
on between t
he gate d
e
la
y and em
itter width are prese
n
ted in Fi
gure
5,
whi
c
h exhibit
s
a de
cre
a
si
n
g
trend with
emi
tter width
scaling, with
a factor of ~W
E
0.7782
and the
correl
ation fa
ctor i
s
0.58.
The trend
is l
o
we
r tha
n
ex
pecte
d fro
m
scaling
rul
e
s
i.e. 1/
κ
, however
the trend is
sl
ightly higher t
han compa
r
e
d
to Rieh with
~W
E
0.725
[3].
Figure 3. Scaling tren
d for peak
cutoff freque
ncy (f
T
);
Tren
d equ
ations ove
r
W
E
are al
so sho
w
n,
along
with co
rrel
a
tion facto
r
R
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046
TELKOM
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Vol. 14, No. 1, April 2015 : 103 – 10
9
106
Figure 4. Scaling tren
d for peak ma
xim
u
m frequ
en
cy of oscillatio
n
f
ma
x
Figure 4. Sca
ling trend fo
r the gate del
ay
τ
g
4. Conclusio
n
1)
It is sho
w
n th
at lateral
scal
ing h
a
s ben
e
f
icial effe
cts
on d
e
vice
pe
rforma
nces such
as cutoff freq
uen
cy, maximum frequ
en
cy of oscill
ation and g
a
te d
e
lay.
2)
The pea
k cutoff frequen
cy sho
w
s an in
crea
sing trend
with emitter width scali
ng
with
a factor of ~W
E
-0.719
.
3)
The
pea
k
ma
ximum fre
que
ncy of
o
scillat
i
on
sho
w
s a
n
incre
a
si
ng t
r
end
with
emit
ter
width scali
ng
with a facto
r
of ~W
E
-0.723
.
4)
The gate d
e
l
a
y sho
w
s
a d
e
crea
sing tre
nd with
emitt
e
r wi
dth scali
ng with a fa
ctor of
~W
E
0.778
.
Referen
ces
[1] Intel
Corporation.
Micropr
o
cessor Quic
k Reference Gui
de. w
w
w
.
i
n
tel.c
o
m/p
r
essroom/kits/
quickr
effam.htm. 2010.
[2]
Rieh JS, Gre
e
nber
g D, Stric
k
er A, F
r
eema
n
G.
Scalin
g o
f
SiGe Hetero
j
unctio
n
Bip
o
l
a
r
T
r
ansistors
.
Proc. of the IEEE. 2007; 93(
9
)
: 1522-1
5
3
8
.
[3]
Rieh
JS, Ja
ga
nnath
an
B, Ch
en H, Sc
ho
ne
nber
g KT
, A
ngell
D, Ch
inth
ak
ain
d
i A, F
l
orke
y J, Go
lan
F
,
Greenb
erg D,
Jeng SJ, Khat
er M, Pagette F
,
Schnabe
l C
,
Smith P, Stri
cker A, Vaed
K, Volant R,
Ahlgr
en D, F
r
eeman G, Stein
K, Subban
na
S.
SiGe HBT
s
w
i
th Cut-off F
r
equ
ency of 35
0 GH
z
. IEDM
T
e
ch. Digest. 2002: 77
1–
77
4.
[4]
Solom
on PM, T
ang DD.
Bipol
ar circuit scali
n
g
. Dig. Int. Solid-State Circuits Conf. 1979: 86-87.
[5]
Crabbe EF, Patton GL, Stork JMC,
Comfort JH, Me
yerson
BS, Sun JYC.
Low
temperatu
r
e op
eratio
n
of Si and SiGe
bip
o
lar trans
istors
. IEDM
T
e
c
h
. Dig. 1990: 17-20.
[6]
Comfort JH, Patton GL, Cressler JD, Lee W
,
Cr
abb
e EF
, Me
yerso
n
BS,
Sun JYC, Stor
k JMC, Lu PF
,
Burgh
a
rtz JN, Warnock J, Sc
illa G, T
oh KY,
D’Ag
o
stino M,
Stanis C, Je
n
k
ins K.
Profil
e lever
age in
self-ali
gn
ed e
p
i
t
axial Si or SiG
e
base b
i
p
o
lar
techno
lo
gy
. IEDM T
e
ch. Digest. 1990: 21-2
4
.
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
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ISSN:
2302-4
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Scaling M
odel for Silicon Germ
anium
Heterojunc
tion B
i
polar… (Engelin Shintadewi Juli
an)
107
[7] Burghartz
JN,
Comfort
JH, P
a
tton GL, Cr
es
sler JD, M
e
yer
s
on BS, St
ork
JMC, Sun
JY-
C
, Scill
a G,
W
a
rnock J, Gi
nsber
g BJ, Je
nkins
K, T
oh KY, Haram
e
D
L
, Mad
e
r SR.
S
ub-3
0
ps
EC
L
circuits us
i
n
g
hig
h
-f Si and Si
Ge epitaxi
al b
a
s
e SEEW transistors
. IEDM
T
e
ch. Dig
est. 19
90: 297-
30
0.
[8]
Comfort JH,
C
r
abb
e EF
, Cr
e
ssler JD,
Le
e
W
,
S
un JYC,
Malino
w
ski J,
D’Agostino M,
Burghartz JN,
Stork JMC, Me
yers
on BS.
S
i
n
g
le crysta
l
e
m
it
ter gap
for e
p
it
axial
Si- a
nd S
i
Gebas
e trans
i
s
tors
. IEDM
T
e
ch. Digest.1991: 85
7–
86
0.
[9]
Pruijmboom A,
T
e
rpstra D, T
i
mmering
CE, de B
oer W
B
, T
h
eun
issen MJJ,
Slotbo
om JW
, Hueti
ng RJE,
and H
a
g
e
raats
JJEW
.
Selective-ep
itaxia
l ba
se techn
o
lo
gy
w
i
th 14 ps EC
L gate d
e
l
a
y, for low
pow
er
w
i
de-ba
nd co
mmu
n
ic
ation sys
tems.
IEDM T
e
ch. Digest. 19
9
5
: 747–
75
0.
[10]
Crab
be EF
, M
e
yerso
n
BS, St
ork JMC, H
a
ra
me DL.
Vertica
l
profi
l
e
opti
m
i
z
atio
n
of very
h
i
gh fre
que
ncy
epitax
i
al Si a
n
d
SiGe-base b
i
p
o
lar trans
istors
. IEDM
T
e
ch.
Digest. 19
93: 8
3–8
6.
[11]
Naroz
n
y P, D
a
mbkes
H, Ki
bbe
l H, Kas
p
e
r
E. Si/SiGe
hetero
j
uncti
on
bip
o
lar
transi
s
tor made
b
y
molec
u
lar-
beam epitaxy
.
IEEE Trans. Electron Dev
i
ces
, 19
89; 36(1
0
): 236
3–2
36
6.
[12]
F
i
scher SE, C
o
ok RK, Kn
ep
pe
r RW
, Lan
ge
R
C
,
Numm
y K,
Ahlgr
en
DC, R
e
vitz M, Me
yer
s
on BS.
A 45
GH
z
strain
ed l
a
yer SiGe het
eroj
unctio
n
bi
p
o
lar trans
ist
e
r fabricate
d
w
i
th
low
temperat
ure ep
itaxy
.
IEDM
T
e
ch. Digest. 198
9: 89
0-89
2.
[13]
Patton GL, Comfort JH, Meyserson BS, Crabb
e
EF, Scilla GJ, Fresart
ED, Stork JMC, Sun JYC
,
Harame DL,
Burghartz JN.
75-GHz ft Si
Ge-base
heter
oju
n
ction
bi
po
l
a
r transistor.
I
EEE Electro
n
Device Lett.
19
90; 11(4): 1
71-
173.
[14]
Cressler JD, C
o
mfort JH, Crabbe EF
, Patton GL
, Lee W
,
Sun JYC, Stork JMC, and Me
yerso
n
BS.
Sub-3
0
-ps EC
L circuit oper
at
ion at liq
ui
d-nit
r
oge
n te
mpera
t
ure usin
g self-
a
lig
ne
d epit
a
xi
al SiGe-b
ase
bipolar transistors.
IEEE Electron Dev
i
ce Lett
.
1991; 12(
4): 166-1
68.
[15]
Crab
be EF
, Comfort JH, Lee
W
,
Cressler JD,
Me
yerson B
S
, Megda
nis C
,
Sun JYC, Stork JMC. 73
-
GHz self-alig
n
ed SiGe-b
ase
bipol
ar transi
s
tors
w
i
th p
h
o
s
phor
us-do
p
e
d
pol
ysil
ico
n
emitters.
IEEE
Electron D
e
vic
e
Lett.
1992; 1
3
(5): 259-
26
1.
[16]
Gruhle A, Kibb
el H, Koni
g U, Erben U, Kasp
er E. MBEgrow
n
S
i
/SiGe HB
T
s
w
i
th hi
gh
β
, f
T
, and f
ma
x
.
IEEE Electron Device
Lett.
19
92; 13(4): 2
06–
208.
[17]
Crab
be EF, C
o
mfort JH, Cre
ssler JD, S
u
n
JYC,
Stork JM
C. Hig
h-lo
w
p
o
l
y
s
ilic
on-em
itte
r SiGe-b
ase
bipolar transistors.
IEEE Electron Dev
i
ce Lett
. 1993; 14(
10): 478-
480.
[18]
Kasper E, Gru
h
le A, Ki
bbe
l H
.
High sp
ee
d S
i
Ge-HBT
w
i
th very low
bas
e sheet res
i
stivity
. IEDM
T
e
ch.
Digest. 19
93: 7
9–8
1.
[19]
Harame
DL, St
ork JMC, Me
ye
rson BS, Hsu
KYJ, Cotte
J, Jenkins KA, Cressler JD, Restle P, Crabbe
EF
, Subba
nna
S, T
i
ce
T
E
, Scharf BW
, Yasaitis JA,
Optimi
z
a
t
i
on of SiGe HB
T technology for hi
gh
spee
d an
alo
g
and
mix
ed-si
gn
al ap
plic
atio
ns
. IEDM
T
e
ch. Digest. 199
3: 71
–74.
[20]
Burgh
a
rtz JN,
Jenki
n
s KA, Grutzmacher
D
A
, Sedg
w
i
ck T
O, Stanis CL.
Hig
h-perform
ance
emitter-
up/do
w
n
SiGe
HBT
s
.
IEEE El
ectron Dev
i
ce
Lett
. 1994; 15(
9): 360-3
62.
[21]
Schup
pe
n A, G
r
uhl
e A, Er
b
en
U, Kibb
el
H, K
oni
g U.
M
u
lti e
m
itter
fi
ng
er
SiGe-HBTs with f
ma
x
u
p
to 12
0
GH
z
. IEDM T
e
ch. Digest. 19
9
4
: 377–
38
0.
[22]
Schup
pe
n A, Erben
U,
Gruh
le A, Kib
bel
H,
Schumac
her
H, Koni
g U.
E
nha
nce
d
SiGe
hetero
j
uncti
o
n
bip
o
lar trans
istors w
i
th 160 GH
z
-
f
ma
x
. IEDM T
e
ch. Digest.1995: 74
3–
74
6.
[23]
Meister T
F
, Schafer H, F
r
an
o
sch
M, Molzer
W
,
Aufinger
K, Scheler
U,
W
a
lz C, Stolz
H, Boguth S,
Bock J.
SiGe
b
a
se b
i
p
o
lar t
e
c
hno
logy
w
i
th 7
4
GH
z
f
an
d
1
1
ps
gate
del
a
y
. IEDM T
e
ch.
Digest. 1995:
739-
742.
[24]
Kond
o M, Oda K, O
hue E, Shimamot
o H, T
ana
be
M, Onai
T
,
W
a
shio K.
Sub-1
0
-fJ ECL
/
68-mA
4.7-
GH
z
d
i
vid
e
r ul
tra-low
pow
er SiGe bas
e bi
p
o
lar trans
istors
w
i
th a w
edge
-shap
ed CV
D-
SiO isolati
o
n
structure and
a
BPSG-refilled
trench
. IEDM T
e
ch. Dig
est. 19
96: 245
–24
8.
[25]
Ahlgr
en D, Gilb
ert M,
Greenbe
rg D, Jeng SJ,
Malin
o
w
ski J, Ngu
y
e
n
-N
goc
D, Schone
nber
g K, Stein K,
Groves R, W
a
l
t
er K, Hueckel
G, Colavito D
,
F
r
eeman G, Sund
erla
nd D,
Harame
DL,
Me
yerso
n
B.
Manufactur
abi
li
ty de
mo
nstrati
on
of
an
inte
g
r
ated SiG
e
HB
T
techno
logy
for the
an
alo
g
and
w
i
reles
s
mark
etpl
ace
. IEDM T
e
ch. Digest. 1996: 85
9
–86
2.
[26]
W
a
shio K, Ohu
e
E, Oda K,
T
a
nab
e M, Shima
m
oto H, Onai T
.
A selective-e
p
itaxi
a
l SiGe H
B
T w
i
th SMI
electro
des feat
urin
g 9.3-ps E
C
L-g
a
te del
ay
. IEDM
T
e
ch. Digest. 199
7: 79
5-79
8.
[27]
Oda K, Ohue
E,
T
anab
e M, Shimam
oto H,
Onai T
,
W
a
shio K,
130 GH
z
-
f
T
SiGe
HBT
techno
lo
gy
.
IEDM
T
e
ch. Digest. 199
7: 79
1-79
4.
[28]
King
CA, F
r
ei
MR, Mastrapa
squa M, N
g
K
K
, Ki
m YO, Johnso
n
RW
, Mo
inia
n S, Martin
S, Cong
H-I,
Kleme
n
s F
P
, T
ang
R, N
g
u
y
e
n
D, Hs
u T
-
I, Campbe
ll T
,
Moll
o
y
SJ, F
r
itzin
g
e
r LB, Iva
nov
T
G, Bourdel
l
e
KK, Lee C, Ch
ya
n Y-F
,
Carrol
l
MS, Leung C
W
.
Very low
co
st graded SiG
e
base bi
po
lar transistors fo
r
a hig
h
perfor
m
ance
mo
dul
ar BiCMOS proce
s
s
. IEDM
T
e
ch
. Digest. 199
9: 565
–5
68.
[29] W
a
shio K, Kon
do M, O
hue E, Oda K, Ha
y
a
mi R,
T
anabe
M, Shimamoto
H, Harada T
.
A 0.2-
μ
m
self
-
alig
ne
d SiGe H
B
T
featuring 1
07-GH
z
f
T
a
nd
6.7-ps ECL
. IEDM T
e
ch. Digest. 1999: 557-
5
60.
[30]
F
r
eeman
G, Ahlgr
en
D, Gree
nber
g D, Grov
es R, H
u
a
ng F
,
Hu
go G, Ja
ga
nnath
a
n
B, Jen
g
S, Jo
hns
o
n
J, Schon
enb
er
g K, Vol
ant R,
Subb
an
na S.
A 0.18
μ
m 90 GH
z
f
T
SiGe HBT BiCMOS, ASIC
compati
b
le, co
pper i
n
terco
n
n
e
ct techno
lo
gy
for RF
and
mi
crow
ave ap
plic
ations
. IEDM Tech. Digest
.
199
9: 569
–5
72
.
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 23
02-4
046
TELKOM
NI
KA
Vol. 14, No. 1, April 2015 : 103 – 10
9
108
[31]
W
a
shio
K, Oh
ue E,
Shim
am
oto
H, O
da K,
Ha
yami
R, K
i
yota Y,
T
a
n
a
be M, Ko
nd
o M,
H
a
sh
i
m
o
t
o
T
,
Hara
da T
.
A 0.2-
μ
m
180-GH
z
-
f 6.7-ps-ECL
SOI/HRS self a
ligned SEG SiGe HB
T/CMOS technology
for microw
av
e and h
i
g
h
-spe
e
d
dig
i
tal a
ppl
ic
ations
. IEDM T
e
ch. Dig
est. 20
00: 741
–7
44.
[32]
Carrol
l
M, Iva
n
o
v T
,
Kuehn
e
S, Chu
J, Kin
g
C,
F
r
ei M, Mas
t
rapasq
u
a
M, J
ohns
on
R, N
g
K, Moin
ian
S,
Martin S, H
u
a
ng
C, Hsu
T
,
Ngu
y
e
n
D, Sin
gh
R, Fr
i
t
z
i
n
g
e
r
L
,
E
s
r
y
T
,
M
o
l
l
e
r
W
,
K
a
n
e
B
,
A
b
e
l
n
G
,
H
w
an
g D, Orp
hee
D, L
y
tle S,
Rob
y
M, V
i
tka
v
age
D,
Ch
esir
e D, Ashto
n
R,
Shuttle
w
o
r
th
D, T
homa M,
Choi S, Le
w
l
l
e
n S, Mason P, Lai T
,
Hsieh H, D
ennis D,
Harris E,
T
homas
S, Gregor R, Sana P, Wu
W.
COM2 SiGe mo
du
lar BiC
M
OS technolo
g
y for digita
l, mix
ed-si
gn
al, and RF
ap
plic
ations
. IEDM
T
e
ch. Digest. 2000: 14
5-1
48.
[33]
Bock J, Meiste
r T
F
,
Knapp H
,
Z
o
schg D, S
c
hafer
H, Aufi
n
ger K, W
u
rzer
M, Boguth S,
F
r
anosch M,
Stengl R, Schr
eiter R, Rest M,
T
r
eitinger L.
SiGe bip
o
l
a
r techno
logy for
mi
xed di
gita
l an
d ana
log
ue
R
F
app
licati
ons
. IEDM T
e
ch. Digest. 2000: 745
–
748.
[34]
Raca
nel
li M, Schue
graf K, Kalb
urge A, Kar
-
Ro
y A, Shen
B, Hu C,
Cha
p
e
k D, Ho
w
a
rd
D, Quon D
,
W
ang F
,
U’ren
G, Lao L,
T
u
H, Z
heng J, Z
hang J, Bel
l
K, Yin K, Joshi P,
Akhtar S, Vo S, Lee T
,
Shi
W, Kempf P.
Ultra hi
gh sp
e
ed SiGe NP
N
for advanc
ed
BiCMOS technol
ogy
. IEDM T
e
ch. Digest.
200
1: 15.3.1–
1
5
.3.4.
[35]
Ohue E, Ha
ya
mi
R, Oda K, Shimam
oto H, and W
a
s
h
io K.
5.3-ps ECL
a
nd 7
1
-GH
z
sta
t
ic freque
ncy
divid
e
r i
n
self-a
lign
ed SEG Si
Ge HBT
. Proc. Bipol
ar/BiCM
OS Circuits
an
d T
e
chnolo
g
y
Meetin
g. 200
1:
26-2
9
.
[36]
W
a
shio
K, Oh
ue E, Od
a K,
Ha
yami
R, T
anab
e
M, Sh
im
amoto
H. A 5
0
-
GHz
static fre
que
nc
y d
i
vi
der
and 4
0
-Gb/s MUX/DEM
U
X usin
g self-a
l
i
g
ned se
lective-
epita
xial-
g
ro
w
t
h SiGe HBT
s
w
i
t
h
8-ps EC
L
.
IEEE Trans. Electron Dev
i
ces
. 2001; 48(
7): 1482-
148
7.
[37]
W
a
shio K, Oh
ue E, Ha
ya
mi
R,
Kodam
a A,
Shimam
oto H,
Miura M,
Oda
K, Suzumura I,
T
o
minari T
,
Hashim
oto T
. Ultrahi
gh-s
pee
d sca
led-
dow
n
self-a
lig
ne
d S
E
G SiGe HBT
s
. IEDM T
e
ch. Digest. 2002:
767-
770.
[38]
Ki
yota Y, Hash
imoto T
,
Udo
T
,
Kodam
a A, S
h
imamot
o H, H
a
yami R, W
a
sh
io K.
190-GH
z
fT
,
130-GH
z
fmax SiGe
HBT
s
w
i
th heavily
do
ped
base for
m
e
d
by HCL-fr
ee sel
e
ctive
epitaxy
. Proc.
Bipo
lar/BiCMO
S
Circuits an
d T
e
c
hnolog
y M
eetin
g. 200
2: 139-1
42.
[39]
Osten HJ, Lip
pert G, Knoll D, Barth
R, Hein
eman
n B, Rucker H, Schle
y
P.
T
he effect of carbo
n
incor
porati
on
on SiGe
hete
r
obi
pol
ar trans
istor perfor
m
a
n
ce a
nd pr
oc
ess margi
n
. IEDM T
e
ch.
Digest.1
99
7: 803–
80
6.
[40]
Knol
l D, He
in
e
m
ann B, Osten
HJ, Eh
w
a
ld B,
T
illack
B, Schl
e
y
P, Barth R,
Ma
tthes M, Par
k
KS, Kim Y,
Win
k
le
r W.
Si/SiGe:C heter
oju
n
ction b
i
p
o
l
ar transistors
in an epi-fr
ee w
e
ll, singl
e-po
lysilic
o
n
techno
lo
gy
. IEDM T
e
ch. Digest.1998: 70
3–7
06.
[41] Eh
w
a
ld KE, Kn
oll D,
Hei
nema
nn B, Ch
an
g K
,
Kitc
hgessn
er
J, Mauntel
R, Lim IS, Steel
e
J, Schle
y
P
,
T
illack B, W
o
lff A, Blum K, W
i
nkler W
,
Piers
c
hel M,
Ja
gd
h
o
ld
U, Barth R
,
Graboll
a
T
,
Erzgrab
e
r HJ
,
Hun
ger B, Osten HJ.
Modul
ar
integrati
on of hig
h
-perfor
m
an
ce
SiGe:C HBT
s
in a deep s
u
b
m
icro
n, epi-
free CMOS pro
c
ess
. IEDM
T
e
ch. Digest. 19
9
9
: 561-5
64.
[42]
Bock J, Schafer H, K
nap
p H, Z
o
schg D, Aufing
er K, Wurzer
M, Bogu
th S, Stengl R
,
Schreiter R
,
Meister T
F
.
High-sp
eed S
i
Ge
:C bipo
lar tech
nol
ogy
. IEDM T
e
ch. Digest. 2001: 15.
5.1–1
5
.
5.4.
[43] Oda K, Ohue
E, Suzumura
I, Ha
yam
i
R, Ko
dama A, S
h
im
amoto H, W
a
s
h
io K.
S
e
lf-al
i
g
ned s
e
l
e
ctive-
epitax
i
al-
g
row
t
h Si Ge C HBT
technolo
g
y featura
i
ng 1
70-
GH
z
fmax.
IEDM
T
e
ch. Dig
est. 2001: 33
2
–
335.
[44]
Heinemann B,
Knoll D,
Barth
R, Bolze D,
Blum
K, Dre
w
s J, Eh
w
a
ld KE, Fi
scher GG, Kopke K,
Kruger
D, Kurps R, Rucker H, Schle
y
P, Winkler W, Wulf H-E.
Cost-effective hig
h
-perfor
m
ance
high-v
o
lta
g
e
SiGe:C HBTs
with 100 GH
z
f
T
an
d BV
CE
O
x f
T
pro
ducts
exc
eed
ing
2
20 GH
z
.
IEDM T
e
ch.
Digest.
2001:
15.6.1–
15.6.4.
[45] Jaga
nn
athan
B,
Megh
ell
i
M, R
y
l
y
ak
ov AV,
Groves RA,
Chint
haki
ndi
A
K
, Schna
bel
C
M
, Ahlgre
n D,
Freeman G, Stein KJ, Sub
b
a
nna S. A 4.2-p
s
ECL rin
g
-osc
illator
in a
285-
GHz fmax SiG
e
techn
o
lo
g
y
.
IEEE Electron Device
Lett
. 20
02; 23(9): 5
41–
543.
[46]
Knol
l D, He
in
e
m
ann B, E
h
w
a
ld KE, Ruck
er
H, T
illack B, W
i
nkler
W
,
Schle
y
P.
Bi
CMOS i
n
tegrati
on
of
SiGe:C hetero
j
unctio
n
bip
o
l
a
r transistors
. Proc. Bipol
ar/Bi
C
MOS Circuits
and T
e
chnolo
g
y
Me
etin
g.
200
2: 162
–1
66
.
[47]
Bock J, Schafe
r
H, Knap
p H, Z
o
schg D, Aufi
nger K, W
u
rzer
M, Boguth
S, Rest M, Schrei
ter R, Sten
g
l
R, Meister TF.
Sub 5 ps SiGe
bip
o
lar tech
no
l
ogy
. IEDM
T
e
ch. Digest. 20
02
: 763–7
66.
[48]
Hein
ema
nn B, Rucker H, Bart
h R,
Bauer J, Bolze D, Bug
i
el
E, Dre
w
s
J, Eh
w
a
ld K-E, Grab
olla T
,
Haak
U, Hop
p
n
e
r W, Knol
l D, Kru
g
e
r D, Kuck B,
Kurps R,
M
a
rschme
yer M, R
i
c
hter HH, Sc
hl
e
y
P, Schmi
d
t
D, Scholz R, T
illack B, Wink
l
e
r W, Wolnsk
y
D, Wulf H-E, Yamamoto Y,
Zaumseil P.
N
o
vel c
o
ll
ector
desi
gn for hi
gh
-spee
d SiGe:C
HBT
s
. IEDM
Tech. Dig
est. 20
02: 775
–7
78.
[49]
Grahn JV, F
o
sshau
g H, Jar
geli
u
s M, Jons
son P, Lin
der
M, Malm
BG,
Moha
djer
i B, Pejn
efors B
,
Rad
a
mson
HH
, Sande
n M, W
ang YB, La
ndgr
en G, Ostling M. A l
o
w
-
compl
e
xit
y
62-
GHz fT
SiGe
hetero
j
uncti
on
bip
o
lar
trans
istor pr
ocess
usi
ng
differe
ntial
epita
xy a
nd in
situ
p
hos
porus
-dop
ed
po
l
y
-S
i
emitter at ver
y
lo
w
therm
a
l bu
dget.
Soli
d State Electron
ics
. 200
0; 44: 349-
554.
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
2302-4
046
Scaling M
odel for Silicon Germ
anium
Heterojunc
tion B
i
polar… (Engelin Shintadewi Juli
an)
109
[50]
Jeng SJ, Jag
a
nnath
an B, Ri
eh JS, Johns
o
n
J,
Schone
nb
erg KT
,
Greenberg D, Stricke
r A, Chen H,
Khater M, A
h
l
g
ren
D, F
r
eem
an G, Stei
n K,
Sub
b
a
nna
S.
A 21
0-GHz fT
SiGe HBT
w
i
th
a
Non-S
e
lf-
Alig
ned Structu
r
e.
IEEE Electron Dev. Lett.
2
001; 22(
11).
[51]
Z
hang S, Ni
u
G, Cressler JD
, Joseph AJ, F
r
eema
n
G, Harame DL. T
he Effects of Geometrical Sca
lin
g
on the F
r
e
q
u
e
n
c
y
Res
pons
e
and
Nois
e Pe
rformance
of SiGe HBT
s
.
IEEE T
r
ans. Elect
r
on D
e
vices
.
200
2; 46(3): 42
9 – 435.
[52]
Jaga
nn
athan
B
,
Khater M, Pa
gette F
,
Rie
h J
-
S, Angel
l D, C
hen
H, F
l
orke
y J, Golan F
,
Gr
een
berg
DR
,
Groves R, Jeng SJ, Johnson
J,
Mengistu E, Schonne
nb
er
g KT
, Schnab
el CM, Smith P, Stricker A,
Ahlgr
en D, F
r
e
e
man G, Stei
n
K, Subb
ann
a S
.
Self-A
lig
ne
d
SiGe NPN T
r
ansistors W
i
th 2
85 GHz fma
x
and 2
07 GHz fT
in a Manufac
turabl
e T
e
chno
log
y
.
IEEE Electron Devic
e
Lett
. 2002; 23(5)
: 238–2
60.
[53]
Joseph AJ, Dunn J, Freeman
G, Harame DL,
Cool
baugh D,
Groves R, Stein
KJ, Volant R, Subbanna
S, Maran
gos
VS, Onge
SSt, Eshun
E, Coo
per
P, Joh
n
son
JB,
Rie
h J-S, J
aga
nn
athan
B
,
Ramac
han
dra
n
V, Ahlgr
en
D, W
ang D, W
a
n
g
X. Pr
oduct A
pplic
atio
ns a
n
d
T
e
chnolog
y
Di
rections W
i
t
h
SiGe BiCMOS.
IEEE Journal
of Solid Stated Circuits
. 20
03; 38(9): 14
71-
14
78.
[54]
Joha
nse
n
J, Jin B, Cressl
er JD, Cui Y, Niu G, Liang Q, R
i
eh JS, F
r
eeman G, Ahlgren
D, Joseph A
.
On the Scali
n
g Li
mits of Lo
w
-
F
r
equency
Noise
in SiGe
HBT
s
. Internationa
l Semic
o
n
ductor Dev
i
c
e
Rese
arch S
y
m
posi
u
m. 200
3: 12-1
3
.
[55]
Orner BA, Liu
QZ
, Raine
y
B, Stricker A, Gei
ss P, Gra
y
P, Z
i
erak
M, Gordon M, Colli
ns D
,
Ramac
han
dra
n
V, Hod
ge W
,
W
illets C, Joseph A,
D
unn
J, Rieh J-S, J
eng S-J, El
d E, Freeman G
,
Ahlgr
en D.
A 0.13u
m Bi
CM
OS T
e
chnol
og
y F
eaturi
ng
a 200/2
80 GH
z
(fT
/fmax) SiGe HBT
. IEEE
BCT
M
. 2003: 2
03 - 206.
[56]
Rieh J-S, Ja
g
ann
atha
n B, C
hen
H, Schon
enb
erg K, Je
n
g
S-J,
Khater
M, Ahlgre
n D,
F
r
eeman G,
Subb
an
na S.
Performance
and D
e
sig
n
Consi
der
atio
ns for Hig
h
Spee
d SIGe HBT
s
of
fT
/fmax=
375/2
10 GH
z
. Intl. C
onf on Ind
i
um
Phosp
h
id
e an
d
Relate
d Materi
als. 200
3: 374
- 377.
[57]
Magn
ee PH
C, Hurk
x GAM, Agar
w
a
l P, van
Noort W
D
, Do
nkers JJT
M, Melai J, Akse
n E, Vanho
ucke
T
,
Vija
yara
gh
a
v
an MN.
SiG
e
:C HBT
tech
nol
ogy for
ad
vance
d
BiCM
OS processes
. 12th GaA
s
S
y
mp
osi
u
m. 2004: 24
3 – 24
6
.
[58]
Che
n
T
,
Kuo W
-ML, Z
hao E, Lian
g Q, Jin
Z
,
Cr
essler JD
, Joseph AJ.
On the Hi
gh-T
e
mper
ature (to
300 C) C
haract
e
ristics of SiGe
HBT
s
.
IEEE Trans. Electron
Devices
. 2
004;
51(11): 18
25-
183
2.
[59]
Stricker AD, Johns
on JB, F
r
eema
n
G, Rieh JS. Design
and o
p
timiz
a
ti
on of a 20
0 GHz SiGe HBT
collect
or profil
e
b
y
T
C
AD.
Applied S
u
rface Sc
ienc
e
. 200
4; 224: 324
–3
29.
[60]
Josep
h
A, Lan
zerotti
L, Li
u X,
Sher
ida
n
D,
J
ohns
on
J, Li
u
Q, Dunn
J,
Ri
eh JS,
Haram
e
D.
Adv
anc
es
in SiGe HBT B
iCMOS Techn
o
lo
gy
. IEEE Topic
a
l Meeting on Silicon
Monolit
hic Integr
ated Circuits in
RF
S
y
stems. 2004: 1-4.
[61]
Khater M,
Rie
h JS, Ad
am T
,
Chint
haki
ndi
A,
Johns
on J,
Krishn
asam
y
R, Meg
hel
li M,
Pag
e
tte F
,
Sand
erso
n D,
Schna
be
l C,
Schon
en
berg
KT
, Smith P,
Stein K, Strick
er A, Jeng SJ
, Ahlgren D,
F
r
eeman G.
SiGe HBT
T
e
chnolo
g
y w
i
th fma
x
/fT
=
350/300
GH
z
an
d Gate Delay B
e
low
3.3 ps
. IEDM.
200
4.
[62]
Rieh JS, Gree
nber
g D, Khat
er
M, Schone
n
berg KT
, Jeng S-J, Pagette F
,
Adam
T
,
C
h
inth
akin
di A,
F
l
orke
y J, Ja
ga
nnath
an
B, Joh
n
son
J, Krish
n
a
sarn
y
R,
Sa
n
derso
n D, Sc
h
anb
el
C, Smith
P, Stricker A,
S
w
e
e
n
e
y
S, V
aed K, Ya
nag
i
s
a
w
a T
,
Ahlgre
n D, Stein K, F
r
eema
n
G.
SiGe HBTs for Mill
imeter-Wave
Appl
icatio
ns w
i
th Si
mult
ane
o
u
sly Opti
mi
z
e
d fT
and fma
x
of 300 GH
z
.
IEEE Radio Frequenc
y
Integrated C
i
rc
uits S
y
mp
osi
u
m. 2004: 39
4 - 397.
[63]
Rieh J
S
, Jaga
nnath
an B, Green
ber
g
DR,
Megh
ell
i
M, Ryl
y
a
k
ov A, Gu
arin F
,
Yan
g
Z
,
Ahlgre
n D
C
,
F
r
eeman G, Cottrell P, Har
a
me D. SiGe Hetero
juncti
on
Bipol
ar T
r
ansistors and C
i
r
c
uits T
o
w
a
r
d
T
e
rahertz Co
mmunicati
on A
pplic
atio
ns.
IEEE Trans. On Microwav
e Theory and Techniques
. 20
04
;
52(1
0
).
[64]
Krithivas
an R,
Lu Y, Cr
essl
er JD, Ri
eh J
S
, Khater MH
, Ahlgre
n D,
F
r
eeman G.
Half-T
erahertz
Operatio
n of Si
Ge HBT
s
.
IEEE Electron Dev
.
Lett
. 2006; 27
(7): 567-5
69.
[65]
Rieh J-S, Khat
er M, F
r
eeman
G, Ahlgren D. SiGe HBT
w
i
t
hout Sel
e
ctive
l
y Impla
n
ted C
o
llect
or (SIC)
Exh
i
b
i
ting fma
x
=
310 GHz and BVCEO =
2
V.
IEEE
Trans. On Electron Dev
. 2006; 5
3
(9)
:
2407-2
4
0
9
.
[66]
Yuan
J, Cr
essl
er JD, Kr
ithiva
san
R, T
h
rivikram
an
T
,
Khater MH, Ah
lgre
n
DC, Jos
eph
AJ
, Rie
h JS.
O
n
the Performan
c
e Limits of Cr
yog
enic
a
ll
y
Oper
ated SiG
e
HBT
s
and Its Relation to
Scalin
g fo
r
T
e
rahertz Speeds.
IEEE Trans. On Electron Dev
. 200
9; 56(
5): 1007-
10
19.
[67]
Yuan J, M
o
e
n
KA, Cressler
J
D
, Rücker
H,
Hein
ema
nn B,
W
i
nkler W
.
Si
Ge HBT
CML Ring
Oscill
ator
W
i
th 2.3-ps Gate Dela
y at
Cr
yoge
nic T
e
mperatures.
IEEE Trans. On Electron Dev
. 20
10; 57(5): 11
83-
118
7.
[68]
Julia
n ES.
Sil
i
c
on Germ
ani
u
m
Heter
o
ju
ncti
on B
i
p
o
lar
T
r
ansistor for
Di
gi
tal Ap
licati
on.
Te
lkom
n
i
ka
,
201
2; 10(3): 49
3 – 498.
Evaluation Warning : The document was created with Spire.PDF for Python.