Intern
ati
o
n
a
l
Journ
a
l of
Re
con
f
igur
able
and Embe
dded
Sys
t
ems
(I
JRES)
V
o
l.
4, N
o
. 3
,
N
o
v
e
m
b
er
2
015
, pp
. 20
9
~
21
2
I
S
SN
: 208
9-4
8
6
4
2
09
Jo
urn
a
l
h
o
me
pa
ge
: h
ttp
://iaesjo
u
r
na
l.com/
o
n
lin
e/ind
e
x.ph
p
/
IJRES
Design and Implementation of Re
cursive Least Square Adaptive
Filter Using Block DCD approach
Sa
chin S. Khana
n
de*, S.J.
Ho
na
de**
* M
.
E.
El
ectron
i
cs
&
T
e
le
com
m
uni
cation, Depar
t
ment of
Electro
nics
& Telecommunication
Engineering
** F
acul
t
y
of
El
ectron
i
cs
&
T
e
l
e
com
m
unication,
Department o
f
Electroni
cs
& Tel
ecom
m
unication
Engin
eering
G.
H.
R
a
i
s
oni
C
o
l
l
e
ge of En
g
i
neeri
n
g,
Am
ravat
i
,
I
n
di
a
Article Info
A
B
STRAC
T
Article histo
r
y:
Received
May 12, 2015
R
e
vi
sed Oct
9,
2
0
1
5
Accepted Oct 22, 2015
Due to the exp
l
osive growth of m
u
ltim
edia application and t
r
em
endous
demands in Very
Large Scale I
n
tegrat
ed (VLS
I), ther
e is
a ne
ed of high
speed and low power digital filters for
digital sig
n
al processing applications
.
In Digital Sign
al Processing (DSP) sy
stems, Finite Impul
se Response (FIR)
filters are one of
the m
o
st common co
m
ponents
which is used, by
convolv
i
ng
the inpu
t d
a
ta samples with th
e d
e
sired
un
it samp
le r
e
sponse of th
e filter
.
The
proposed work deals with
the d
e
sign and implementation of R
L
S adaptiv
e
filte
r using bloc
k DCD approach. The ev
alu
a
tio
n of speed, ar
ea
and power
for proposed wo
rk will be done.
Also, the com
p
arison of the proposed design
with th
e
existing
will
be
car
ried
o
u
t for v
a
rious
in
put com
b
ina
tion
s
.
Keyword:
FPGA
kit
Mo
d
e
lSim
VH
DL
Xilin
k
ISE
Copyright ©
201
5 Institut
e
o
f
Ad
vanced
Engin
eer
ing and S
c
i
e
nce.
All rights re
se
rve
d
.
Co
rresp
ond
i
ng
Autho
r
:
Sachin S. Kha
n
ande,
St
ude
nt
of
M
.
E.
El
ect
r
oni
cs
&
Tel
ecom
m
uni
cat
i
on,
Depa
rt
m
e
nt
of
El
ect
roni
cs
&
Tel
ecom
m
uni
cat
i
on E
n
gi
nee
r
i
n
g
,
G.
H.
R
a
i
s
oni
C
o
l
l
e
ge of En
g
i
neeri
n
g,
Am
ravat
i
,
I
n
di
a.
Em
a
il: sach
in
.k
h
a
n
a
n
d
e
46
@g
m
a
i
l
.co
m
1.
INTRODUCTION
An
ad
ap
tiv
e fil
t
er is a co
m
p
u
t
atio
n
a
l d
e
v
i
ce
th
at atte
m
p
t to
m
o
d
e
l th
e relatio
n
a
l
d
e
v
i
ce
b
e
tween
two
sig
n
a
ls in
real ti
m
e
en
v
i
ro
nmen
t in
an
iterativ
e m
a
n
n
e
r.
Ad
ap
tiv
e filter are often
realise eith
er as a set of
pr
o
g
ram
i
n
st
ruct
i
on r
u
n
n
i
n
g
on a
n
ari
t
h
m
e
ti
cal
processi
ng
devi
ce suc
h
a
s
m
i
cropr
ocess
o
r
or D
SP (
d
i
g
i
t
a
l
si
gnal
pr
ocess
o
r
)
c
h
i
p
or a
s
set
of l
ogi
c
o
p
e
rat
i
on i
m
pl
em
ent
e
d i
n
F
P
GA
o
r
i
n
sem
i
cust
om
or c
u
st
om
VLSI
cir
c
u
it how
ev
er
ign
o
r
i
ng
an
y
er
ro
r in
trod
uced
b
y
nu
m
e
rical
precision effect. In
th
is i
m
p
l
e
m
en
tatio
n
,
t
h
e
fund
am
en
tal o
p
eration
of an
ad
ap
tiv
e
filter can
b
e
ch
ar
act
erised
ind
e
p
e
nd
en
tly o
f
sp
eci
fic p
h
y
sical realizatio
n
t
h
at
i
t
t
a
ke. Fo
r t
h
i
s
reaso
n
p
r
o
p
o
sed m
e
t
hod fo
cuses
on t
h
ei
r speci
fi
c real
i
zat
i
on i
n
sof
t
ware an
d ha
rd
wa
r
e
[1
-3]
.
The
dem
a
nd a
nd
p
o
p
u
l
a
ri
t
y
o
f
p
o
rt
a
b
l
e
el
ect
ro
ni
cs i
s
d
r
i
v
i
n
g de
si
g
n
ers m
a
ke
great efforts
to achie
ve
for sm
a
ll s
ilico
n
area, h
i
g
h
e
r sp
eed
s
, and
power d
i
ssi
p
a
tio
n an
d
reliab
ility. Th
e p
r
o
p
o
s
ed
work
d
eals with
th
e
d
e
sign
and
p
e
rform
a
n
ce an
alysis o
f
Ad
ap
ti
v
e
Filter in
VLSI. Figure1
sho
w
s the b
a
sic co
n
c
ep
t of th
e ad
ap
tiv
e
filter wh
ich
u
s
es Least Mean
Squ
a
re Al
g
o
rith
m
fo
r m
i
n
i
m
i
zin
g
t
h
e erro
r [4
-5
].
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
089
-48
64
I
J
RES Vo
l. 4
,
N
o
. 3
,
No
v
e
m
b
er
201
5
:
2
09
–
21
2
21
0
Fi
gu
re
1.
Ge
ne
ral
i
zed st
r
u
cture of a
d
aptive
fi
lters
The
di
sad
v
a
n
t
a
ge o
f
LM
S
al
go
ri
t
h
m
i
s
that
, i
t
can
not
m
eet
t
h
e requi
rem
e
nt
of
fast
rat
e
o
f
con
v
e
r
ge
nce a
n
d
m
i
nim
u
m
M
S
E.
T
h
e
best
ch
oi
ce
i
s
t
o
us
e
t
h
e bl
oc
k rec
u
rsi
v
e l
east
squares (R
L
S
) al
go
ri
t
h
m
t
o
o
v
e
r
com
e
t
h
e a
b
o
v
e
di
f
f
i
c
ul
t
y
. B
l
ock
R
ecursi
v
e Least
Sq
uare
-
D
C
D
(Di
c
hot
om
ous
C
o
o
r
di
nat
e
De
cent
)
al
go
ri
t
h
m
s
are kn
o
w
n t
o
e
x
hi
bi
t
bet
t
e
r
pe
rf
orm
a
nces. A
nd i
s
o
n
e o
f
t
h
e va
ri
ant
s
al
go
ri
t
h
m
i
n
wh
i
c
h t
h
e
up
dat
i
n
g
of
w
e
i
ght
s i
s
do
ne
at
bl
oc
k l
e
ve
l
and t
h
e e
r
r
o
r val
u
es a
r
e c
a
l
c
ul
at
ed at
ev
ery
cl
ock
cy
cl
e. Th
e
weights are
updated
once pe
r every
bl
oc
k d
a
t
a
i
n
st
ead o
f
up
dat
i
n
g o
n
e
v
ery
cl
ock cy
cl
e of i
n
p
u
t
dat
a
. The
error val
u
es are calculated at every clock c
y
cle [6-9].
Figure 2 RLS a
d
a
p
tive filter shows u (n) is the
input
an
d
y (n
) is th
e o
u
t
pu
t of th
e filter. d
(n) d
e
sired
respon
se
of Ad
ap
tiv
e filter Erro
r
d
e
no
ted
b
y
e(n) th
is erro
r is
subt
ract
wi
t
h
fi
l
t
e
r out
put
an
d
desi
re
d o
u
t
p
ut
i
.
e. e(n
)
= y
(
n
)
-
d
(
n
) a
n
d i
t
’
s cal
l
e
d as est
i
m
a
t
i
on er
ro
r. T
h
e aim
o
f
th
is filtration
is to
re
m
o
v
e
th
e esti
matio
n
error.
λ
is step
-size wh
ich
i
s
u
s
ed
fo
r ad
ap
tatio
n
of th
e weigh
t
vector, t
h
e tap-weight vect
or
w(n
)
an
d
th
e tap
-
i
n
pu
t
v
ector
u(
n)
i
s
defi
ne
d
as f
o
l
l
o
w
s
W (n)
= [
w
0
(n
)
,
w1
(n
)
,
…,
w
n
-1
(n
)
]
T
u(
n)
=[
u (n
),
u
(n
-1
),
…, u(
n
-
N
+
1)]
T
Fig
u
re 2
.
RLS Ad
ap
tiv
e filter
Th
e
Z-inv
e
rse
is a d
e
lay elemen
t used fo
r con
t
ro
llin
g
t
h
e
i
n
p
u
t
of filter. Wh
en
ev
er
th
e first
inpu
t
is
g
i
v
e
n
to
th
e
filter u
(
n
)
at th
at
ti
m
e
o
t
h
e
r inpu
t h
a
v
e
stand
-
b
y
con
d
ition
th
en
secon
d
i
n
p
u
t
are
g
i
v
e
n
t
o
filter
t
h
at
i
s
u(
n-
1) a
t
a t
i
m
e
m
a
ny
inp
u
t
s
n
o
t
p
r
oc
cess bec
o
u
s
e o
f
del
a
y
.
T
h
e p
r
op
ose
d
di
sse
rt
at
i
on w
o
rk
dea
l
s wi
t
h
th
e d
e
si
g
n
of si
m
p
le arch
itect
u
r
e
for th
e im
p
l
e
m
en
tati
on o
f
a vari
a
n
t
o
f
B
l
ock
DC
D R
L
S
-
al
g
o
ri
t
h
m
wh
ere t
h
e
weight updating a
n
d error cal
culation
are
b
o
t
h cal
cul
a
t
e
d
i
n
bl
oc
k
wi
se
fas
h
i
o
n.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
RES I
S
SN
:
208
9-4
8
6
4
Design
an
d Imp
l
emen
ta
tion
of Recu
rsive
Lea
s
t
S
qua
re Adap
tive Filter Usi
n
g Blo
c
k DC
D
…
(
Sachi
n S.
K
.
)
21
1
2.
RELATED WORK
Ad
ap
tiv
e filter
is form
s th
e imp
o
rtan
t
b
a
sis fo
r m
a
n
y
real time d
i
g
ital signal p
r
o
cessi
n
g
ap
p
lication
s
.
Man
y
researchers h
a
v
e
wo
rked
on
ad
ap
tive filters fo
r variou
s d
i
v
e
rse ap
p
licatio
n
s
. Th
e d
e
tail lite
ratu
re
sur
v
ey
fo
r t
h
e
pr
o
pose
d
di
sse
rt
at
i
on i
s
a
s
f
o
l
l
ows:
The Im
port
a
nt
wo
rk i
s
car
ri
ed
out
by
Jafar S
a
ni
i
e
et
al
., i
n
whi
c
h aut
h
o
r
p
r
o
p
o
sed t
h
e
Ha
rd
ware a
n
d
Soft
ware Desi
gn fo
r
QR De
com
position
R
ecursi
v
e
Leas
t
Sq
uare
Al
g
o
r
i
t
h
m
.
An em
bedde
d
har
d
wa
r
e
and
soft
ware
sy
st
em
was desi
g
n
and
i
m
pl
em
entat
i
on
fo
r
QR
D
ecom
posi
t
i
on
R
ecursi
v
e Lea
s
t
Sq
uare
(
Q
R
D
-R
L
S
)
al
go
ri
t
h
m
usi
n
g
Gi
ve
n’s
R
o
t
a
t
i
on m
e
t
hod
f
o
r
opt
i
m
i
z
i
ng t
h
e area a
n
d
po
w
e
r [
1
]
.
D
r
. C.
V
i
j
a
ykumar
et al. p
r
esen
ted
on
e of
m
o
st i
m
p
o
r
tan
t
imp
l
em
en
tatio
n
of
low
p
o
w
e
r systo
lic b
a
se
ad
ap
tiv
e filter
b
y
d
e
ign
i
ng
t
h
e RLS Ad
ap
ti
ve Filter arch
itectu
r
e
u
s
ing
FPG
A
tech
no
logy w
ith
clo
c
k
gettin
g
.
Systolic array architecture were use
d
to re
duce t
h
e ci
rcu
i
t scale in
to
h
a
lf witho
u
t
im
p
a
irin
g
th
e
p
r
o
c
essin
g
sp
eed
an
d clo
c
k
g
a
tin
g wh
ich resu
lts in
t
h
e co
n
s
i
d
erab
le
redu
ctio
n in
po
wer[2
]
.
Md
. Zu
lfi
q
u
a
r Ali et al., auth
or su
gg
est t
h
e
New
Im
pr
ove
d R
e
c
u
r
s
i
v
e Least
-
S
q
uar
e
A
d
apt
i
v
e
-
Filterin
g
Algo
rith
m
s
. In
th
is
p
a
p
e
r
two
n
e
w i
m
p
r
ov
ed
recu
rsi
v
e least-squ
a
res ad
ap
tiv
e-filtering
algo
rith
m
s
,
o
n
e
with
a v
a
riab
le forg
ettin
g facto
r
an
d
t
h
e o
t
h
e
r
with
a variab
le con
v
erg
e
n
ce
factor are p
r
o
p
o
s
ed
.
Op
ti
m
a
l
forg
etting
and
co
nv
erg
e
n
ce
facto
r
s are ob
tain
ed
b
y
m
i
n
i
mi
zin
g
th
e m
ean
sq
uare of t
h
e
no
ise-free a
p
o
sterio
r
er
ro
r sign
al [3
].
Au
t
h
or C
r
istian
Stan
ciu
l
et al., says th
at i
n
Nu
m
e
rical Pro
p
e
rties of t
h
e DCD-RLS Al
g
o
rith
m
fo
r
St
ereo
Ac
o
u
st
i
c
Ech
o
C
a
ncel
l
a
t
i
on, M
o
der
n
t
e
l
econfe
r
e
n
ci
ng
sy
st
em
s have
been
de
vel
o
ped
i
n
rece
nt
y
ears t
o
u
s
e m
u
ltip
le aco
u
s
tic ch
an
n
e
l
s
(stereo co
m
m
u
n
i
catio
n
)
.
Th
is featu
r
e im
p
r
ov
es t
h
e
qu
ality o
f
C
o
mm
u
n
i
catio
n
(e.g
., i
n
term
s
o
f
sp
atial lo
calizatio
n
)
,
bu
t the classi
c pr
obl
em
of t
h
e ac
o
u
s
t
i
c
echo ca
nce
l
l
a
t
i
on bec
o
m
e
s m
o
re
com
p
l
i
cat
ed. In t
h
i
s
cont
e
x
t
,
t
h
e di
chot
om
ous c
o
o
r
di
nat
e
descent
(
D
C
D
) - rec
u
rsi
v
e
l
east
-
squa
res (R
LS
)
algorithm
can be a
n
attractive
choi
ce fo
r h
a
rd
w
a
r
e
im
p
l
e
m
en
tatio
n
[5
].
Ot
he
r w
o
r
k
carri
ed
by
Yu
ri
y
Zakha
ro
vt
, et
al
., i
n
whi
c
h Fast
R
L
S al
go
ri
t
h
m
usi
ng di
chot
om
ous
co
ord
i
n
a
te d
e
scen
t iteratio
n
s
in
th
is th
e Recu
rsi
v
e Least Sq
u
a
res (R
LS) ad
ap
tiv
e
filterin
g
p
r
o
b
l
e
m
is
ex
pressed
in
term
s o
f
au
x
iliary n
o
r
m
a
l eq
u
a
tio
n
s
with
resp
ect to
in
crem
en
t
s
o
f
th
e
filter weigh
t
s. By app
l
yin
g
th
is appro
a
ch
to
th
e expo
n
e
n
tially weig
h
t
ed
case,
a n
e
w
stru
ctur
e
of th
e RLS algor
ith
m
is d
e
r
i
ved
.
For
so
lv
i
n
g
t
h
e aux
iliary eq
u
a
tion
s
,
d
i
cho
t
o
m
o
u
s
coord
i
n
a
te d
e
scen
t (DC
D
) iteratio
n
s
wit
h
no
ex
p
licit div
i
sion
an
d m
u
ltip
licat
io
n
are
u
s
ed
[8].
From
t
h
e revi
ew o
f
vari
ou
s
pape
rs, i
t
i
s
fo
u
nd t
h
at
DC
D al
go
ri
t
h
m
is used f
o
r m
i
ni
m
i
zi
ng t
h
e
i
t
e
rat
i
on wi
t
h
great
er
spee
d a
n
d
i
t
can
be
ve
ry
use
f
ul
fo
r
H
a
rd
ware
i
m
pl
em
ent
a
t
i
on al
so
. Exi
s
t
i
n
g m
e
tho
d
s i
s
base
on m
a
t
r
i
x
i
nve
rsi
o
n
pr
o
b
l
e
m
.
Howe
ve
r, t
h
e
p
r
o
p
o
sed
m
e
t
hod ca
n
b
e
use
d
t
o
o
v
er
com
e
t
h
e pr
ob
l
e
m
of
m
a
t
r
i
x
i
nve
rsi
o
n
by
usi
n
g B
l
o
c
k
DC
D
-
R
L
S
al
go
ri
t
h
m
.
3.
CO
NCL
USI
O
N
Ad
ap
tiv
e filterin
g
techn
i
qu
es can
b
e
u
s
ed
in
m
a
n
y
ap
p
licatio
n
s
in
d
i
fferen
t
field
s
, su
ch
as wireless
co
mm
u
n
i
catio
n
an
d ch
ann
e
l
eq
u
a
lization
,
no
ise can
cellin
g, ch
ann
e
l estimatio
n
.
The se
ri
al
im
pl
em
ent
a
t
i
on of
t
h
e real
-
v
al
ue
d B
l
oc
k DC
D
al
go
ri
t
h
m
wi
l
l
be t
h
e sm
al
l
e
st
har
d
wa
re
im
pl
em
ent
a
t
i
o
n an
d i
t
i
s
not
abl
e
for sm
all
e
r t
h
an any
o
t
her m
e
t
hods req
u
i
r
i
n
g m
u
l
t
i
p
l
i
cat
i
on o
p
er
at
i
o
n
s
.
Howev
e
r, th
e up
d
a
te
rate is li
mited
as
th
e
resid
u
a
l
v
ector is up
d
a
ted
sequ
en
tially.
REFERE
NC
ES
[1]
Sufeng Niu Sizhou, Wang Aslan,
S. Saniie J, “Hardware and Software
Design for QRD decom
p
o
s
ition Recursive
Least Square Algorithm”,
D
e
partment o
f
Electrical and
Computer Engin
eering
IEEE
, 2013, pp. 97
8-982.
[2]
Marjan Karkooti, Joseph R.
Cavallaro, “FPGA I
m
plementation o
f
Matr
ix Inversion Using
QRD-
RLS Algorithm,”
2005 IEEE,
pp. 1625-1629.
[3]
Md. Zulf
iquar
Ali Bhotto
,
and
Andreas Anton
i
ou, “
N
ew
Im
proved Re
cursive
Least-Squar
e
s Adaptiv
e-Filt
ering
Algorithms,”
IEEE Transactions on Circuits
and Systems—I: Regular Papers,
June 2013, Vol. 60,
No. 6, pp. 1549-
1557.
[4]
Reza Arablou
e
i
, Kutlu
y
ı
l Do
ğ
anç
a
y
,
and Tü
lay Adal
,
“
U
nbiased Recursive Le
a
s
t-
Squares Estim
ation Utiliz
ing
Dichotomous C
oordinate-D
es
ce
nt Iterat
ions
,”
I
EEE transaction
s
on
signal pro
cessing
, Vol. 62, No. 11, June
1
,
2014, pp
1053-5
87.
[5]
Cristian Stanciu and Cristian Anghel,“N
umerical Properties of the DCD-RLS
Al
gorithm for Stereo Acoustic Ech
o
Cance
lla
tion,
”
I
EEE
, 2014
, pp
.
978-781.
[6]
Juan Paulo Rob
l
es Balestero
,
Fern
ando Lessa
Tofoli, Grover
Victor Torr
ico-
Bascop´
e, “Active Online S
y
stem
Identif
ication of
Switch Mode D
C
–DC Power Converter
Ba
sed
on Efficien
t Recursive
DCD-IIR Adaptive Filter,”
IEEE Transactio
ns
on Power
Electronics
, Vol. 27
, No. 11, November 2012
, p
p
. 08
85-8993.
[7]
Jie Liu; Zakh
ar
ov, Y, “FPGA
implem
entat
i
on
of RLS
adapt
i
v
e
fil
t
ers
us
ing
dichotomous co
ordinate descen
t
iter
a
tions,
”
I
E
EE International
Conference I
E
EE
, 2009
, pp
. 978
-982.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
089
-48
64
I
J
RES Vo
l. 4
,
N
o
. 3
,
No
v
e
m
b
er
201
5
:
2
09
–
21
2
21
2
[8]
Yuriy
Zakh
arov
t, Georg
e
White and Jie Liut, “Fast
RLS algorithm using dichotom
ous co
ordinate descen
t
iter
a
tions,
”
Con
f
erence Record o
f
th
e Forty-Fi
rst
Asilomar Confer
ence on 2007
IEEE,
4-7 Nov
.
20
07,pp 431-435
.
[9]
Purushothaman A and Dr. C. Vijay
kumar
, “Implementation of
Lo
w power s
y
stol
i
c
bas
e
d RLS
ad
ap
tive F
i
l
t
er us
ing
FPGA”
Evaluation Warning : The document was created with Spire.PDF for Python.