Intern
ati
o
n
a
l
Journ
a
l of
Re
con
f
igur
able
and Embe
dded
Sys
t
ems
(I
JRES)
V
o
l. 4,
N
o
.
2
,
Ju
ly 20
15
, pp
. 12
2
~
12
8
I
S
SN
: 208
9-4
8
6
4
1
22
Jo
urn
a
l
h
o
me
pa
ge
: h
ttp
://iaesjo
u
r
na
l.com/
o
n
lin
e/ind
e
x.ph
p
/
IJRES
FPGA B
a
s
e
d Controll
er Area Network
Abd
o
lh
amid Shor
a
bi
*
* Departm
e
nt
of
Ele
c
troni
c
Engin
eering
,
Bus
h
ehr
Branch Is
l
a
m
i
c
Azad Unive
r
s
i
t
y
, Bus
h
ehr
,
Ir
an
Article Info
A
B
STRAC
T
Article histo
r
y:
Received Dec 20, 2014
Rev
i
sed
Mar
28
, 20
15
Accepted Apr 20, 2015
In this pap
e
r th
e Controller Ar
ea Network (C
AN) Controller
is presented
.
CAN is
an ad
vance
s
e
ri
al bu
s
com
m
unicatio
n protoco
l
th
at efficien
tly
supports distributed, broad
cast real-time con
t
rol and
fault toler
a
nce featur
es
for automobile industries to pro
v
id
e cong
estion
free n
e
tworking
. The CAN
Controller
is d
e
signed for
schedu
ling of
m
e
ssages, consist
of
the
Transm
itte
r
Controller
,
FIFO buffer, CRC g
e
nerator
and bit stuffer. Sch
e
dulin
g messages
on CAN corresponds to assigning identif
iers (IDs) to m
e
ssage according t
o
their pr
iorit
i
es.
Non Return to
Ze
ro (NRZ)
co
ding and Non
Destructiv
e
Bitwise Arbitr
ati
on (NDBA) is used. Th
e data
is taken f
r
om the b
u
ffer FIFO,
bit stuff
e
d
and t
h
en tr
ansm
itted
after
CRC is
per
f
orm
e
d. Th
e wh
ole d
e
sign is
captur
e
d entir
ely in VHDL language us
ing botto
m up
design and verification
methodolog
y
.
The proposed con
t
roller was
desig
n
ed for app
lications needin
g
high lev
e
l d
a
ta integrity
and d
a
ta rates
up
to 1Mb
p
s. The
applications of CAN
are fac
t
or
y
auto
m
a
tion, m
achine
control,
au
tom
obile
, avioni
cs and aerospace,
building automation.
Keyword:
C
ont
r
o
l
l
e
r a
r
ea
net
w
o
r
k
FIF
O
FPGA
NDB
A
No
n
retu
rn
to z
e
ro
Copyright ©
201
5 Institut
e
o
f
Ad
vanced
Engin
eer
ing and S
c
i
e
nce.
All rights re
se
rve
d
.
Co
rresp
ond
i
ng
Autho
r
:
Abdo
lh
am
id
Sh
orab
i,
Depa
rt
m
e
nt
of
El
ect
roni
c
En
g
i
neeri
n
g,
Bu
s
h
ehr
Br
an
ch
I
s
la
mic
A
z
a
d
Un
iv
er
s
ity,
Bus
h
eh
r
,
Ir
a
n
.
Em
a
il: h
a
m
i
d
.
so
hrab
i84
4
@gmail.co
m
1.
INTRODUCTION
Net
w
or
k bet
w
een i
n
dust
r
i
a
l
equi
pm
ent
,
est
a
bl
i
s
he
d t
h
r
o
u
gh C
O
N
T
R
O
L
LER
AR
EA
N
E
T
W
OR
K i
s
sim
i
l
a
r
t
o
com
put
e
r
net
w
or
k.
The pr
ot
oc
ol
use
d
i
s
C
AN p
r
ot
ocol
.
A co
m
put
er net
w
o
r
k i
s
a co
m
m
uni
cat
i
o
n
syste
m
that allows
com
puter
to exc
h
a
nge
inform
ation
with each
othe
r i
n
a
m
eaningful way. A protoc
ol
is
a
form
alized set
of procedural rules fo
r the exchange of inform
ation and fo
r th
e in
teraction
s
of th
e n
e
two
r
ks
i
n
t
e
rco
n
n
ect
ed
no
des.
IS
O
(7
49
8)
defi
n
e
s a com
m
u
n
i
cat
i
on st
an
d
a
rd
kn
o
w
n a
s
t
h
e op
en s
y
st
em
s
i
n
t
e
rco
n
n
ect
i
o
n (
O
S
I) m
odel
.
The
OS
I m
odel
defi
ne
s se
ve
n i
n
de
pen
d
e
n
t
l
a
y
e
rs of
a p
r
o
t
ocol
st
ack
. T
h
ey
are
A
p
p
licatio
n, Pr
esen
tation
,
Sessio
n
, Tr
an
sp
or
t, n
e
two
r
k
,
d
a
ta-
lin
k
and
physical la
yer
.
Th
e CAN
sp
ecificatio
n
(ISO 118
98
)
d
i
scu
ss
o
n
l
y th
e ph
ysical an
d
d
a
ta-link
layers for a CAN n
e
two
r
k
.
C
AN is in
tern
atio
n
a
lly
st
anda
rdi
z
e
d
b
y
Int
e
r
n
at
i
o
nal
St
an
dar
d
Or
ga
ni
zat
i
on
(I
SO
)
and
S
o
ci
et
y
Of
Aut
o
m
o
t
i
v
e Engi
neers
(S
AE
).T
h
e
Germ
an C
o
m
p
any
R
obe
rt
B
o
sc
h Gm
bH, f
o
r t
h
e aut
o
m
obi
l
e
i
ndu
st
ry
o
r
i
g
i
n
al
l
y
devel
ope
d t
h
e C
o
nt
rol
l
e
r
Area
Net
w
o
r
k
du
ri
n
g
t
h
e l
a
t
e
1
9
8
0
’
s. C
A
N
bus
i
s
desi
g
n
e
d
fo
r c
o
m
m
uni
cat
i
on
bet
w
ee
n
m
i
croco
n
t
r
ol
l
e
rs i
n
an aut
o
m
o
tive envi
ronm
ent. It is used to e
x
change
i
n
fo
rm
at
i
on bet
w
een
on
-
boa
rd El
ect
ro
ni
c C
o
nt
rol
U
n
its
(EC
U
s
)
suc
h
a
s
t
h
e engi
ne
m
a
nagem
e
nt
sy
st
em
, gearb
o
x
, i
n
st
r
u
m
e
nt
pack
s an
d b
o
d
y
el
ect
roni
cs.
In
19
9
3
CA
N b
e
co
m
e
th
e stand
a
rd
s I
S
O
11
898
(f
or
h
i
gh
sp
eed
ap
p
lication
s
)
an
d ISO 115
19
(
f
or
low
sp
eed
ap
p
lication
s
). CAN is a m
u
l
ti-
m
a
ster serial co
mm
u
n
i
catio
n
bu
s for h
i
gh sp
eed, h
i
g
h
no
ise-imm
u
n
ity
and
error
detection features. C
A
N is a
high-i
ntegrity seri
al
da
t
a
com
m
uni
cati
ons
b
u
s
fo
r re
al-tim
e applications
.
Op
erates at data rates of up
to
1
Meg
a
bits p
e
r se
c
o
nd .Has e
x
cellent error
detection
and c
o
nfine
m
ent
cap
ab
ilities It is n
o
w b
e
i
n
g
used
in
m
a
n
y
o
t
h
e
r indu
strial au
to
m
a
tio
n
and
con
t
ro
l app
licatio
n
s
.
Th
e
pa
p
e
r
is
or
ga
ni
zed as f
o
l
l
o
w
s
:
In sect
i
ons 2 a
nd
3 a bri
e
f
descri
pt
i
o
n of t
h
e e
x
i
s
t
i
n
g an
d pr
o
p
o
s
e
d
sy
st
em
feat
ures are
prese
n
t
e
d
.
C
o
n
t
rol
l
e
r A
r
ea N
e
t
w
o
r
k s
h
o
w
n i
n
sect
i
on 4
,
and t
h
e si
m
u
l
a
t
i
on
resul
t
s
an
d
pape
r co
ncl
u
si
on a
r
e
gi
ve
n i
n
sect
i
o
n
5.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
089
-48
64
I
J
RES Vo
l. 4
,
N
o
. 2
,
Ju
ly 2
015
:
12
2
–
128
12
3
2.
E
X
ISTNG SYSTEM
Th
e Ex
istin
g
syste
m
is
th
e syste
m
b
e
fore CAN sp
ecificati
ons
and the sta
nda
rd chi
p
CAN is shown
in
(Figu
r
e 1).
Fi
gu
re
1.
B
e
f
o
r
e
C
A
N
The c
o
nnections a
r
e
poi
nt to
poi
nt connection from
each a
n
d eve
r
y
node
in the
existing
syste
m
. The
standa
rd c
h
ips
are already available but the
m
a
in disa
dva
ntages
of usi
n
g the chips are
as follows
. T
h
ey are
not
easy
t
o
i
n
t
e
grat
e an
d n
e
e
d
l
a
rge m
e
m
o
ri
es, soft
ware f
o
r
basi
c o
p
erat
i
on, m
a
xim
a
l
am
ount
of s
u
p
p
o
rt
,
not
ready
t
o
use a
n
d fa
ul
t
det
ect
i
o
n i
s
ve
ry
di
ffi
c
u
l
t
.
They
are
n
o
t
use
d
f
o
r t
h
e
st
andal
one a
p
pl
i
cat
i
ons as
w
e
l
l
as
in powe
rful com
m
unication
m
odules. They
will not gua
ra
ntee long-term
availability of products. T
h
e
y
have
li
mitatio
n
s
su
ch
as size an
d
p
o
wer co
nsu
m
p
tio
n. Th
e
freq
u
e
n
c
y req
u
i
red
lo
n
g
-term
av
ailab
ility
ma
k
e
s its
usa
g
e i
m
possi
b
l
e or
ri
s
k
y
.
3.
PROP
OSE
D
SYSTE
M
The p
r
o
p
o
se
d sy
st
em
i
s
desi
gn
of C
A
N C
ont
rol
l
e
r u
s
i
n
g
VLSI arc
h
i
t
e
ct
ure. Fi
el
d P
r
og
ram
m
able
Gate Ar
ray
(F
PG
A) is u
s
ed
fo
r ha
rd
wa
re im
plem
enta
tio
n
.
CAN
on
FPGA en
ab
le to
see b
it b
y
b
it, wh
at
h
a
pp
en
s on
CAN
b
u
s
. In
add
itio
n
to
v
a
lid CAN m
e
ssag
e
s, b
it erro
r cases, error coun
ters, in
tern
al
statu
s
,
fram
e
p
o
s
ition
etc can
b
e
seen on
lin
e.
Fi
gu
re 2.
W
i
t
h
C
A
N
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
RES I
S
SN
:
208
8-8
7
0
8
FPGA
Based
Contr
o
ller Are
a
Network
(
A
b
dol
ha
mi
d
S
h
o
r
abi
)
12
4
The a
b
ove al
l
can
be
d
one
wi
t
h
out
usi
n
g a c
o
m
p
l
e
t
e
pc
based
C
A
N
Anal
y
zer t
o
ol
. T
h
e
hi
g
h
flex
ib
ility o
f
these so
l
u
tio
ns
po
sitio
n
s
FPGA CAN nod
es
t
o
g
e
th
er with
so
ftware b
a
sed
solu
tio
n
(CPU+C
AN).
The norm
ally
higher price
per
pa
rt of the
FPGA is c
o
mpensated
for
by the ease of
use
whe
r
e
no
pr
o
g
ram
m
i
ng
kn
o
w
s
ho
w a
n
d s
o
ft
wa
re m
a
int
e
na
nce i
s
ne
eded
. C
A
N s
o
l
u
t
i
o
n
s
o
n
F
P
G
A
d
o
not
dep
e
n
d
o
n
a
part
i
c
ul
a
r
t
ech
nol
ogy
or
ve
rsi
o
n
o
f
a c
h
i
p
, si
nce t
h
e
ci
rc
ui
t
descri
pt
i
o
n
i
s
e
a
si
l
y
port
a
bl
e t
o
a
n
y
t
y
pe
of
F
P
G
A
.
The a
d
ditional
features ca
n be added. T
h
e
c
i
rcuit is
op
timally protected
against t
h
e c
o
p
y
i
ng
of
t
h
e
pa
r
t
i
c
ul
ar
pr
o
j
ect
. FP
G
A
pr
ot
ot
y
p
i
ng i
s
im
port
a
nt
ar
ea wh
ere c
o
m
p
l
e
x
AS
IC
de
vel
o
pm
ent
s
can be
p
r
ot
ot
y
p
e
d i
n
har
d
ware.
R
eal
sy
st
em
wi
de
n
e
t
w
o
r
k
si
m
u
l
a
ti
ons
are
d
one
wi
t
h
F
P
G
A
ba
sed C
A
N
n
o
d
e
s
at
l
o
w c
o
st
.
Thi
s
of
fers
t
echn
o
l
o
gy
i
n
de
p
e
nde
nt
descri
p
t
i
on
of
a l
o
n
g
t
e
rm
avai
l
a
bi
l
i
t
y
and
bet
t
e
r
p
e
rf
orm
a
nce
th
ro
ugh
in
tellig
en
t
h
a
rd
ware su
ppo
rt of
hig
h
e
r layer fun
c
tio
ns. Co
m
b
in
ation
of DSP techn
o
l
o
g
y
an
d
p
e
r
i
p
h
e
r
a
ls all o
n
t
o
o
n
e
ch
i
p
can
b
e
perf
ormed
.
Th
e m
e
s
s
ag
e
r
o
u
ting
,
seg
m
en
tatio
n
an
d r
eassem
b
ly o
f
long
f
r
a
m
e
s, au
to
m
a
tic co
nf
igu
r
at
io
n
of
each
nod
e etc is suppo
r
t
ed
b
y
pro
p
o
s
ed
system
. Th
is
p
r
op
o
s
ed syste
m
even
w
o
rks
st
a
ndal
one
.
The hi
gher c
o
st of the application s
p
ec
ific
part
s are
m
o
re t
h
an c
o
m
p
ensat
e
d f
o
r
by
bet
t
e
r
per
f
o
r
m
a
nce,
pr
o
duct
e
x
cl
us
i
v
i
t
y
and l
o
ng
t
e
rm
savi
ngs
.
I
n
t
e
grat
i
o
n
t
echn
o
l
o
gi
es m
a
y
chan
ge
b
u
t
t
h
e
dat
a
base
rem
a
i
n
s t
h
e sam
e
. It
i
s
e
ffi
ci
ent
a
n
d ca
n
be
do
ne
ve
ry
fast
.
4.
CONTROLLER ARE
A
NETWORK
C
AN C
o
nt
r
o
l
l
e
r Area
Net
w
or
k) i
s
a rel
i
a
bl
e hi
g
h
-
p
e
r
f
o
rm
ance prot
oc
ol
, w
h
i
c
h
was
desi
g
n
ed
fo
r
l
i
nki
n
g
c
ont
rol
u
n
i
t
s
i
n
a
hea
v
i
l
y
di
st
ri
b
u
t
e
d e
nvi
r
o
nm
ent
.
It
was
de
vel
o
ped
by
R
obe
rt
B
o
sch
Gm
bH
fo
r t
h
e
aut
o
m
obi
l
e
i
n
d
u
st
ry
,
whe
r
e a
rel
i
a
bl
e b
u
s s
y
st
em
was needed t
o
re
duce
t
h
e ab
un
da
nt
am
ount
of
wi
re
s i
n
a
vehi
cl
e. C
A
N
pr
ot
oc
ol
i
s
a
b
u
s
pr
ot
oc
ol
wi
t
h
m
a
ny
desi
ra
b
l
e pr
op
ert
i
e
s f
o
r em
bedde
d a
n
d real
–t
i
m
e syst
em
s,
C
AN i
s
i
n
ex
p
e
nsi
v
e a
nd wi
del
y
used i
n
f
act
ory
au
tom
a
tion and in ve
hicles. CAN
bus is an on a line-
t
o
p
o
l
o
gy
. C
A
N i
s
a seri
al
c
o
m
m
uni
cat
i
on bus
desi
gne
d
fo
r b
r
o
a
dcast
i
ng s
h
ort
re
al
-t
i
m
e cont
r
o
l
m
e
ssages.
To
day
,
i
t
i
s
us
ed i
n
m
a
ny
ot
her a
r
eas
, t
o
o,
w
h
ere
secu
re
com
m
uni
cat
i
on
bet
w
ee
n c
o
n
t
rol
u
n
i
t
s
i
s
ne
eded
,
e.g.i
n
the aut
o
mation industry. Re
m
a
rk
ab
le featu
r
es are it
s
m
i
n
i
m
a
l la
te
n
c
y, fail-safe
b
e
h
a
v
i
or du
e to
error
co
rrectio
n precau
tio
ns
wh
ich
h
a
v
e
b
e
en
im
p
l
e
m
en
ted
a
n
d low c
o
nnection c
o
sts for s
u
bscri
b
er circuits.
The
pr
ot
oc
ol
was rai
s
e
d
a
n
i
n
t
e
r
n
at
i
onal
st
anda
r
d
i
n
IS
O-
DIS
1
1
8
9
8
a
n
d I
S
O
-
D
I
S
1
1
5
1
9
-
1
.
seve
ral
chips a
r
e alrea
d
y comm
ercial
ly available according to s
p
e
c
ification 2,
0A or 2,0B
(E
xtende
d CAN) .
These
devices
are eit
h
er m
i
croproce
ssors wit
h
inte
grate
d
CAN
i
n
terface, t
h
at ca
n
be
directly connected to t
h
e CAN
bus
,
or stand-a
l
one C
A
N c
o
ntrollers, that ca
n act as
an int
e
rface
bet
w
een the
host
proce
ssors a
n
d the
CAN
bus
. A
not
her t
y
pe are so cal
l
e
d SLI
O
s (Se
r
i
a
l
Li
nked I
n
put
O
u
t
p
ut
),
whi
c
h are i
n
p
u
t
/
out
put
de
vi
ces wi
t
h
integrate
d
CAN interfaces t
h
ese in
tellige
n
t
sensors or actuators
provi
de the m
eans for realization of
distributed syste
m
s.
Fi
gu
re
3.
C
A
N
Tra
n
sm
i
t
t
e
r
4.
1. T
e
c
hni
cal
D
a
t
a
Because of the
usage in highl
y
di
stributed e
nvi
ronm
ents, the transm
i
ssion m
e
dia
should either be a
n
optical fi
bre
or a s
h
ielde
d
ca
ble by two wire
s,
whe
r
e
t
h
e si
gnal
i
s
det
e
rm
ined
by
t
h
e
v
o
l
t
a
ge
di
f
f
ere
n
ce.
Th
e
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
089
-48
64
I
J
RES Vo
l. 4
,
N
o
. 2
,
Ju
ly 2
015
:
12
2
–
128
12
5
tran
sm
issio
n
rate was ch
o
s
en
b
e
tween
10
k
b
it/s an
d
1
m
b
it/s, with
a cap
acity o
f
0
to
8
b
y
te o
f
data p
e
r
m
e
ssage.
4.
2. B
r
o
a
dc
ast
i
ng
The C
A
N pr
ot
ocol
k
n
o
ws
no
sou
r
ce or
dest
i
n
at
i
on
ad
d
r
ess
.
A m
e
ssage i
s
broa
dcast
e
d t
o
al
l
nodes
sim
u
l
t
a
neousl
y
. Each m
e
ssage cont
ai
ns a
n
i
d
ent
i
f
i
e
r
of
1
1
bi
t
o
r
2
9
bi
t
(ext
en
de
d C
A
N
)
des
c
ri
bi
n
g
i
t
s
conte
n
ts. By an accepta
nce filtering m
echa
n
ism
each nod
e can distingui
s
h the rele
vant
m
e
ssages from the
i
rrel
e
va
nt
ones
.
4.
3. Mul
t
i
m
as
ter Netw
or
k Ma
na
geme
nt
Each
nod
e is allo
wed
t
o
start tran
sm
issio
n
,
if th
e
bus is idle (carrier se
ns
e). A m
e
ssage on t
h
e bus
m
u
st
not
be i
n
t
e
rr
u
p
t
e
d
(n
o
n
-
d
est
r
uct
i
v
e)
,
unl
ess a
n
error is d
e
tected
. If two
n
odes start tran
smit
tin
g
si
m
u
ltan
e
o
u
s
ly
, th
e m
e
ssag
e
with
th
e l
o
wer
v
a
lu
e as th
e
i
d
en
tifier will
h
a
v
e
th
e h
i
gh
er
prio
rity, an
d
t
h
e o
t
h
e
r
messag
e
s will
b
e
ab
orted
(arb
itratio
n withou
t ti
m
e
co
n
s
um
p
t
io
n
)
. Th
er
efore CAN is a CSMA/CA
p
r
o
t
o
c
o
l
(Carrier Sen
s
e Mu
ltip
le Access/Co
llisio
n
Avo
i
d
a
n
c
e). Th
e
C
AN
can be u
s
ed
i
n
real
-ti
m
e en
v
i
ro
n
m
en
t, as
a
messag
e
with th
e
h
i
gh
est
p
r
iority will n
e
v
e
r
tak
e
lon
g
e
r t
h
an
2
5
9
b
it tim
es
fo
r t
r
an
sm
issi
o
n
.
4.
4. E
r
r
o
r
Ha
ndl
i
n
g
The
following
mechanism
s
are use
d
i
n
t
h
e
C
A
N
p
r
ot
oc
ol
f
o
r er
r
o
r
det
ect
i
o
n:
A tra
n
sm
itter checks
whet
her
sent
out
bits appear on t
h
e
bus
.
Cyclic redunda
n
cy chec
k
(CR
C
)
Bit stu
ffing
Check of the
fra
m
e
form
ats
Ack
n
o
wle
dge
bit
According to the five sim
u
ltaneo
us errors
are defi
nitely
detect
ed. T
h
is corres
ponds to a ha
mming
distance of
6.
In
or
der t
o
g
u
a
rant
ee
d, t
h
e s
y
st
em
wi
de dat
a
consi
s
t
e
ncy
an i
n
c
o
r
r
ect
m
e
ssage i
s
de
st
r
o
y
e
d
by
t
h
e
sender itself or by a receiving node
as soon as the error is detected.
The sendi
ng
node will then repeat the
tran
sm
issio
n
of th
is fram
e.
If a perm
anent failure occurs a node
will
disconnect
itself logically from
the network. Thus the
fun
c
tion
a
lity o
f
th
e n
e
t
w
ork is gu
aran
teed, ev
en
if certain
no
d
e
s fail to op
erate correctly.
W
i
t
h
all th
ese
q
u
a
lities th
e Co
n
t
ro
ller Area
Netwo
r
k
is
v
e
ry su
itab
l
e i
n
an
en
v
i
ron
m
en
t, wh
ere sh
ort
m
e
ssages
have
t
o
be e
x
c
h
an
ged
bet
w
een
p
eer st
at
i
o
ns.
W
i
t
h
a
ve
ry
s
m
al
l
over
h
ead
secu
re c
o
m
m
uni
cat
i
o
n
can
be est
a
bl
i
s
he
d.
A
ddi
t
i
o
n
a
l
l
y
t
h
e sm
al
l o
v
er
hea
d
al
s
o
resul
t
s
i
n
hi
gh
ba
u
d
rat
e
s an
d e
v
en
rea
l
-t
im
e
requirem
ents can be m
e
t. For these reas
ons
m
o
re
and m
o
re ap
pl
i
cat
i
o
ns are usi
ng t
h
e C
ont
rol
l
e
r
Area
Net
w
or
k
fo
r c
o
m
m
uni
cat
i
on
b
e
t
w
een el
ect
r
o
ni
c co
nt
r
o
l
uni
t
s
i
n
a
di
st
ri
but
e
d
sy
st
em
[2]
.
4.
5. Mess
a
g
e Form
at
Figu
re 4.
M
e
ss
age fo
rm
at
The m
eaning of the
bit fiel
ds
are:
1
.
SOF—The sing
le d
o
m
in
an
t start o
f
fram
e
(SOF) b
it mark
s th
e start
o
f
a m
e
ssag
e
, an
d
is u
s
ed
to
sy
nch
r
o
n
i
ze t
h
e n
ode
s
on
a
b
u
s a
f
t
e
r
bei
n
g i
d
l
e
.
2
.
Id
en
tifier—The Stan
d
a
rd
CAN
11
-b
it id
en
tifier estab
lish
e
s th
e
p
r
i
o
rit
y
o
f
th
e m
e
ssag
e
. Th
e lower th
e
bi
na
ry
val
u
e, t
h
e
hi
g
h
er
i
t
s
p
r
i
o
ri
t
y
.
3.
R
T
R
—
T
h
e
si
n
g
l
e
rem
o
t
e
t
r
ansm
i
ssi
on r
e
que
st
(R
TR
)
bi
t
i
s
d
o
m
i
nant
w
h
en
i
n
fo
rm
at
i
on i
s
re
qui
re
d
fr
om
anot
her
no
de.
Al
l
nodes
re
cei
ve t
h
e req
u
est
,
b
u
t
t
h
e i
d
ent
i
f
i
e
r d
e
t
e
rm
i
n
es t
h
e speci
fi
ed n
ode
. Th
e
respondi
ng dat
a
is also
received
by
all node
s and
use
d
by
any node inte
rested.
In this
way all data
being
use
d
i
n
a sy
st
e
m
i
s
uni
f
o
rm
.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
RES I
S
SN
:
208
8-8
7
0
8
FPGA
Based
Contr
o
ller Are
a
Network
(
A
b
dol
ha
mi
d
S
h
o
r
abi
)
12
6
4
.
IDE—A
do
m
i
n
a
n
t
sing
le id
en
tifier ex
ten
s
i
o
n
(IDE)
b
it mean
s th
at a stan
d
a
rd
C
AN
id
en
tifier
with n
o
ex
ten
s
i
o
n is b
e
in
g
t
r
an
sm
itted
.
5.
r0
—R
eser
ved
bi
t
(f
o
r
pos
si
bl
e use
by
fut
u
re
st
an
dar
d
am
endm
ent
)
.
6.
DLC
—
T
h
e
4-
b
i
t
dat
a
l
e
n
g
t
h
c
ode
(
D
LC
)
co
n
t
ai
ns
th
e nu
m
b
er o
f
b
y
tes o
f
data
b
e
ing
tran
smit
ted
.
7
.
Data—Up
t
o
64
b
its of ap
p
licatio
n
d
a
ta m
a
y
b
e
tran
sm
itted
.
8
.
CRC—Th
e 16-b
it (15
b
its p
l
u
s
d
e
lim
iter
)
cyclic red
u
n
d
a
n
c
y ch
eck
(CRC) co
n
t
ai
n
s
th
e ch
eck
s
u
m
(n
um
ber o
f
bi
t
s
t
r
an
sm
it
t
e
d)
of
t
h
e
prece
di
n
g
a
ppl
i
cat
i
o
n
d
a
t
a
fo
r e
r
r
o
r
de
t
ect
i
on.
9.
ACK—
Eve
r
y node receivi
ng
an
acc
urate message
ove
r
writes this
rec
e
ssive
bit in t
h
e
ori
g
inal m
e
ssage
with a dom
i
nate bit, indicating a
n
e
r
ror-fre
e
m
e
ssage has
been
sent
. Shoul
d
a
recei
ving node detect
a
n
erro
r
and
leav
e th
is b
it
recessi
v
e
, it
d
i
scard
s
th
e m
e
ssage and the se
nding node
re
peats t
h
e m
e
ssage aft
e
r
r
earb
itr
atio
n.
In
t
h
is way each
n
o
d
e
acknow
ledg
es
(A
CK
)
th
e in
teg
r
ity
o
f
its d
a
ta.
A
C
K
is
2 b
its, one is
th
e ackno
wledg
e
m
e
n
t
b
it and th
e secon
d
is a d
e
limiter.
10
.
EOF—
Thi
s
e
n
d-
of
-f
ram
e
(EOF)
7
-
bi
t
fi
el
d
m
a
rks t
h
e e
n
d
of a
C
A
N f
r
a
m
e
(m
essage) an
d
di
sabl
es
bi
t
–
st
uf
fi
n
g
, i
n
di
cat
i
ng a st
uf
fi
n
g
err
o
r w
h
en
dom
i
n
ant
.
Wh
en 5
bi
t
s
of t
h
e sam
e
l
ogi
c l
e
vel
occu
r i
n
su
ccessi
o
n
du
ri
n
g
norm
a
l o
p
e
ratio
n
,
a b
it
o
f
th
e
o
ppo
site logic lev
e
l is stuffed
in
t
o
th
e
d
a
ta.
Figu
re
5.
Stan
d
a
rd
f
o
rm
at
11.
IFS—
This 7-bit inter-fram
e
space (I
FS) c
o
ntains the am
ount of tim
e re
quired by the controller to m
ove
a co
rrectly
rec
e
ived
fram
e
to
its pr
ope
r
p
o
sition i
n
a m
e
ssage
bu
ffe
r a
r
ea.
1.
SRR—The
substitute rem
o
te reque
st (SRR
) bit replaces
the
RTR bit in t
h
e
standa
rd m
e
ssa
ge location a
s
a
placeholde
r in
the exte
nded form
at.
2
.
IDE—A recessiv
e
b
it in th
e iden
tif
ier ex
ten
s
i
o
n (IDE) i
n
d
i
cates th
at
th
ere
are m
o
re id
en
tifier
b
its to
fo
llow. Th
e 18-b
it ex
ten
s
i
o
n fo
llo
ws IDE.
Fi
gu
re 6.
Ext
e
nde
d f
o
rm
at
3.
r1
—Fol
l
o
wi
ng
t
h
e R
T
R
a
n
d r
0
bi
t
s
, a
n
a
ddi
t
i
onal
reser
v
e
b
i
t
has
been
i
n
cl
ude
d a
h
ea
d
of
t
h
e
DLC
bi
t
.
Fi
gu
re
7.
A
r
bi
t
r
at
i
o
n
o
n
a
C
A
N B
u
s
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
089
-48
64
I
J
RES Vo
l. 4
,
N
o
. 2
,
Ju
ly 2
015
:
12
2
–
128
12
7
4.
6. Mess
a
g
e T
y
pes
Th
ere are fo
ur d
i
fferen
t
m
e
ssag
e
typ
e
s,
o
r
fram
es
th
at can
b
e
tran
sm
itte
d
on
a CAN bu
s: th
e d
a
ta
fram
e
, the rem
o
te fram
e
, the err
o
r
fram
e
, and the o
v
e
r
loa
d
fram
e
. A
m
e
ssage is co
nsid
ered to
be er
ro
r fre
e
whe
n
the
last bit of t
h
e e
n
ding E
O
F
field of a m
e
ssa
ge
is receive
d in the e
r
ror–free recessive
state.
A
d
o
m
in
an
t b
it i
n
th
e EOF field
cau
ses t
h
e transmitter to
rep
e
at a tran
sm
issio
n
.
4.
6.
1. T
h
e
Da
t
a
Fr
ame
The
dat
a
fram
e
i
s
t
h
e
m
o
st
com
m
on m
e
ssage t
y
pe
, a
n
d
i
s
m
a
de up
by
t
h
e a
r
bi
t
r
at
i
o
n
f
i
el
d, t
h
e
dat
a
field
,
the CRC field
,
and
th
e ack
nowledg
em
en
t field
.
Th
e arb
itration
field d
e
termin
es th
e
prio
ri
ty o
f
a
m
e
ssage w
h
e
n
t
w
o
o
r
m
o
re n
odes
are c
o
nt
en
di
n
g
f
o
r t
h
e
bus
. T
h
e a
r
bi
t
r
at
i
o
n
fi
el
d
co
nt
ai
ns a
n
11
-
b
i
t
i
d
ent
i
f
i
e
r
f
o
r C
A
N
2
.
0
A
a
n
d t
h
e R
T
R
bi
t
,
w
h
i
c
h i
s
d
o
m
i
nant
f
o
r
dat
a
fra
m
e
s. Fo
r C
A
N
2.
0B
i
t
c
ont
ai
ns t
h
e
2
9
-b
it id
en
tifier and
th
e RTR
b
it. Nex
t
is the d
a
ta fiel
d
w
h
i
c
h c
ont
ai
ns
zero t
o
ei
g
h
t
b
y
t
es of dat
a
, a
nd t
h
e
CRC field
wh
ich
con
t
ain
s
t
h
e 1
6
-b
it ch
ecksum u
s
ed
for erro
r
d
e
tectio
n. Lastly, th
ere is th
e ack
n
o
w
ledge
m
e
n
t
field
.
Th
e CAN con
t
ro
ller th
at is ab
le t
o
correctly receiv
e a m
e
ssage send
s
a
domin
an
t
ACK
b
it
th
at
o
v
e
rwrites th
e tran
sm
it
ted
recessiv
e
b
it at th
e en
d
of
correc
t
m
e
ssage
transm
ission.
The transm
itter checks for
th
e
presen
ce o
f
th
e d
o
m
in
an
t ACK b
it
an
d
retran
sm
its th
e messag
e
if
no
acknowledge i
s
detected.
4.
6.
2. T
h
e
Re
mote
Fr
ame
Th
e in
tend
ed
p
u
rp
o
s
e
o
f
th
e rem
o
te fra
m
e
is to
so
licit th
e
tran
sm
issio
n
o
f
d
a
ta fro
m
a
n
o
t
h
e
r
n
o
d
e
.
Th
e
rem
o
te frame is si
m
i
lar to
th
e d
a
ta
frame, with
two
i
m
port
a
nt
di
f
f
e
r
ences
. Fi
r
s
t
,
t
h
i
s
t
y
pe
of m
e
ssage i
s
explicitly
m
a
rked as a rem
o
te
fram
e
by a
recessive RTR
bit in the arbitration field,
a
nd
secondly, there
is no
dat
a
.
4.
6.
3. T
h
e E
r
r
o
r Fr
ame
The error
fra
me is a special
m
e
ssage that violat
es th
e
fo
rm
attin
g
ru
les o
f
a C
AN
messag
e
. It is
transm
itted when a
node
dete
cts an e
r
ror i
n
a m
e
ssage,
an
d
causes
al
l
ot
h
e
r n
o
d
es i
n
t
h
e
net
w
or
k t
o
se
nd
an
erro
r
fram
e
as
well. Th
e
o
r
i
g
in
al tran
sm
itter
th
en
au
to
m
a
tic
ally retran
sm
i
t
s
th
e m
e
ssag
e
. Th
ere is an
elab
orat
e
syste
m
o
f
error coun
ters i
n
t
h
e CAN con
t
ro
ller
wh
ich
en
sures
that a
node ca
nnot tie
up a
bus
by re
peatedly
transm
itting er
ro
r
fram
e
s.
4.
6.
4. T
h
e O
v
e
r
l
oad
Fr
ame
Th
e
o
v
e
rlo
a
d
fram
e is
men
tio
n
e
d h
e
re for co
m
p
leten
e
ss. It
is si
m
ilar to
th
e erro
r
fram
e
with
reg
a
rd
to
th
e
form
at,
an
d it is tran
smit
ted
b
y
a
n
o
d
e
th
at
b
e
co
mes to
o bu
sy.
It
is p
r
im
arily u
s
ed
to prov
ide for an
extra
delay bet
w
een m
e
ssages.
4.
7. E
r
r
o
r
Ch
ecki
n
g
an
d F
a
ul
t C
o
n
f
i
n
eme
nt
The C
AN
p
r
ot
ocol
i
n
co
rp
o
r
at
es fi
ve m
e
t
hod
s of
er
ro
r c
h
ec
ki
n
g
:
t
h
ree
at
t
h
e m
e
ssage l
e
vel
an
d t
w
o
at the bit level. If a m
e
ssage fails with any one of
these
error
detection
m
e
thods, it is not accepte
d and
a
n
error fram
e is
gene
rated from
the
r
eceiving
nodes, ca
using the tra
n
sm
itt
ing
node t
o
re se
nd the m
e
ssage until
it is received correctly. Howeve
r, if a fa
ulty node ha
ngs up a bus
by continuously
repeating an
error, its
transm
it
capabilit
y is
re
m
ove
d by its controller after an
error li
m
i
t is
reached. At the message level are the
CRC an
d th
e
ACK slo
t
s
d
i
sp
layed
. Th
e
16
-b
it CRC contain
s
th
e ch
ecksu
m
o
f
t
h
e
p
r
eced
ing
app
licatio
n d
a
ta
for erro
r d
e
tect
io
n
with
a 15-bit ch
eck
su
m
an
d
1
-
b
it d
e
lim
i
t
e
r.
Th
e
A
C
K
f
i
eld
is two
b
its lo
ng
an
d
con
s
ists o
f
th
e acknow
ledg
e b
it an
d an
ackno
w
l
edg
e
d
e
lim
iter
b
it. Fin
a
lly, at
th
e
m
e
ssag
e
lev
e
l th
ere is a fo
rm
ch
eck
.
Thi
s
check looks for fields
in
th
e messag
e
wh
ich
m
u
st
always be rece
ssive bits. If a
dom
inant bit is detected,
a
n
error is ge
ne
ra
ted. The
bits checke
d
are t
h
e
SOF,
EOF, AC
K de
li
miter, and the CRC deli
m
i
t
e
r bits.
At th
e
bit level each
bit transm
itted
is
m
onitore
d
by the
tran
sm
it
ter o
f
t
h
e m
e
ssag
e
. If
a d
a
ta b
it (n
o
t
arb
itration
b
it) is written
on
to
th
e bu
s an
d
its
o
ppo
site is read
, an
erro
r is
g
e
n
e
rated
.
Th
e
o
n
l
y ex
cep
tion
s
t
o
th
is are wit
h
th
e m
e
ssag
e
id
en
tifier
field
wh
ich
is u
s
ed
for
arbitration, and the ac
know
ledge sl
ot which requi
res a
recessive
bit
to be overwritten by
a
dom
i
nant
bit.
Th
e fi
n
a
l
m
e
t
h
od
of erro
r
d
e
tectio
n
is with
th
e b
it stu
ffing ru
le wh
ere aft
e
r fiv
e
con
s
ecu
tiv
e b
its o
f
th
e sam
e
lo
g
i
c lev
e
l, if th
e
nex
t
b
it is no
t a co
m
p
li
m
e
n
t
, a
n
error is
g
e
n
e
rated
.
Stu
f
fing en
su
res
rising ed
g
e
s
avai
l
a
bl
e fo
r o
n
-
g
oi
n
g
sy
nch
r
oni
zat
i
o
n o
f
t
h
e net
w
o
r
k, an
d
that a strea
m
o
f
recessive
bits are not m
i
stak
en for
an error fram
e
, or the seve
n-bit inte
rfram
e
space that signifi
es the end
of a m
e
ssage. Stuffed bits are rem
ove
d
by
a receiving node
’s
c
ont
roll
er before
the
data is forwarde
d to the a
p
plication.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
RES I
S
SN
:
208
8-8
7
0
8
FPGA
Based
Contr
o
ller Are
a
Network
(
A
b
dol
ha
mi
d
S
h
o
r
abi
)
12
8
5.
SIMULATION RESU
LT AN
D
CONC
LUSION
Fi
gu
re
8.
Si
m
u
l
a
t
i
on R
e
sul
t
In t
h
i
s
pa
per
we ha
ve
pape
r
prese
n
t
e
d t
h
e
fu
ndam
e
nt
al
charact
e
r
i
s
t
i
c
s of C
AN a
n
d d
e
si
gne
d t
h
e
C
AN c
ont
r
o
l
l
e
r. Thi
s
C
A
N
bus i
s
b
r
oadca
s
t
bus wi
t
h
a m
u
lti-
m
a
ster
a
r
chitecture
aim
s
the transaction of
messages in a
sm
a
ll scale dis
t
ribute
d
environm
ents. Becau
se of its
real time and fa
ult tolera
nce capa
b
ilit
ies,
CAN c
ontrolle
r has
gaine
d
a wide acce
ptance in a large
num
b
er of a
ppli
cation areas: a
u
tom
o
tive, astronom
y,
ag
ricu
ltu
re,
b
i
och
e
m
i
cal,
m
e
d
i
cal syste
m
s, rob
o
tics, bu
ild
ing
an
d ind
u
strial au
to
m
a
tio
n
REFERE
NC
ES
[1]
Robert Bosch
Gmbh, CAN specificati
on Version
2.0, September
1
991.
[2]
Hanser-Verlag
,
Munchen, Wien, “C
AN Controller Area Network
”
, 1994
.
[3]
E. Bark
e, IMS
Hanover: Bread
board
zum Simulator und
zuru
ck, slid
es for a
workshop about complex s
y
stems
verification, Munich, 1994.
[4]
D. Behr
ens, E.Kiel: “Logi
kemulation
mit FPGAs- Der Weg aus der
Ve
rif
i
kationskrise
?
”, GI/ITG
Workshop,
Anwenderprogrammier-bare
Sch
a
ltung
en, Kalsru
he, 1994
.
[5]
A.
Winter,
D.
Bitruf,
Y.
Tanurhan,
K.
D.
Muller-Glaser,
“
Rapid Prototyping of a
Communication Controller for the
CAN Bus
”, Proceedings of
th
e 7
th
IEEE Internatio
nal workshop on
ra
pid
s
y
stem pr
ototy
p
ing, 1996
.
[6]
Ian Broster, Guillem
Bernat and
Alan Burns, “
Weakly Hard Real-time Constrai
nts on Controller Area Network
”,
P
r
oceedings
of
t
h
e 14
th
Euromicr
o Conferen
ce on
Re
al-Time S
y
stems, 2002, I
E
EE.
[7]
K. Zuber
i
and K
.
Shin, “
Non-preemptive schedu
ling of me
ssages on controller area netw
orks for
real-time contro
l
applications
”, I
n
proceedings o
f
the IEEE Re
al
-Tim
e Techno
lo
g
y
and Appli
cat
ion S
y
m
posium
,
pages 240-249,
Chicago
,
I
llino
i
s, USA, Ma
y
199
5.
Evaluation Warning : The document was created with Spire.PDF for Python.