Internati
o
nal
Journal of P
o
wer Elect
roni
cs an
d
Drive
S
y
ste
m
(I
JPE
D
S)
V
o
l.
7, N
o
. 1
,
Mar
c
h
20
16
,
pp
. 56
~65
I
S
SN
: 208
8-8
6
9
4
56
Jo
urn
a
l
h
o
me
pa
ge
: h
ttp
://iaesjo
u
r
na
l.com/
o
n
lin
e/ind
e
x.ph
p
/
IJPEDS
Compari
s
on of PI
and PI
D Co
ntrolled Bidirectional DC-DC
Converter Systems
K.C.
R
a
mya*
, V
.
J
e
ga
t
h
esan**
*
Department of
Electr
i
cal
and
Electroni
cs
Engin
eering
,
Karun
y
a
Univers
i
t
y
** Departm
e
n
t
o
f
El
ectr
i
c
a
l
and
Ele
c
troni
cs
Eng
i
neering
,
Karun
y
a Univers
i
t
y
Article Info
A
B
STRAC
T
Article histo
r
y:
Received
J
u
l 22, 2015
Rev
i
sed
D
ec 14
, 20
15
Accepte
d Ja
n
8, 2016
This paper deals with comparison of
responses of the PI and the PID
controlled bidir
ectional DC-DC
convert
er s
y
stems. A coupled inductor is
used in the pr
es
ent work to pro
duce high g
a
in
.
Open loop and
closed loop
controlled s
y
stems
with PI and
PID
controllers are designed an
d simulated
using Matlab too
l
. Th
e principles
of
operation and
simulation cas
e studies ar
e
di
sc
usse
d i
n
de
ta
i
l
.
T
h
e
c
o
mpa
r
ison i
s
ma
de
i
n
te
rms of ri
se
t
i
m
e
,
fa
ll
ti
me,
peak ov
ershoot
and stead
y
s
t
ate
error.
Keyword:
Bid
i
rectio
n
a
l DC-DC
Conv
erter
Co
up
led In
du
cto
r
Propo
rtion
a
l
In
tegral
Propo
rtion
a
l Integ
r
al Derivativ
e
Copyright ©
201
6 Institut
e
o
f
Ad
vanced
Engin
eer
ing and S
c
i
e
nce.
All rights re
se
rve
d
.
Co
rresp
ond
i
ng
Autho
r
:
K.C. Ram
y
a,
Depa
rtem
ent of Electrical a
n
d
El
ect
ro
ni
cs E
n
gi
nee
r
i
n
g,
Karun
y
a Un
iv
ersity,
Co
im
b
a
to
re, Ind
i
a.
Em
a
il: ra
m
y
a2
6
14@g
m
ail.co
m
1.
INTRODUCTION
The T
h
e Hi
gh
vol
t
a
ge
gai
n
c
o
n
v
e
r
t
e
r i
s
wi
d
e
l
y
used i
n
m
a
ny
ap
pl
i
cat
i
ons
such as
ren
e
w
a
bl
e ene
r
g
y
sources
, hybrid electric vehi
cles, battery charge
rs etc.,
[1
-9
]. Howev
e
r the v
o
ltag
e
g
a
i
n
is li
mited
b
y
v
a
rious
facts suc
h
as powe
r switc
hes, induct
or a
n
d capaci
t
o
r
.
The
hi
g
h
st
ep u
p
and st
e
p
d
o
w
n
vol
t
a
ge
gai
n
can b
e
obt
ai
ne
d
fr
om
i
s
ol
at
ed c
o
n
v
e
r
t
e
r
by
t
u
ni
n
g
t
h
e rat
i
o
o
f
t
h
e
t
r
ans
f
o
r
m
e
r [
11]
.
It
re
sul
t
s
i
n
hi
g
h
vol
t
a
ge
st
ress
o
n
switch
e
s
wh
ich
i
n
turn
s lead
to lo
w e
ffic
i
ency. In
non-isolated a
p
plica
t
i
ons,
t
h
e n
o
n
-
i
s
ol
at
ed bi
di
re
c
t
i
onal
d
c
–d
c co
nv
erters, su
ch
as mu
ltilev
e
l typ
e
req
u
i
res twel
v
e
switch
e
s. For
th
e req
u
i
rem
e
n
t
o
f
h
i
gh
step-u
p
and
st
ep-
d
o
w
n
vol
t
a
ge
gai
n
s
,
m
o
r
e
n
u
m
b
er o
f
s
w
i
t
c
hes
has
t
o
be a
dde
d.
T
h
i
s
m
a
kes t
h
e ci
rc
ui
t
m
o
re com
p
l
i
cat
ed.
In
three-lev
e
l typ
e
, th
e vo
ltag
e
stress
o
n
t
h
e switch
e
s is
o
n
l
y h
a
lf
of
the
conve
n
tional
type
[10]
.
But,
the
st
ep-
up a
nd st
e
p
-
d
ow
n v
o
l
t
a
g
e
gai
n
s are l
o
w
.
In SE
PIC
/
zeta type, the conversi
on e
fficiency is low bec
a
use it
is a co
m
b
in
atio
n of
t
w
o power
stages.
Th
e
switch
e
d
cap
a
cito
r an
d coup
le
d
indu
ctor
typ
e
can
af
fo
rd
hig
h
ste
p
u
p
and step dow
n vo
ltag
e
g
a
i
n
s
bu
t th
eir circu
it con
f
i
g
ur
at
io
n
is v
e
r
y
com
p
l
i
cated
[
12-2
0
]
. A conv
entio
n
a
l
b
i
-d
ir
ection
a
l co
nv
er
ter
(
B
D
C
)
w
i
t
h
co
up
led
in
du
ctor
is show
n in
Figu
r
e
1.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
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:
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94
I
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Vo
l. 7,
No
.
1,
Mar
c
h
2
016
:
56
–
6
5
57
Fi
gu
re
1.
C
o
nv
ent
i
onal
B
D
C
B
oost
/
B
uc
k C
o
nve
rt
er
Thi
s
co
n
v
ert
e
r
i
s
very
si
m
p
l
e
.
B
u
t
i
t
has t
h
e p
r
o
b
l
e
m
of t
h
e vol
t
a
ge a
n
d cu
rre
nt
ri
p
p
l
e
s at
i
t
s
i
nput
an
d
o
u
t
p
ut
.
Hen
c
e, a larg
e
cap
acito
r
or ind
u
c
t
o
r
filters are req
u
i
red
t
o
su
ppress th
e
ripp
les. Bu
t t
h
is resu
lt in
h
i
g
h
l
o
ss and
l
o
w e
ffi
ci
e
n
cy
. He
nce i
n
o
r
de
r t
o
o
v
e
r
c
o
m
e
t
h
i
s
dra
w
bac
k
o
f
t
h
e
co
nve
nt
i
o
nal
co
nve
rt
er
, a
n
ovel
bi
di
rect
i
o
nal
c
o
n
v
e
r
t
e
r
[1
9-
3
0
]
i
s
p
r
op
ose
d
,
as s
h
o
w
n i
n
Fi
gu
re
2.
Fi
gu
re
2.
Pr
o
p
o
se
d B
i
di
rect
i
o
nal
DC
-DC
C
o
nve
rt
er
The
Pr
op
ose
d
con
v
e
r
t
e
r c
o
ns
i
s
t
of t
w
o
s
w
i
t
c
hes
nam
e
l
y
S1 a
n
d
S
2
,
a c
o
upl
e
d
i
n
d
u
ct
o
r
wi
t
h
sam
e
wi
ndi
ng
t
u
r
n
s
i
n
t
h
e
p
r
i
m
ary
and
secon
d
a
r
y
.
S3
i
s
t
h
e
sy
nc
hr
o
n
o
u
s
rect
i
f
i
e
r.
The
p
r
op
ose
d
co
n
v
ert
e
r
pr
ovi
des:
1)
Hi
ghe
r st
e
p
-u
p a
n
d st
ep
-
d
ow
n
v
o
l
t
a
ge
g
a
i
n
s a
n
d
2
)
l
o
wer
ave
r
age
v
a
l
u
e o
f
t
h
e s
w
i
t
c
h cu
rre
nt
u
n
d
er
sam
e
electric specifi
cations. The
on-state
resistance
R
DS
(
ON
)
of the s
w
itches a
n
d the e
q
uival
e
nt series
resis
t
ances
o
f
th
e coup
led
in
du
ctor
an
d capacitors a
r
e ignored; the
cap
acito
r is suffi
cien
tly larg
e; a
n
d
th
e
v
o
ltag
e
s acro
s
s
the capa
c
itor c
a
n
be treate
d
a
s
constant.
Th
e ab
ov
e literatu
re
d
o
e
s no
t
d
eal with ripp
l
e
redu
ction
u
s
i
n
g Pi-filter. This work
pro
p
o
s
es Pi-filter
fo
r
ri
p
p
l
e
re
d
u
c
t
i
on.
Al
s
o
t
h
e
ab
ove
p
a
pe
rs
do
n
o
t
d
eal
with
th
e co
m
p
ariso
n
b
e
tween
PI an
d PID con
t
ro
lled
b
i
d
i
r
ection
a
l DC to
D
C
co
nver
t
er
system
s.
Th
is wor
k
tr
ies to
id
en
tif
y a su
itab
l
e con
t
ro
ller
fo
r
cl
o
s
ed
l
oop
sy
st
em
. Thi
s
p
a
per i
s
or
ga
ni
zed as f
o
l
l
o
ws:
Anal
y
s
i
s
o
f
St
ep-
u
p m
ode i
s
gi
ve
n i
n
sect
i
o
n 2
.
T
h
e si
m
u
lat
i
o
n
resul
t
s
i
n
bo
ost
m
ode an
d
buc
k m
ode a
r
e
gi
v
e
n i
n
sect
i
o
n
3.
The
w
o
r
k
i
s
c
oncl
ude
d i
n
se
ct
i
on
4.
2.
STEP-U
P MO
DE
The p
r
op
ose
d
con
v
e
r
t
e
r i
n
st
ep-
u
p m
ode i
s
sho
w
n i
n
Fi
g
u
r
e 3. T
h
e p
u
l
s
e
wi
dt
h m
odul
a
t
i
on (P
WM
)
tech
n
i
qu
e is u
s
ed
to con
t
ro
l the switch
e
s
S
1
an
d
S
2
sim
u
ltan
e
ously.
Fi
gu
re
3.
Pr
o
p
o
se
d c
o
n
v
ert
e
r
i
n
st
ep
-u
p m
o
d
e
Thu
s
, t
h
e inductan
ce of
t
h
e co
up
led ind
u
c
t
o
r
can
b
e
ex
pr
essed
as
Evaluation Warning : The document was created with Spire.PDF for Python.
I
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PED
S
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:
208
8-8
6
9
4
C
o
m
p
a
r
i
s
o
n
of
PI
a
n
d
PI
D C
ont
r
o
l
l
e
d Bi
di
r
ect
i
onal
DC
-
D
C
C
onve
r
t
e
r S
y
st
ems
(
K
.C. R
a
my
a)
58
L
1
=
L
2
=
L
(1
)
The m
u
tual inductance M
of t
h
e
co
up
led indu
ctor
is
g
i
v
e
n
b
y
M = K
√
(L
1
L
2
)
=
K
L
(
2
)
Whe
r
e
k
is th
e co
up
ling
co-efficien
t
o
f
co
up
l
e
d
in
du
ct
o
r
.
Hence the voltage across th
e
pri
m
ary and seconda
ry
wi
n
d
i
n
g
of
t
h
e
cou
p
l
e
d
i
n
du
ct
or
can
be
ex
pre
ssed as
12
12
1
1
L
LL
L
L
di
di
di
di
vL
M
L
k
L
dt
dt
dt
dt
(
3
)
12
1
2
2
2
LL
L
L
L
di
di
d
i
d
i
vM
L
k
L
L
dt
d
t
dt
dt
(
4
)
Mo
de I
:
During
th
is m
o
d
e
, Switch
S1
and
S2
are
ON and
S3
is i
n
OFF co
nd
itio
n, as sho
w
n
i
n
figu
re3a.
Fi
gu
re
3a.
Pr
o
pos
ed
C
o
nve
rt
er i
n
M
o
de
1
Hence
,
t
h
e l
o
w
vol
t
a
ge si
de
V
L
is tr
an
sf
err
e
d
to
th
e coupled
in
du
ctor
and
th
e en
er
g
y
sto
r
ed
in
th
e capacito
r
C
H
is d
i
sch
a
rg
ed
to th
e l
o
ad
. Th
u
s
th
e vo
ltag
e
acro
ss L
1
and
L
2
are
obtaine
d as follows
v
L
1
=
v
L
2
=
V
L
(5
)
Sub
s
titu
tin
g (3) an
d (4
) in
to (5
), yield
i
ng
12
01
,
1
Lt
L
t
L
di
di
V
tt
t
dt
d
t
k
L
(
6
)
Mo
de II
:
Du
ri
ng
t
h
i
s
m
ode,
s
w
i
t
c
hes
S1
an
d
S2
are
OF
F a
n
d S
3
i
s
O
N
c
o
n
d
i
t
i
on a
s
s
h
o
w
n i
n
Fi
g
u
r
e
3b
.
Fi
gu
re
3
b
.
Pr
o
pos
ed
C
o
nve
rt
er i
n
M
o
de
2
The
vol
t
a
ge si
de V
L
and the
coupled i
n
duct
or a
r
e in se
ries and t
h
eir energies are tra
n
s
f
erre
d to ca
pacitor C
H
and to t
h
e l
o
ad. T
hus
the
voltage a
n
d curre
nt at this m
ode a
r
e
give
n as
follows
i
L
1
=
i
L
2
(
7
)
Evaluation Warning : The document was created with Spire.PDF for Python.
I
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94
I
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.
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016
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6
5
59
v
L
1
+
v
L
2
= V
L
–
V
H
(8
)
Sub
s
titu
tin
g (3) an
d (4
) in
to (8
), yield
i
ng
12
1
,2
21
Lt
L
t
LH
di
di
VV
tt
t
dt
d
t
k
L
(
9
)
By using the
st
ate space a
v
e
r
a
g
ing m
e
thod,
t
h
e
fo
llowing e
quation is
de
ri
ved from
(6) a
n
d (9)
1
0
12
1
LH
L
DV
V
DV
kL
k
L
(
1
0
)
Th
us t
h
e
v
o
l
t
a
ge
gai
n
d
u
ri
ng
t
h
e st
ep
u
p
m
ode i
s
gi
ve
n as
1
1
H
CCM
s
t
e
p
u
p
L
V
D
G
VD
(
1
1
)
3.
SIMULATION RESULTS
The
si
m
u
l
a
t
i
on
of
t
h
e
bi
di
rect
i
onal
DC
-DC
c
o
n
v
e
r
t
e
rs
wa
s
per
f
o
r
m
e
d
for
bo
ost
m
ode
&
buc
k
m
ode
.
The res
u
lts
are prese
n
ted
he
re.
3.
1. B
o
ost
M
o
de
The
ope
n l
o
o
p
cont
rol
l
e
d
DC
-DC
c
o
n
v
e
r
t
e
r
sy
st
em
i
s
sho
w
n i
n
Fi
gu
re
4
a
. A st
e
p
c
h
an
ge o
f
5V
i
s
appl
i
e
d at
t
h
e
i
n
p
u
t
as sh
o
w
n i
n
Fi
gu
re 4
b
.
T
he c
h
an
ge i
n
out
put
vol
t
a
g
e
i
s
sho
w
n i
n
Fi
gu
re 4c
. T
h
e
out
put
vol
t
a
ge
cha
n
ge
s by
10
V.
The l
o
ad
cu
rre
nt
i
n
c
r
eases
by
1
A
a
s
sh
o
w
n i
n
Fi
g
u
re
4
d
.
The
ch
ange
i
n
o
u
t
p
ut
po
we
r
i
s
sh
ow
n i
n
Fi
gu
re
4e.
T
h
e
p
o
we
r i
n
creases
fr
om
90
W
to
170W.
The i
n
c
r
ease in pow
er
is due
to t
h
e increase
in
th
e i
n
pu
t
vo
ltag
e
.
Figu
re
4a.
Circ
uit Diag
ram
fo
r the
Bo
ost M
o
de
Fig
u
r
e
4b
. I
npu
t
Vo
ltag
e
Fi
gu
re 4c.
O
u
t
put
V
o
l
t
a
ge
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
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8-8
6
9
4
C
o
m
p
a
r
i
s
o
n
of
PI
a
n
d
PI
D C
ont
r
o
l
l
e
d Bi
di
r
ect
i
onal
DC
-
D
C
C
onve
r
t
e
r S
y
st
ems
(
K
.C. R
a
my
a)
60
Fi
gu
re 4
d
. O
u
t
put
C
u
r
r
e
n
t
Fi
gu
re 4e.
O
u
t
put
Po
we
r
C
l
osed
l
o
op
P
I
co
nt
r
o
l
l
e
d sy
s
t
em
i
s
sho
w
n i
n
Fi
g
u
re
5a
.
O
u
t
p
ut
vol
t
a
ge
i
s
sen
s
ed
a
nd
i
t
i
s
co
m
p
ared
with
th
e referen
ce
v
o
ltag
e
to
o
b
t
ain th
e error.Th
e erro
r is
ap
p
lied to
a PI co
n
t
ro
ller.Th
e ou
tpu
t
of PI co
ntro
ller
i
s
com
p
ared
wi
t
h
t
i
m
e
base
vo
l
t
a
ge t
o
pr
o
duc
e u
pdat
e
d
pul
s
e
s.
Fig
u
re
5
a
. Circu
it Diagram
for th
e Clo
s
ed
loo
p
PI Con
t
ro
ller in th
e B
o
ost
Mo
d
e
Vol
t
a
ge
co
nt
r
o
l
i
s
used t
o
m
a
i
n
t
a
i
n
a val
u
e
of
3
0
V at
t
h
e
out
put
.
The
va
ri
at
i
on
of i
n
p
u
t
vol
t
a
ge i
s
sh
own
i
n
Fi
g
u
r
e
5
b
.Th
e
input v
o
ltag
e
in
cr
eases fr
o
m
15
V to
22
V.Th
e
ou
tpu
t
v
o
ltag
e
,
cu
rr
en
t
and
pow
er ar
e
sho
w
n i
n
fi
g
u
r
e
s 5c
,
5d
&
5e
res
p
ect
i
v
el
y
.
The
o
u
t
p
ut
vol
t
a
ge
get
s
c
o
r
r
e
c
t
e
d a
n
d
com
e
s bac
k
t
o
t
h
e
n
o
rm
al
val
u
e.
Fig
u
r
e
5b
. I
npu
t
Vo
ltag
e
Fi
gu
re 5c.
O
u
t
put
V
o
l
t
a
ge
Fi
gu
re 5
d
. O
u
t
put
C
u
r
r
e
n
t
Fi
gu
re 5e.
O
u
t
put
Po
we
r
The
PI
co
nt
r
o
l
l
er i
s
repl
ace
d
by
P
I
D
co
nt
r
o
l
l
er.The
cl
ose
d
l
o
o
p
P
I
D c
ont
r
o
l
l
e
d
DC
t
o
D
C
co
nve
rt
er
ope
rat
i
n
g i
n
b
o
o
st
m
ode i
s
s
h
ow
n i
n
Fi
gu
re
6a.T
he
vari
a
t
i
o
n
of i
n
put
v
o
l
t
a
ge i
s
s
h
ow
n i
n
Fi
gu
re
6
b
.T
h
e
cu
rves
of
o
u
t
p
ut
vol
t
a
ge,
o
u
t
p
ut
cu
rr
ent
an
d
o
u
t
p
ut
po
we
r are
s
h
o
w
n
i
n
fi
g
u
re
s
6c,
6
d
&
6e
re
spect
i
v
el
y
.
T
h
e o
u
t
p
ut
g
e
ts
settled
qu
ick
l
y
with
red
u
ced
o
v
e
rsh
o
o
t
as co
m
p
ared with
PI con
t
ro
lled
system
.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
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:
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94
I
J
PED
S
Vo
l. 7,
No
.
1,
Mar
c
h
2
016
:
56
–
6
5
61
Fig
u
re
6
a
. Circu
it Diagram
for th
e Clo
s
ed
loo
p
PID C
o
n
t
roller in
th
e Boo
s
t Mo
d
e
Fig
u
r
e
6b
. I
npu
t
Vo
ltag
e
Fi
gu
re 6c.
O
u
t
put
V
o
l
t
a
ge
Fi
gu
re 6
d
. O
u
t
put
C
u
r
r
e
n
t
Fi
gu
re 6e.
O
u
t
put
Po
we
r
3.
2.
B
u
ck M
o
de
Th
e
op
en loop con
t
ro
lled
DC-
D
C con
v
e
r
t
er
o
p
e
r
a
ting
in bu
ck
m
o
d
e
is show
n in Figu
r
e
7
a
. Th
e
vari
at
i
o
n o
f
i
n
put
v
o
l
t
a
ge,
ou
t
put
vol
t
a
ge
, o
u
t
p
ut
cu
rre
nt
a
nd
o
u
t
p
ut
p
o
w
er are
sh
ow
n i
n
fi
gu
res
7
b
,
7
c
, 7
d
&
7e respect
i
v
el
y
.
T
h
e out
put
v
o
l
t
a
ge
i
n
crea
ses
by 5V.The
power increa
ses
by 20W.
Figu
re
7a.
Circ
uit Diag
ram
fo
r the
Buc
k
M
o
de
Fig
u
r
e
7b
. I
npu
t
Vo
ltag
e
Fi
gu
re 7c.
O
u
t
put
V
o
l
t
a
ge
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
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:
208
8-8
6
9
4
C
o
m
p
a
r
i
s
o
n
of
PI
a
n
d
PI
D C
ont
r
o
l
l
e
d Bi
di
r
ect
i
onal
DC
-
D
C
C
onve
r
t
e
r S
y
st
ems
(
K
.C. R
a
my
a)
62
Fi
gu
re 7
d
. O
u
t
put
C
u
r
r
e
n
t
Fi
gu
re 7e.
O
u
t
put
Po
we
r
The cl
ose
d
l
o
o
p
PI co
nt
r
o
l
l
e
d
DC
t
o
DC
conve
rt
er sy
st
em
i
s
show
n i
n
F
i
gu
re 8a. T
h
e vari
at
i
o
n i
n
i
n
p
u
t
v
o
l
t
a
ge i
s
sho
w
n i
n
Fi
g
u
re
8b
.T
he i
n
p
u
t
vol
t
a
ge i
n
cr
eases fr
om
30V t
o
3
7
V
.T
he
out
put
vol
t
a
ge
i
n
bu
c
k
m
ode i
s
show
n
i
n
Fi
gu
re 8c
. The o
u
t
p
ut
v
o
l
t
age i
s
15
V.
Ou
t
put
cu
rre
nt
an
d o
u
t
p
ut
p
o
we
r
are sh
ow
n i
n
f
i
gu
res
8d &
8e
res
p
ec
tively. The c
u
rrent is
3.
5
A
a
n
d t
h
e
o
u
t
p
ut
po
wer
i
s
4
8
W
.
Fig
u
re
8
a
. Circu
it Diagram
for th
e Clo
s
ed
loo
p
PI Con
t
ro
ller in th
e B
u
ck
Mo
d
e
Fig
u
r
e
8b
. I
npu
t
Vo
ltag
e
Fi
gu
re 8c.
O
u
t
put
V
o
l
t
a
ge
Fi
gu
re 8
d
. O
u
t
put
C
u
r
r
e
n
t
Fi
gu
re 8e.
O
u
t
put
Po
we
r
The cl
ose
d
l
o
op P
I
D c
ont
r
o
l
l
e
d DC
t
o
DC
conve
rt
er i
s
sho
w
n i
n
Fi
g
u
re
.9a
.
The i
n
put
v
o
l
t
a
ge
i
n
creases
fr
om
30
V t
o
36
V a
s
sh
ow
n i
n
Fi
g
u
re
.9
b.T
h
e c
u
r
v
es o
f
o
u
t
put
vol
t
a
ge
, o
u
t
p
ut
cur
r
ent
a
nd
o
u
t
p
ut
p
o
w
e
r
ar
e show
n
i
n
f
i
g
u
r
e
s
9c, 9d
&
9
e
r
e
spectiv
ely. Th
e
output reac
hes t
h
e re
quire
d
val
u
e due t
o
the cl
ose
d
lo
op
co
n
t
ro
l actio
n
.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
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-86
94
I
J
PED
S
Vo
l. 7,
No
.
1,
Mar
c
h
2
016
:
56
–
6
5
63
Figu
re 9
a
. Circu
it Diagram
fo
r th
e Closed lo
op
PID C
o
n
t
ro
lled
system
in
Bu
ck
Mod
e
Fig
u
r
e
9b
. I
npu
t
Vo
ltag
e
Fi
gu
re 9c.
O
u
t
put
V
o
l
t
a
ge
Fi
gu
re 9
d
. O
u
t
put
C
u
r
r
e
n
t
Fi
gu
re 9e.
O
u
t
put
Po
we
r
The s
u
m
m
ary
of
b
o
o
st
m
ode
and
b
u
c
k
m
ode
are
gi
ve
n i
n
T
a
bl
e 1
&
2
res
p
ect
i
v
el
y
.
Tabl
e
1.
Sum
m
a
ry
o
f
B
oost
M
ode
Boost Mode
Rise Ti
m
e
,
Tr (Sec
s)
Settling Ti
m
e
,
Ts (Secs)
Peak Ti
m
e
,
Tp (Se
c
s)
Steady St
ate
Error,
Ess (Volts)
PI
Contr
o
ller
0.
050
0.
81
0.
53
0.
8
PI
D Contr
o
ller
0.
045
0.
6
0.
51
0.
5
Tabl
e
2.
Sum
m
a
ry
o
f
B
u
ck
M
ode
Buck Mode
Rise Ti
m
e
,
Tr (Sec
s)
Settling Ti
m
e
,
Ts (Secs)
Peak Ti
m
e
,
Tp (Se
c
s)
Steady St
ate
Error,
Ess (Volts)
PI
Contr
o
ller
0.
08
1.
21
0.
83
0.
92
PI
D Contr
o
ller
0.
06
1.
12
0.
63
0.
71
It can
be seen th
at th
e rise ti
m
e
, th
e settlin
g
ti
m
e
, th
e p
e
ak
ti
m
e
an
d
the stead
y state erro
r are redu
ced
b
y
usi
n
g t
h
e P
I
D
cont
rol
l
e
r.
4.
CO
NCL
USI
O
N
C
l
osed l
o
op co
nt
r
o
l
l
e
d bi
di
re
ct
i
onal
DC
-
D
C
conve
rt
er o
p
e
rat
i
ng i
n
b
o
o
s
t
m
ode and b
u
c
k m
ode are
designe
d
and
sim
u
lated suc
cessfully. Closed loop sy
stem
is si
m
u
late
d
with
PI an
d PID co
n
t
ro
llers.Th
e
co
nv
erter h
a
s
b
i
d
i
rection
a
l ab
ility an
d
h
i
g
h
v
o
ltag
e
g
a
i
n
.
Fro
m
th
e resu
lts, it was ob
serv
ed
t
h
at th
e resp
on
se
was b
e
tter
with
PID con
t
ro
ller th
an
PI con
t
ro
ller sin
ce
PID con
t
ro
lled
syste
m
p
r
o
d
u
c
es redu
ced
settli
n
g
tim
e
an
d
stead
y
state error.Th
e co
n
t
ribu
tio
n
o
f
th
is wo
rk
is to
redu
ce th
e
ripp
le u
s
ing
Pi-filter an
d
imp
r
ov
e
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
C
o
m
p
a
r
i
s
o
n
of
PI
a
n
d
PI
D C
ont
r
o
l
l
e
d Bi
di
r
ect
i
onal
DC
-
D
C
C
onve
r
t
e
r S
y
st
ems
(
K
.C. R
a
my
a)
64
d
y
n
a
m
i
c resp
on
se
u
s
ing
PID co
n
t
ro
ller.The scop
e of th
e
p
r
esen
t
work
i
s
th
e sim
u
latio
n
wit
h
PI and PID
co
n
t
ro
llers. The fu
zzy log
i
c
b
a
sed
co
nv
ert
e
r
will b
e
simu
lated
i
n
fu
ture. Th
e co
m
p
arison
will b
e
mad
e
bet
w
ee
n P
I
D a
n
d
f
u
zzy
based
co
nve
rt
er
sy
st
em
s.
REFERE
NC
ES
[1]
M.B. Camara, H. Gualous, F. Gustin,
A. Berthon
, and B. Dak
y
o
,
“DC/DC c
onverter design for supercap
acitor and
batter
y
power
management in
h
y
brid veh
i
cle
applic
ations—
P
ol
y
nom
ial con
t
rol strat
e
g
y
”
,
IEEE T
r
ans. Ind.
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,
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. 587
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.
2010
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[2]
T. Bhattachar
y
a
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a
thew
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L. U
m
anand, “Multiphase bidir
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ctio
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r
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ec
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y
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ele
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e
hic
l
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erg
y
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orag
e s
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EEE
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ang, and
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e
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a
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ic
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I
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.
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008.
[6]
L.
Schuch,
C.
Rech,
H.L.
Hey
,
H.
A.
Grundling,
H.
Pinheir
o, and J.R.
Pinheiro
,
“Analy
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e
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h
-
e
ffi
ci
e
n
cy
bi
di
rec
t
i
o
na
l
i
n
te
grat
ed Z
V
T
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o
nverter for DC-
bus and batter
y
-
b
ank interf
ace”,
IEEE T
r
ans. Ind.
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. 5
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.
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.
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.
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y
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y
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t
em
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r
ans. Ind.
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5.
BIOGRAP
HI
ES OF
AUTH
ORS
K.C. Ram
y
a has done her B.E
fro
m Mailam Engineer
ing College, Mailam, In
dia in th
e
y
ear
2002 and M.E fr
om Sath
y
a
b
a
ma
Univ
ersity
, Chennai, India in th
e
y
e
ar 2010. Presently
she
is a
res
earch
s
c
holar
at Karun
y
a
Univ
ers
i
t
y
, Co
im
bato
re, Indi
a. S
h
e
is
doing her res
ear
ch in th
e ar
ea
of bidir
ectional
DC to DC Conv
erte
rs
appli
e
d to Ele
c
tri
cal
Vehi
cl
es
.
V. J
e
gath
es
an h
a
s
obtain
e
d his
B.E and
M
.
E d
e
gree
from
Bha
r
athi
ar Univers
i
t
y
,
Coim
bator
e
,
India in th
e
y
ear 1999 and 2002 respectively
.
He
obtain
e
d his Ph.D from An
na University
,
Chennai, India
in the
y
e
ar 2010
. He is presen
tly
working
as an Associate Pro
f
essor of EE
E
Departm
e
nt in K
a
run
y
a Universi
t
y
, Co
im
batore
, I
ndia. He is
a f
e
ll
ow m
e
m
b
er of IS
TE, M
e
m
b
er
of IACSIT and Member of I
A
ENG. He has
authored tex
t
book on Basic Electrical and
Electronics Eng
i
neer
ing. He ha
s published various research pape
rs in reputed
Journals. His
res
earch
ar
ea
in
cludes
Ele
c
tr
ic
Circuits
a
nd N
e
tworks, Power
Electr
onics, Development of
Heuristic Algorithms for
Power E
l
ectronic Applica
tions and Application of
Power
Ele
c
troni
cs to
Renewable Ener
g
y
.
Evaluation Warning : The document was created with Spire.PDF for Python.