Inter
national
J
our
nal
of
P
o
wer
Electr
onics
and
Dri
v
e
System
(IJPEDS)
V
ol.
10,
No.
3,
September
2019,
pp.
1270
1280
ISSN:
2088-8694,
DOI:
10.11591/ijpeds.v10.i3.pp1270-1280
r
1270
Single-bit
modulator
f
or
wir
eless
po
wer
transfer
system
Dhafer
J
.
Almakhles
1
,
Aksh
ya
Swain
2
,
Umashankar
Subramaniam
3
1,3
Rene
w
able
Ener
gy
Lab,
Communications
and
Netw
orks
Engineering,
Prince
Sultan
Uni
v
ersity
2
Department
of
Electrical
and
Computer
Engineering,
Uni
v
ersity
of
Auckland
Article
Inf
o
Article
history:
Recei
v
ed
No
v
19,
2018
Re
vised
Feb
23,
2019
Accepted
Mar
15,
2019
K
eyw
ords:
W
ireless
po
wer
transfer
(WPT)
Capaciti
v
e
po
wer
transfer
(CPT)
Proportional
inte
gral
(PI)
Single-bit
Modulator
ABSTRA
CT
This
paper
pr
oposes
a
single-bit
ADC
system
based
Proportional
and
Inte
gral
(PI)
controller
to
maintain
a
desired
le
v
el
of
po
wer
transfer
ef
ficienc
y
in
Capaciti
v
e
Po
wer
T
ransfer
(CPT)
systems.
In
this
paper
,
a
simple
single-bit
ADC
system
i.e.,
Single-
Bit
Modulator
(SBM)
is
considered
as
an
alternati
v
e
to
the
commonly
used
multi-bit
ADC
systems.
Unique
features
of
emplo
ying
SBM
are
1)
its
ability
to
con
v
ert
analog
signals
into
single-bit
signals
and
2)
its
easy
inte
grability
in
digital
chips
with
linear
v
ariable
dif
ferential
transformers
(L
VDTs)
such
as
FPGAs.
A
SBM
based
PI
(SBM-
PI)
controller
is
designed
to
judicially
interf
ace
with
the
single-bit
output
of
SBM.
The
proposed
(SBM-PI)
controller
guarantees
less
hardw
are
resources,
latenc
y
and
re
gulates
the
output
v
oltage
to
pro
vide
the
desired
po
wer
transfer
ef
ficienc
y
.
The
be-
ha
vior
of
SBM-PI
controller
is
compared
to
that
of
a
con
v
entional
multi-bit
controller
,
with
the
results
of
both
controllers
being
identical.
The
ef
fect
i
v
eness
of
the
proposed
controller
with
SBM
is
further
demonst
rated
using
the
e
xperimental
prototype
of
CPT
by
implementing
a
SBM-PI
controller
using
16
MHz
A
Tme
g
a8
microcontroller
.
The
e
xperimental
results
from
a
laboratory
prototype
illustrate
that
SBM-PI
controller
suc-
cessfully
re
gulates
the
output
v
oltage
of
CPT
to
control
the
po
wer
flo
w
.
Copyright
©
2019
Institute
of
Advanced
Engineering
and
Science
.
All
rights
r
eserved.
Corresponding
A
uthor:
Dhafer
Almakhles,
Communications
and
Netw
orks
Engineering,
Prince
Sultan
Uni
v
ersity
,
P
.O.Box
No.
66833
Rafha
Street,
Riyadh
11586
Saudi
Arabia.
Email:
dalmakhles@psu.edu.sa
1.
INTR
ODUCTION
W
ireless
po
wer
transfer
(WPT)
is
a
technique
used
to
transmit
po
wer
from
a
po
wer
source
to
a
load
without
using
ph
ysical
wires
or
conductors.
Electrical
systems
using
WPT
are
becoming
increasingly
popular
and
ha
v
e
g
ained
considerable
attention
in
the
research
field
for
v
arious
applications
including
electric
v
ehicle,
biomedical
implants,
cellphones,
contactless
battery
char
gers
etc.
[1-3].
There
are
tw
o
distinct
techniques
of
WPT
,
namely
Inducti
v
e
Po
wer
T
ransfer
(IPT)
and
Capaciti
v
e
Po
wer
T
ransfer
(CPT).
IPT
uses
the
principle
of
electromagnetic
coupling
and
is
suitable
for
both
lo
w
and
high
po
wer
applications,
whereas
CPT
uses
the
principle
of
electric
coupling
and
is
suitable
for
lo
wer
po
wer
applications.
Among
man
y
adv
antages
of
CPT
is
t
h
a
t
it
has
the
ability
to
transfer
po
wer
through
metal
barriers
with
high
ef
ficienc
y
due
to
its
resistance
to
an
y
e
xternal
interference
[4-9].
Ho
we
v
er
,
one
of
the
issues
with
WPT
sys-
tems
and
CPT
systems
in
particular
is
t
he
inability
to
maintain
the
po
wer
flo
w
at
a
desired
le
v
el.
This
is
mainly
due
to
the
uncertainties
arise
from
load
and
circ
uit
parameter
v
ariations
and
the
operating
frequenc
y
drifting
of
the
po
wer
supply
i.e.,
the
operating
frequenc
y
of
t
h
e
po
wer
in
v
erter
[10-14].
Hence,
proportional–inte
gral
(PI)
and
proportional–inte
gral–deri
v
ati
v
e
(PID)
controllers
are
often
implemented
to
re
gulate
the
v
oltage
in
order
to
control
po
wer
flo
w
between
the
transmitters
and
recei
v
ers
of
WPT
systems
[10,
12,
15,
16].
J
ournal
homepage:
http://iaescor
e
.com/journals/inde
x.php/IJPEDS
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
r
1271
Con
v
entional
digital
controllers
manipulate
discrete
multi-bit
signals
in
order
to
pro
vide
control
to
a
particular
system.
A
significant
disadv
antage
of
the
con
v
entional
controller
is
the
method
in
which
the
desired
analog
information
i
s
processed,
sampled
and
con
v
erted
int
o
the
discrete-time
domain.
Multi-bit
analog
to
Digital
Con
v
erters
(ADC’
s)
increase
the
comple
xity
of
hardw
are
implementation
and
latenc
y
in
order
to
accurately
con
v
e
y
analog
signals
digitally
.
The
hardw
are
resources
of
the
con
v
entional
multi-bit
con
v
erters
i.e.,
wires,
input/output
ports,
etc.,
increase
with
resolution
in
order
to
maintain
the
high
accurac
y
required
in
man
y
control
systems
[17-21].
Multi-bit
ADC’
s
encompass
additional
limitations;
such
as
the
limitation
of
the
finite
w
ord
length
of
particular
processors,
setting
further
boundaries
to
the
maximum
a
v
ailable
resolution
and
hardw
are
resources.
Furthermore,
some
multi-bit
systems
require
a
D
A
C
whi
ch
increases
the
required
hardw
are
e
v
en
further
.
As
an
ef
fort
to
mitig
ate
the
demerits
of
lar
ge
number
of
wires,
comple
xity
of
implementations
and
maintenance
,
one
technique
kno
wn
as
Sigm
a-Bit
Modulation
(SBM),
has
become
quite
popular
for
achie
ving
concise
data
transmissions
and
signal
processing
[22].
This
technique
uses
SBM
to
con
v
ert
the
analog
signal
or
multi-bit
digital
signal
to
single
bit
signal,
which
is
kno
wn
as
single-bit
signal,
pro
viding
se
v
eral
adv
antages
o
v
er
the
con
v
entional
control
scheme
and
signal
processing
technique.
First
and
the
mos
t
ob
vious
adv
antage
of
SBM
is
that
the
signal
is
represented
by
s
ingle
bit,
which
simplifies
transmission
route
to
one
wire
per
signal.
Second,
emplo
ying
SBM
reduces
the
hardw
are
resources,
comple
xity
of
implementation
and
remo
v
e
the
latenc
y
caused
by
the
decimation
filters
in
multi-bit
ADC.
Similar
to
discrete
controllers
with
multi-bit
inputs,
discrete
controllers
with
single-bit
inputs
manipulate
discrete
single-bit
signals
as
opposed
to
multi-
bit
signals
in
order
to
pro
vide
control
to
a
particular
system.
Single-bit
controllers
ha
v
e
the
adv
antage
of
ha
ving
the
ability
to
use
multiple
x
ers
as
g
ains
as
opposed
to
the
con
v
ent
ional
multiplication
g
ains.
Thus,
the
processors
with
single-bit
inputs
are
b
uilt
simpler
than
con
v
ent
ional
Nyquist
rate
processor
due
to
the
less
usage
of
logic
g
ates
[18,
23,
24,
25,
26,
30].
The
aforementioned
features
of
single-bit
control
techniques
mak
e
SBM
is
suitable
man
y
applications
[30,
31].
In
particular
,
it
becomes
suitable
to
replace
multi-bit
ADC
in
po
wer
electronic
systems
controlled
by
high
operating
frequenc
y;
CPT
is
a
prime
e
xample
[28].
This
paper
proposes
a
SBM-PI
controller
to
re
gulate
the
output
v
oltage
a
CPT
system.
The
ef
fec-
ti
v
eness
of
the
proposed
control
system
will
be
e
xamined
by
the
re
gulating
ability
of
a
SBM-PI
controller
and
comparing
the
performance
ag
ainst
a
con
v
entional
multi-bit
controller
e
x
ecuting
the
same
task.
The
rob
ustness
of
the
controller
will
also
be
e
xamined
to
fully
identify
the
feasibility
of
a
SBM
based
controllers
on
a
WPT
system.
The
layout
of
this
paper
is
as
follo
ws;
Section
2
contains
an
o
v
ervie
w
of
the
CPT
system
to
be
con-
trolled
in
this
paper
.
Section
3
introduces
the
control
problem,
information
about
the
single-bit
signal,
its
generation,
SBM
and
SBM-PI
controller
.
Section
4
briefly
co
v
ers
the
simulation
and
e
xperimental
results
of
CPT
system
control
led
by
SBM-PI
controller
.
Finally
,
sections
5
and
6
will
co
v
er
f
uture
recommendations
and
conclusions
respecti
v
ely
.
2.
CAP
A
CITIVE
PO
WER
TRANSFER
This
section
encompasses
the
WPT
system
chosen
to
be
controlled,
i.e.,
a
CPT
.
Briefly
discussing
the
system,
ho
w
it
w
orks,
ho
w
it
w
as
designed
and
the
response
of
the
system.
2.1.
Ov
er
view
Capaciti
v
e
po
wer
transfer
(CPT)
systems
tak
e
adv
antage
of
the
principle
of
electric
coupling
in
or
-
der
to
successfully
maintain
WPT
.
CPT
system
adv
antages
include
high
v
oltage
based
ef
ficienc
y
,
the
ability
to
transfer
between
metal
and
lo
w
electromagnetic
radiation.
Ho
we
v
er
,
the
y
are
also
associated
with
the
dis-
adv
antages
of
being
dif
ficult
to
operate
o
v
er
lar
ge
distances
and
ha
ving
poor
electric
coupling
safety
which
can
be
o
v
ercome
with
adequate
insulation.
The
most
critical
disadv
antage
is
the
inability
for
a
CPT
system
to
naturally
re
gulate
their
output
v
oltage
to
a
high
de
gree
of
accurac
y
.
Hence,
a
controller
is
implemented
in
order
for
accurate
re
gulation
of
system
output
v
oltage.
F
or
a
more
in-depth
discussion
on
CPT
refer
to
[29].
F
or
this
paper
,
a
simplistic
CPT
topology
w
as
chosen
to
allo
w
for
ease
of
analysis
and
is
sho
wn
in
Figure
1.
As
can
be
seen
in
the
figure,
the
structure
of
the
utilized
CPT
system
includes
a
half-bridge
in
v
erter
,
an
inductor
L
in
series
with
a
capaciti
v
e
coupling
interf
ace
consisting
of
tw
o
pairs
of
coupling
plates,
and
a
full-bridge
rectifier
follo
wed
by
a
DC
load.
Single-bit
modulator
for
...
(Dhafer
J
.
Almakhles)
Evaluation Warning : The document was created with Spire.PDF for Python.
1272
r
ISSN:
2088-8694
o
V
dc
V
N
O
T
P
W
M
re
f
V
L
1
C
2
C
1
D
2
D
3
D
4
D
R
3
C
Figure
1.
CPT
system
design
2.2.
Design
principles
In
order
to
ensure
the
CPT
is
operating
appropriately
a
fe
w
basic
design
principles
must
be
follo
wed.
The
first
being
that
‘
shoot-thr
ough
’
of
the
switches
does
not
occur
.
Shoot-through
occurs
when
the
tw
o
switches
are
both
turned
on
(closed)
which
ef
fecti
v
ely
shorts
the
supply
to
ground.
F
or
simulations,
in
order
to
ensure
this
procedure
does
not
occur
the
switches
are
controlled
by
a
single
PWM
signal
along
with
a
simple
NO
T
conductor
.
As
for
the
hardw
are
design,
a
half-bridge
dri
v
er
with
a
single
input
ensured
that
the
switches
ne
v
er
turned
on
simultaneously
.
This
dri
v
er
responded
to
a
single
PWM
input
signal
and
produced
the
appropriate
signals
which
incorporated
dead
time
to
enable
switches
to
successfully
turn
completely
of
f.
The
second
design
principle
is
to
design
for
LC
resonance
within
the
system.
Resonance
op
t
imizes
ef
ficienc
y
by
matching
the
capacitor
and
inductor
v
olt
age
magnitudes
allo
wing
for
maximum
po
wer
to
the
resisti
v
e
load.
The
impedance
of
inductor
and
the
tw
o
capacitors
are
opposite
and
directly
related
to
frequenc
y
X
L
=
j
!
L
;
X
C
=
1
j
!
C
=
2
where
X
L
and
X
C
are
the
inductor
and
capacitor
impedance
respecti
v
ely
,
!
=
2
f
where
f
denotes
the
operating
frequenc
y
of
the
half-bridge
in
v
erter
,
L
is
the
inductance
and
C
is
the
capacitance
of
each
capacitor
.
Generally
,
the
inductor
v
alue
L
is
chosen
dependent
on
the
system
frequenc
y
f
and
the
capacitance
C
of
the
electrically
coupled
metal
plates.
Due
to
the
infinite
reactance
of
capacitors
at
zero
frequenc
y
,
the
tw
o
switches
operating
out
of
phase
are
required
to
act
as
a
DC
to
A
C
in
v
erter
enabling
current
flo
w
through
the
electrically
coupled
metal
plates.
The
A
C/DC
rectifier
then
con
v
erts
the
signal
back
into
DC
for
the
load
to
consume.
3.
CONTR
OL
SYSTEMS
DESIGN
This
section
encompasses
the
controller
aspect
of
this
paper
,
primarily
designed
to
remo
v
e
the
error
of
the
steady
state
v
alue
for
applications
that
require
precision
in
the
po
wer
transferred.
The
section
will
co
v
er
the
type
of
controller
design
and
ho
w
the
con
v
entional
controller
is
manipulated
for
single-bit
based
controller
.
3.1.
Open
loop
contr
ol
f
or
CPT
system
The
control
scheme
for
the
CPT
systems
is
described
as
follo
w
.
A
reference
v
oltage
V
r
ef
is
used
to
determine
the
duty
c
ycle
of
the
PWM
switches
ranging
from
0
V
to
5
V
,
representing
0%
to
50%
duty
c
ycle,
respecti
v
ely
.
The
output
v
oltage
V
o
is
directly
proportional
to
the
duty
c
ycle
of
the
PWM
signals
controlling
the
DC
to
A
C
in
v
erter
.
The
maximum
output
v
oltage
can
be
obtained
when
V
r
ef
=
2
:
5
V
(or
50%
duty
c
ycle)
and
described
as
V
o
=
V
dc
=
2
where
>
1
denotes
uncertai
n
t
ies
due
to
v
ariation
of
operating
frequenc
y
f
,
system
parameters,
distance
between
conducti
v
e
plates,
load
changing
i
n
the
CPT
system,
etc.
The
presence
of
the
nonlinear
components
i.e.,
diodes
and
the
uncertainties
f
actors
denoted
by
in
CPT
often
introduces
high
steady
state
error
i.e.,
e
=
V
r
ef
V
o
(1)
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
10,
No.
3,
September
2019
:
1270
–
1280
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
r
1273
where
CPT
systems
f
ail
to
accurately
re
gulate
v
oltage.
Achie
ving
e
xact
or
v
ariable
output
s
for
particular
applications
is
dif
ficult
as
the
e
xact
duty
c
ycle
required
needs
to
be
kno
wn.
This
beha
vior
is
undesired
and
attenuating
steady
state
error
is
one
of
the
main
focuses
for
the
upcoming
controller
where
a
PI
is
proposed
in
order
to
reduce
the
steady
state
error
e
t
0
along
with
the
potential
rise
time.
3.2.
Single-Bit
Modulator
and
Single-bit
based
contr
oller
This
section
encompasses
the
basics
of
the
single-bit
signal,
briefly
discussing
its
implementation
and
generation
through
the
chosen
modulation
along
with
some
of
its
adv
antages.
In
terms
of
the
single-bit
based
controller
for
a
CPT
,
a
single-bit
signal
is
a
method
of
representing
an
analog
signal
in
the
discrete
time
domain
by
using
only
one-bit
of
data
per
sample
time.
This
signal
consists
of
only
tw
o
possible
v
alues;
‘
hig
h
l
ow
’
or
‘
on
of
f
’;
which
interchanges
between
the
tw
o
possible
v
alues
at
a
relati
v
ely
high
switching
frequenc
y
.
The
a
v
erage
v
alue
of
the
single-bit
signal
is
equi
v
alent
to
the
a
v
erage
or
root
mean
square
(RMS)
of
the
analog
signal
being
replicated.
Both
the
frequenc
y
and
duty
c
ycle
are
able
to
v
ary
in
order
for
the
single-bit
signal
to
accurately
resemble
t
h
e
analog
signal.
Demonstrated
in
Figure
2
is
the
single-bit
signal
representation
of
a
sine
w
a
v
e,
with
the
sampling
frequenc
y
reduced
for
clarity
.
Figure
2.
Single-bit
representation
of
sine
w
a
v
e
3.3.
Single-Bit
Modulator
SBMs
are
type
of
single-bit
ADCs
where
the
input
is
an
analog
signal
and
the
output
is
the
corre-
sponding
digital
single-bit
signal.
Basic
SBMs
are
e
xtrem
ely
simplistic,
comprising
of
only
a
fe
w
components
in
comparison
to
multi-bit
ADC
.
There
are
multiple
topologies
for
producing
a
singl
e-bit
signal
from
an
analog
signal.
Three
possible
techniques
of
SBM
are
delta
(
4
-M),
delta-sigma
(
4
-M)
or
h
ybrid
4
-M.
Cascad-
ing
these
techniques
produces
multi-order
topologies
of
single-bit
con
v
erters
which
enables
an
increase
in
the
resolution
of
the
digital
signal.
Figure
3
sho
ws
a
simple
SBM,
which
is
used
in
this
paper
.
e
0
k
ˆ
e
ˆ
Q
1
Q
L
ow
-
P
as
s
F
i
l
t
e
r
c
lk
s
Figure
3.
Single-bit
modulator
topology
This
modulator
comprises
of
a
comparator
,
first
order
RC
lo
w-pass
filter
and
a
g
ain/multiple
x
er
.
Using
a
simple
feedback
netw
ork,
this
system
attempts
to
pull
the
error
between
the
comparators
inputs
to
0
,
resulting
in
a
single-bit
signal
representing
that
of
the
input
analog
signal.
The
output
of
the
modulator
is
either
1
or
0
due
to
function,
which
is
gi
v
en
by
k
=
1
2
(1
+
sgn
(
s
))
=
(
1
8
s
0
0
8
s
<
0
(2)
Single-bit
modulator
for
...
(Dhafer
J
.
Almakhles)
Evaluation Warning : The document was created with Spire.PDF for Python.
1274
r
ISSN:
2088-8694
since
sgn
(
s
)
=
(
+1
8
s
0
1
8
s
<
0
for
all
t
2
[
k
T
s
;
(
k
+
1)
T
s
]
where
0
<
T
s
1
denotes
the
sampling
period.
The
input
of
the
comparator
is
gi
v
en
by
s
=
e
^
e
where
e
is
defined
in
(1)
and
^
e
denotes
the
a
v
erage
v
alue
(i.e.,
slo
w
components)
of
the
discontinuous
function
sgn
(
s
)
which
is
obtained
by
filtering
it
through
first
order
lo
w-pass
filter
^
e
:=
Q
sgn
(
s
)
_
^
e
(3)
where
is
the
time
constant
and
Q
is
kno
wn
as
quantization
boundary
[26].
3.4.
Single-bit
based
contr
oller
The
single-bit
based
controller
can
be
classified
to
con
v
entional
PI
controller
and
h
ybrid
PI
controller
[26].
Implementing
con
v
entional
single-bit
PI
controller
is
limited
to
which
the
proper
Q
v
alues
used
in
SBMs
of
the
proportional
and
the
inte
gral
ha
v
e
to
be
carefully
analyzed
and
selected
in
order
to
minimize
the
quanti-
zation
noise.
The
SBM-PI
controller
which
is
used
to
control
CPT
system,
is
defined
as
^
u
=
Qk
p
sgn
(
s
)
+
k
i
Q
t
0
sgn
(
s
)
d
(4)
where
^
u
is
the
control
signal,
Q
is
the
quantiz
ation
boundary
v
alue
of
controller
input
SBM,
k
p
is
proportional
g
ain
and
k
i
is
inte
gral
g
ain.
The
requirement
for
the
single-bit
based
controller
is
to
ha
v
e
an
input-output
interf
ace
in
single-
bit
format,
which
means
the
multi-bits
arithmetic
elements
in
the
digital
controller
are
replaced
by
single-bit
function
blocks.
These
blocks
i
nte
grating
SBM
in
arithmetic
elements,
such
as
adder
,
subtractor
,
and
inte
grator
,
ha
v
e
been
used
and
tested
in
dif
ferent
papers
[26,
27].
In
this
paper
,
SBM
based
PI
is
implemented
on
microcontroller
.
Thus,
it
is
of
importance
to
con
v
ert
the
continuous-time
system
into
its
quasi-continuous
approximation
using
the
well-kno
wn
Eule
r’
s
discretization
method.
The
discrete-time
transformation
of
(4),
which
is
sho
wn
in
Figure
4,
is
gi
v
en
by
^
u
k
=
^
u
p
k
+
^
u
i
k
where
^
u
p
k
=
(
K
U
p
=
+
Qk
p
8
^
k
=
1
K
Lp
=
Qk
p
8
^
k
=
0
and
^
u
i
k
=
(
K
U
i
1
8
^
k
=
1
K
Li
1
8
^
k
=
0
where
K
U
i
=
QT
s
k
i
,
K
Li
=
QT
s
k
i
,
T
s
denotes
the
s
ampling
frequenc
y
and
=
z
1
.
The
bold
line
is
the
multi-bit
signal
and
the
unbold
line
is
the
single-bits
signal.
These
signal
processing
elements
are
detailed
in
[26].
Up
K
Lp
K
k
ˆ
Ui
K
Li
K
1
i
k
u
ˆ
k
u
ˆ
p
k
u
ˆ
Figure
4.
Hybrid
single-bit
PI
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
10,
No.
3,
September
2019
:
1270
–
1280
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
r
1275
4.
SIMULA
TION
AND
EXPERIMENT
AL
RESUL
TS
Contained
within
this
section
are
the
findings
of
this
paper
.
It
demonstrates
the
performance
and
ability
of
the
SBM-PI
on
a
CPT
system.
Both
simulation
results
and
hardw
are
results
are
presented.
4.1.
Hard
war
e
pr
ototype
and
specifications
of
CPT
system
Multiple
hardw
are
prototypes
were
produced
in
the
o
v
erall
design
process,
with
the
final
singl
e-bit
based
control
CPT
system
sho
wn
in
Figure
5.
The
system
parameters
of
CPT
system,
which
is
described
by
the
equi
v
alent
circuit
in
Figure
1,
are
gi
v
en
in
T
able
1.
Figure
5.
Prototype
of
the
CPT
system.
T
able
1.
P
arameters
of
e
xperimental
prototype
Symbol
V
alue
V
dc
12
V
L
27
:
6
H
C
1
470
n
F
C
2
470
n
F
C
3
470
F
R
47
Controller
A
Tme
g
a8
(max
cl
k
=
16
MHz)
PWM’
s
sampling
frequenc
y
f
s
=
62
:
5
kHz
(dead
time
of
0
:
5
µs)
half-bridge
dri
v
er
IR2183
MOSFETs
S
1
and
S
2
IRF3205
Diodes
D
1
D
4
1N4001
4.2.
Simulation
r
esults
Simulations
were
conducted
in
Matlab’
s
simulink
with
the
PLECS
e
xtension.
Figure
6
(a)
and
(b)
sho
w
both
the
simulated
results
as
well
as
the
hardw
are
results
for
the
open
loop
CPT
system,
with
3
V
input
resulting
in
a
4
V
output.
The
system
response
has
a
steady-state
error
of
approximately
1
V
with
an
input
of
3
V
’
s.
By
e
xamining
the
issues
pertained
within
the
open-loop
response
of
the
CPT
system
the
type
of
controller
required
to
successfully
achie
v
e
the
desired
response
can
be
deduced.
Although
the
system
contained
se
v
ere
steady
state
error
there
w
as
no
oscillations
residing
in
the
transient
of
the
open-loop
response.
In
order
to
g
auge
the
success
of
the
single-bit
controller
it
w
as
first
produced
in
a
simulated
en
vi-
ronment
and
compared
to
the
performance
of
a
simulated
con
v
entional
multi-bit
controller
operating
on
the
e
xact
same
system.
Simulations
pro
vided
suf
ficient
e
vidence
that
single-bit
based
controllers
pro
vided
accu-
rate
v
oltage
re
gulating
abilities.
Figure
7
(a)
sho
ws
the
open
loop
system
response
to
a
2
V
and
4
V
reference
while
Figure
7
(b)
sho
ws
the
controlled
responses
of
the
CPT
to
the
same
reference
v
oltage,
i.e.,
2
V
and
4
V
reference
using
single-bi
t
based
PI
controller
with
k
p
=
255
and
k
i
=
55
.
As
can
be
seen
in
Figure
7
(b),
the
controller
w
as
able
to
successfully
eliminate
the
steady
state
v
alue
error
present
in
the
open
loop
responses
in
both
cases
for
2
V
and
4
V
input
signals.
Additionally
,
there
w
as
a
decrease
in
both
rise
time
and
settling
time
for
both
scenarios.
Furthermore,
both
the
con
v
entional
and
single-bit
controllers
responded
e
xactly
the
same
in
simulations,
this
suggests
that
the
single-bit
controller
performs
at
an
equal
le
v
el
to
that
of
the
con
v
entional
controller
.
Single-bit
modulator
for
...
(Dhafer
J
.
Almakhles)
Evaluation Warning : The document was created with Spire.PDF for Python.
1276
r
ISSN:
2088-8694
0
.
02
0
.
16
0
.
14
0
.
1
0
.
08
0
.
06
0
.
04
0
.
12
0
.
20
0
.
18
T
i
m
e
(
s
e
c
)
0
.
00
0
.
02
0
.
16
0
.
14
0
.
1
0
.
08
0
.
06
0
.
04
0
.
12
0
.
20
0
.
18
T
i
m
e
(
s
e
c
)
0
.
00
1
2
4
3
0
V
ol
t
age
(
V
)
1
2
4
3
0
V
ol
t
age
(
V
)
(
a
)
(
b
)
Figure
6.
:
Open
loop
CPT
systems
responce
(a)
Simulated
resulted
with
3
V
input,
and
(b)
Hardw
are
response
with
3
V
input.
0
.
5
Ti
m
e
(
s
e
c
)
0
.
00
1
2
4
3
0
V
ol
ta
ge
(
V
)
(
a
)
5
1
2
4
3
0
V
ol
tage
(
V
)
5
2
.
5
2
.
0
1
.
5
1
.
0
3
.
0
0
.
5
Ti
m
e
(
s
e
c
)
0
.
00
(
b
)
2
.
5
2
.
0
1
.
5
1
.
0
3
.
0
Figure
7.
Simulation
results
for
open
and
closed
loop
CPT
systems
responce
(a)
Simulated
resulted
for
open-loop
CPT
systems
with
2
V
and
4
V
inputs,
and
(b)
Simulated
resulted
for
controlled
CPT
systems
with
2
V
and
4
V
inputs
and
PI
controller
.
4.3.
Experimental
r
esults
Due
to
the
success
of
the
simulations
on
the
CPT
system,
both
a
con
v
entional
and
a
single-bit
con-
troller
were
designed
and
implemented
using
hardw
are
to
pro
v
e
the
viability
of
the
single-bit
control
methods
e
v
en
further
.
The
responses
obtained
from
the
hardw
are
resem
b
l
ed
the
simulations
closely
.
The
y
maintained
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
10,
No.
3,
September
2019
:
1270
–
1280
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
r
1277
similar
o
v
ershoot,
rise
time
and
settling
time
along
with
obtaining
the
same
response
in
terms
of
steady
state
v
oltage
re
gulation.
Demonstrated
in
Figure
8
is
the
controlled
hardw
are
response
for
a
2
V
,
3
V
and
4
V
refer
-
ence
v
oltage.
Finally
,
observing
the
rob
ustness
of
the
controllers
w
as
undertak
en.
A
well
performing
controller
is
able
to
adequately
re
gulate
the
response
of
a
system
e
v
en
when
system
parameters
are
to
v
enture
a
w
ay
from
their
optimal
state
s.
Examples
of
parameters
that
could
v
ary
are
the
v
alues
of
original
component
v
alues,
the
DC
supply
,
the
operating
frequenc
y
and
the
deterioration
of
components.
The
feature
of
a
CPT
system
that
is
the
most
susceptible
to
change
is
the
equi
v
alent
capacitance
of
the
elect
rically
coupled
metal
plates
due
to
the
potential
air
g
ap
v
ariances.
The
controller
is
able
to
successfully
sustain
the
steady
state
v
ol
tage
re
gulation
with
both
a
lar
ge
increase
and
decrease
in
equi
v
alent
capacitance
v
alues.
This
suggests
that
the
system
is
adequately
rob
ust.
1
0
0
.
5
Ti
m
e
(
s
e
c
)
0
.
00
2
.
5
2
.
0
1
.
5
1
.
0
3
.
0
3
.
5
4
.
0
2
4
3
V
ol
tag
e
(
V
)
Figure
8.
Controlled
hardw
are
response
of
the
CPT
system.
5.
FUTURE
RECOMMEND
A
TIONS
One
of
the
lar
gest
fla
ws
in
this
paper
w
as
the
accurac
y
of
the
single-bit
signal.
The
technique
used
as
a
single-bit
modulator
w
as
one
of
the
simplest
methods
which
reduced
the
o
v
erall
accurac
y
slightly
.
Ho
we
v
er
,
the
most
significant
issue
w
as
the
A
Tme
g
a8
microcontroller
chosen.
The
A
Tme
g
a8’
s
limited
clock
speed
w
as
a
se
v
ere
hindrance.
F
or
future
w
ork
in
this
field
I
w
ould
recommend
using
a
processor
with
a
lar
ger
clock
speed.
This
impro
v
ement
will
result
in
a
lar
ger
sampling
frequenc
y
for
the
single-bit
modulator
which
results
in
an
increase
of
the
analog
to
digital
con
v
ersion
resolution.
Additionally
,
a
multi-order
del
ta-sigma
modulator
could
be
implemented
in
order
to
further
increase
the
accurac
y
.
The
second
fla
w
in
this
project
is
also
related
to
the
chosen
microcontroller
.
The
A
Tme
g
a8’
s
PWM
feature,
which
is
used
to
control
the
switches
in
the
CPT
system,
w
as
limited
to
62
:
5
kHz
at
8
-bits
of
accurac
y
which
is
much
too
lo
w
.
Practical
CPT
Systems
generally
operate
at
higher
frequencies
in
order
to
operate
successfully
with
the
lo
w
capacitance
of
electrically
coupled
metal
plates.
This
issue
w
ould
be
rectified
by
using
a
f
aster
processor
and
w
ould
allo
w
for
the
controll
er
to
be
implemented
on
a
more
practical
system.
Finally
,
implementing
the
single-bit
controller
in
a
netw
ork
ed
control
system.
Netw
ork
ed
control
systems
are
becoming
increasi
ngly
popular
and
single-bit
is
theorized
to
be
a
more
viable
option
due
to
the
benefits
of
transmitting
single-bit
as
opposed
to
multi-bit
packages.
6.
CONCLUSION
In
conclusion,
a
proposed
method
to
manipulating
a
single-bit
controller
for
a
CPT
system
has
been
presented.
This
w
ork
included
the
design
of
both
a
con
v
entional
multi-bit
controller
and
single-bit
controller
.
The
single-bit
controller’
s
performance
w
as
compared
to
that
of
the
con
v
entional
multi-bit
controller
and
the
results
demonstrated
that
both
controller
s
were
able
to
successfully
re
gulate
the
response
of
the
specified
CPT
system.
This
paper
has
pro
v
en
the
concept
of
using
a
single-bit
controller
on
a
CPT
system
and
has
pro
vided
headw
ay
for
further
research
on
the
topic.
A
CKNO
WLEDGEMENT
The
authors
w
ould
lik
e
to
thank
both
Nathan
Pyle
and
Hossein
Mehrabi
for
the
help
during
the
prepa-
ration
of
this
w
ork.
Single-bit
modulator
for
...
(Dhafer
J
.
Almakhles)
Evaluation Warning : The document was created with Spire.PDF for Python.
1278
r
ISSN:
2088-8694
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BIOGRAPHIES
OF
A
UTHORS
Dhafer
Almakhles
recei
v
ed
B.E.
de
gree
in
Electrical
Engineering
from
King
F
ahd
Uni
v
ersity
of
Petroleum
and
Minerals,
Dhahran,
Saudi
Arabia
in
2006
and
completed
his
Masters
de
gree
(Hons.)
and
PhD
from
The
Uni
v
ersity
of
Auckland,
Ne
w
Zealand
in
2011
and
2016,
respecti
v
ely
.
Since
2016,
he
has
been
with
Prince
S
ultan
Uni
v
ersity
-
Saudi
Arabia,
where
he
is
currently
an
assistant
professor
with
the
department
of
Communications
and
Netw
orks
Engineering
and
the
Director
of
Science
and
T
echnology
Unit.
He
has
authored
more
than
twenty
published
papers
in
the
area
of
control
systems.
He
serv
ed
as
a
re
vie
wer
for
man
y
journals
including
IEEE
T
ransactions
on:
Fuzzy
Systems,
Control
of
Netw
ork
Syste
ms,
Industrial
Electronics,
Control
Systems
T
echnology
as
well
as
IEEE
Control
Systems
Letters
and
International
Journal
of
Control.
His
research
interests
include
the
hardw
are
implementation
of
control
theory
,
signal
processing,
netw
ork
ed
control
systems
and
sliding
mode.
Aksh
ya
K
umar
recei
v
ed
the
B.Sc.
de
gree
in
electrical
engineering
and
the
M
.Sc.
de
gree
in
elec-
tronic
systems
and
communication
from
the
Sambalpur
Uni
v
ersity
,
Sambalpur
,
India,
in
1985
and
1988,
respecti
v
ely
,
and
the
Ph.D.
de
gree
from
the
Department
of
Automatic
Control
and
Sys-
tems
Engineering,
Uni
v
ersity
of
Shef
field,
Shef
field,
U.K.,
in
1997.,From
1994
to
1996,
he
w
as
a
Commonwealth
Scholar
in
the
United
Kingdom.
Si
nce
September
2002,
he
has
been
with
the
Department
of
Electrical
and
Computer
Engineeri
ng,
The
Uni
v
ersity
of
Auckland,
Auckland,
Ne
w
Zealand.
His
present
research
interests
include
nonlinear
system
identification
and
control,
biomed-
ical
signal
processing,
sensor
netw
orks,
and
control
applications
to
po
wer
system
and
wireless
po
wer
transfer
systems.,Dr
.
Sw
ain
is
an
Assoc
iate
Editor
of
the
IEEE
Sensors
Journal.
He
is
a
Member
of
the
Editorial
Board
of
the
International
Journal
of
Automation
and
Control
and
the
International
Journal
of
Sensors,
W
ireless
Communications
and
Control.
Single-bit
modulator
for
...
(Dhafer
J
.
Almakhles)
Evaluation Warning : The document was created with Spire.PDF for Python.