Internati
o
nal
Journal of P
o
wer Elect
roni
cs an
d
Drive
S
y
ste
m
(I
JPE
D
S)
V
o
l.
5, N
o
. 3
,
Febr
u
a
r
y
201
5,
pp
. 40
4
~
41
4
I
S
SN
: 208
8-8
6
9
4
4
04
Jo
urn
a
l
h
o
me
pa
ge
: h
ttp
://iaesjo
u
r
na
l.com/
o
n
lin
e/ind
e
x.ph
p
/
IJPEDS
Structure of 15-Level Sub-Modul
e Cascaded H-Bridge Inverter
for Speed Control of AC Drive Applications
R
.
U
t
hira
sa
my
*, U
.
S. Ra
gupa
thy**
, R
.
Na
v
e
en***
* Departm
e
nt
of
Electri
cal
and
E
l
ectron
i
c
Engin
e
ering, Jans
ons Ins
titut
e
of
T
echnol
og
y
,
Coim
bator
e
, T
a
m
ilnadu
,
Ind
i
a
** Departmen
t
o
f
Electron
i
cs
and
Instrumentation
Engin
eer
ing
,
K
ongu Engin
eerin
g College, Erod
e, Tamilnadu
,
Ind
i
a
*** Power El
ect
r
onics and
Drives,
Jansons Institu
te of
T
echnolog
y
,
Coim
bator
e
,
Tam
ilnadu
,
Ind
i
a
Article Info
A
B
STRAC
T
Article histo
r
y:
Received Oct 3, 2014
Rev
i
sed
D
ec 12
, 20
14
Accepte
d Ja
n
7, 2015
This paper dea
l
s with the im
pl
em
en
tation of a single phase 15-level Sub-
Multilev
e
l C
a
sc
aded H-Bridg
e
Inverter
(SMCHBI) for var
i
abl
e
speed
industrial dr
ive
appli
cat
ions. It
cons
ists of sub-m
u
ltilevel m
odules and H-
bridge inver
t
er c
onfigurat
ion. Sub-
m
u
ltilev
e
l switches s
y
nth
e
size
stepped DC
link voltage and
current from the DC
sources. H-bridge inverter switches
renovate stepped DC link voltage and
curr
ent into sinusoidal waveform.
Compared with
conven
tional
Cascaded
Multilevel Inver
t
er
(
C
MLI), th
e
proposed s
y
stem employ
s th
e reduced numb
e
r of power switches, DC
sources and gate driver requir
e
ments.
The propos
ed s
y
stem not only
r
e
duces
the overa
ll s
y
s
t
e
m
cos
t
but als
o
reduces
the voltage stress across
the inver
t
er
switches.
The p
r
oposed s
y
stem
does not
r
e
quired addition
a
l r
e
sonant soft
switching circu
i
ts for Zero Voltage Sw
itching
(ZVS) of inver
t
er. In
the
proposed method, variab
le frequ
ency
me
thod is adopted for the speed contro
l
of industrial ind
u
ction motor drives.
A prototy
p
e model of 15-level SMCHB
is
deve
loped
and
the
perform
an
ce
of th
e s
y
s
t
em
s
i
s
valid
ated
exp
e
r
i
m
e
ntall
y
.
Keyword:
H-B
r
i
d
ge I
n
ver
t
er
Motor drives
Mu
ltilev
e
l
Spee
d C
ont
r
o
l
V
a
r
i
ab
le Fr
equen
c
y
Zero Vo
ltag
e
Switch
i
ng
Copyright ©
201
5 Institut
e
o
f
Ad
vanced
Engin
eer
ing and S
c
i
e
nce.
All rights re
se
rve
d
.
Co
rresp
ond
i
ng
Autho
r
:
R. Nav
e
en
,
Power
Electronics a
n
d Drive
s
,
Jan
s
o
n
s
In
stitute o
f
Techno
log
y
,
C
o
i
m
bat
o
re, T
a
m
i
l
n
adu,
I
ndi
a.
Em
a
il: n
a
v
eenra
m
aa9
2
@
g
m
ai
l.co
m
1.
INTRODUCTION
Ad
va
ncem
ent
i
n
po
wer el
ect
ro
ni
cs l
a
y
dow
n a wi
de sp
rea
d
sco
p
e fo
r ef
f
i
ci
ent
operat
i
o
n of
po
we
r
co
nv
erters.
Variab
le sp
eed
driv
es p
l
ays a v
ital ro
le
in
p
r
esen
t d
a
y in
dustries.
Power electronic
converte
rs
h
a
v
e
th
e respon
sib
ility to
carry o
u
t
th
ese task
s with
h
i
g
h
efficien
cy. Trad
itio
n
a
l p
o
wer electron
i
c in
v
e
rt
ers are
Voltage S
o
urc
e
In
verter
(V
S
I) an
d Cu
rre
nt
Sou
r
ce I
n
vert
er (CSI). Two-lev
e
l VSI topo
log
y
is th
e sim
p
le
s
t
to
po
log
y
used
to
ach
iev
e
t
h
e
v
a
riab
le speed
o
f
ind
u
s
t
r
ial driv
es. M
u
ltilev
e
l Inv
e
rters
(MLI) are em
erg
i
n
g
as
th
e n
e
w breed o
f
p
o
wer conv
erter
op
tio
ns for h
i
g
h
p
o
we
r app
licatio
n
s
[1
]. Th
ree t
o
po
log
i
es of Mu
l
tilev
e
l
Inv
e
rter (MLI) are; Dio
d
e
C
l
a
m
p
e
d
Mu
ltil
ev
el Inv
e
rters (DCMLI), Fly
i
n
g
Cap
acitor Mu
ltilev
e
l In
verters
(FCMLI) and Cascaded M
u
ltilevel Inve
rter
(CMLI)
[2]-[
4]
. Am
ong these
inverter topologies
, the FCMLI is
diffic
u
lt to
be
realized
beca
use each capa
c
itor m
u
st be
charge
d
with
differe
n
t voltages
as the
voltage
leve
l
i
n
creases
. M
o
r
e
ove
r,
t
h
e
FC
M
L
I, al
s
o
kn
o
w
n
as a
ne
ut
ra
l
cl
am
ped c
o
n
v
ert
e
r
i
s
di
ffi
c
u
l
t
t
o
be e
x
p
a
nde
d t
o
m
u
l
tilevel because of the na
tural pr
oblem
of the DC link voltage unbala
ncing. Two- level inverte
r
s and
m
u
l
tilev
e
l in
v
e
rters
o
f
FCMLI and
DCMLI
h
a
v
i
n
g
h
i
gh
v
o
ltag
e
stress. To redu
ce th
e
vo
ltag
e
stress across the
in
v
e
rter switches, reso
nan
t
soft switch
i
ng
circu
its ar
e requ
ired
.M
o
s
t so
lar
cell in
stallat
i
o
n
inv
o
l
v
e
s th
e
u
s
e of
m
u
l
tip
le so
lar
p
a
n
e
ls
o
r
m
o
du
les,
wh
ich
are co
nn
ected
in series or p
a
rallel with
CMLI. Th
e m
o
st p
o
p
u
l
ar
adva
ntage
s
of CMLI com
p
ared
with
th
e trad
itio
n
a
l t
w
o
lev
e
l vo
ltage s
o
urce i
nve
rters a
r
e l
o
we
r
sem
i
cond
uct
o
r
vol
t
a
ge st
ress,
bet
t
e
r ha
rm
oni
c perf
o
r
m
a
nce, l
o
we
r El
ect
r
o
M
a
gnet
i
c
I
n
t
e
rfe
rence
(EM
I
)
and
lowe
r s
w
itching losses
[5]-[11]. T
h
e e
fficie
n
cy of t
h
e
CM
LI
system
is deg
r
ad
ed
,
b
ecause of
m
o
r
e
num
b
e
r
o
f
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
Struct
ure of
15-Level Sub-Module
C
a
sc
ade
d H-Bridge
Inve
rter for
Speed
Contr
o
l of …
(R.
Uthirasamy
)
40
5
D
C
sou
r
ces an
d
con
t
ro
lled
p
o
w
e
r
sw
itch
e
s f
o
r
h
i
g
h
er
v
o
ltag
e
lev
e
ls. I
n
the pr
oposed
wor
k
, 15
-lev
el
SM
C
H
B
I
i
s
desi
g
n
e
d
an
d
im
pl
em
ent
e
d for t
h
e spee
d co
nt
r
o
l
of
si
ngl
e p
h
ase i
n
d
u
ct
i
o
n m
o
t
o
r dri
v
e
ap
p
lication
s
[12
]
-[20
]. Co
m
p
ared with co
nv
en
tion
a
l
C
M
LI, t
h
e
pr
o
p
o
s
ed sy
st
em
em
pl
oy
s t
h
e
red
u
c
t
i
on i
n
po
we
r swi
t
c
he
s, DC
s
o
u
r
ces
and
dri
v
er ci
r
c
ui
t
req
u
i
r
em
e
n
ts. Th
e sp
eed co
n
t
ro
l of th
e in
du
ctio
n
m
o
to
r i
s
achi
e
ve
d usi
n
g
Pe
ri
p
h
e
r
al
I
n
t
e
rface
C
o
nt
r
o
l
l
e
r (PIC
).
Fi
gu
re 1 sh
o
w
s t
h
e bl
oc
k di
ag
ram
of
t
h
e
pr
op
os
e
d
SM
C
H
B
I
.
T
h
i
s
pa
per
i
s
or
g
a
ni
zed
as se
ve
n sect
i
o
ns
as
f
o
l
l
o
w
s
;
I
n
t
r
od
uct
i
o
n
of t
h
e
C
M
LI i
s
revi
e
w
ed
i
n
Sect
i
on
1.
St
r
u
ct
u
r
e o
f
SM
C
H
B
I
sy
st
em
i
s
add
r
esse
d i
n
sect
i
o
n
2.
M
odes
o
f
ope
rat
i
on
o
f
SM
C
H
B
I
a
r
e
revi
e
w
ed i
n
Se
ct
i
on 3
.
Im
pl
em
ent
a
t
i
on o
f
1
5
-l
e
v
el
SM
C
H
B
I
fed si
ngl
e
p
h
ase i
n
duct
i
o
n
m
o
t
o
r i
s
addre
ssed i
n
Sect
i
on
4. R
e
s
u
l
t
s
an
d
di
scus
si
on
of
t
h
e
pr
o
pos
ed sy
st
em
is pre
s
ent
e
d i
n
Sect
i
on
5.
Sect
i
on
6 c
oncl
ude
s t
h
e
pape
r.
Fi
gu
re
1
.
B
l
oc
k
Di
ag
ram
of S
M
C
H
B
I
Sy
st
e
m
s
2.
STRUCT
URE OF SUB-MULTILEVEL
CA
SCADED H-BRIDGE
INVE
RTER
The
ge
neral
structure c
o
nsists of s
u
b-m
u
ltilevel m
odul
es
c
o
nnected in se
ries.
DC
volta
ge s
o
urce
in
each s
u
b-m
u
ltilevel inve
rter i
s
asym
m
e
trical in m
a
nne
r.T
h
e out
put
voltage of eac
h s
u
b-m
u
ltilevel
m
odule is
always po
sitive or zero.To
op
erate as an
i
n
v
e
rter, it is
n
e
cessary to ch
ang
e
t
h
e
v
o
ltage
p
o
l
arity in
ev
ery h
a
l
f
cycle. To
o
b
t
ain
p
o
sitiv
e an
d n
e
g
a
tiv
e
o
u
t
pu
t v
o
ltag
e
, an
H-b
r
i
d
g
e
inv
e
rter is ad
d
e
d
to th
e o
u
t
p
u
t
of
series
connected s
u
b-m
u
ltilevel
m
odules
. T
h
e e
quivalent structur
e
of 15-level SMCHBI
is
shown i
n
Fig. 2. Each
sub-m
u
ltilevel m
odule consists of (s+1) s
w
itches a
n
d a
DC
source.
Num
b
er
of
l
e
v
e
l
s
of
C
M
LI c
o
nfi
g
u
r
at
i
o
n
ca
n
be e
x
pres
sed
a
s
;
1
)
(
2
s
level
N
(1
)
Num
b
er of
s
w
i
t
c
hes of
C
M
L
I
can be
e
x
p
r
ess
e
d
as;
s
switch
N
4
(2
)
Num
b
er
of
l
e
v
e
l
s
of
SM
C
H
B
I
c
o
n
f
i
g
urat
i
o
n
can
be e
x
pres
s
e
d as;
1
)
1
(
2
S
m
level
N
(3
)
Num
b
er of
s
w
i
t
c
hes of SM
C
H
B
I
ca
n be
e
x
press
e
d
as;
m
s
switch
N
4
2
(4
)
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
4
04 –
41
4
40
6
Whe
r
e,
m
i
s
t
h
e n
u
m
b
er
of
H-
b
r
i
d
ge i
nve
rt
er
s is th
e
nu
m
b
er
of
D
C
sour
ce
Fig
u
r
e
. 2. Equiv
a
len
t
Stru
ctur
e
o
f
15
-
L
ev
el
SMCH
BI
3.
MO
DES OF OPERATIO
N
To
ob
tain
15-lev
e
l AC ou
tpu
t
fro
m
th
e as
y
mmetrical D
C
so
urces, th
e p
r
o
p
o
s
ed
syste
m
can
be
ope
rat
e
d
u
n
d
er
1
5
m
odes
of
o
p
erat
i
o
n.
3.
1.
I
n
Oper
at
i
n
g Mo
de 0
In
m
o
d
e
0
op
eratio
n, all th
e switch
e
s are
gettin
g
tu
rn
ed
OFF. Th
e
o
u
t
pu
t v
o
ltag
e
o
f
su
b-m
u
ltilev
e
l
m
odul
e an
d
H-
bri
dge
i
n
vert
er
are ze
ro
.
3.
2.
I
n
Oper
at
i
n
g Mo
des 1
a
nd 8
To
ob
tain
th
e
1
st
lev
e
l o
f
inv
e
rter
ou
tpu
t
v
o
ltag
e
, sub-mu
ltilev
e
l switch
e
s S
1
’,
S
2
and S
3
and H-
B
r
i
dge
swi
t
c
he
s S
4
and S
5
a
r
e
getting t
u
rned
ON a
s
s
h
own in Figure 3.
He
nce, t
h
e DC
voltage source
V
DC1
is
l
i
nked
wi
t
h
t
h
e
d
r
i
v
e l
o
ad
. T
h
e o
u
t
p
ut
v
o
l
t
a
g
e
o
f
H-
bri
dge
i
nve
rt
er ca
n
be
exp
r
esse
d as;
1
01
0
DC
V
V
V
(For Po
sitive Cycle)
(5)
To
ob
tain
th
e 8
th
lev
e
l o
f
inv
e
rter
o
u
t
p
u
t
v
o
ltag
e
, sub
-
m
u
ltilev
e
l switch
e
s S
1
’, S
2
and S
3
and H
-
B
r
i
dge s
w
i
t
c
he
s S
6
and S
7
are
get
t
i
ng t
u
r
n
e
d
ON. T
h
e o
u
t
p
ut
vol
t
a
ge
of
H-
bri
dge i
n
ve
r
t
er can be ex
p
r
essed
as;
1
01
0
DC
V
V
V
(F
or
Negative
Cycle)
(6)
3.
3.
I
n
Oper
at
i
n
g Mo
des 2 a
nd 9
To obt
ai
n
t
h
e 2
nd
lev
e
l of inv
e
rter
ou
tpu
t
v
o
ltag
e
, su
b-mu
ltilev
e
l switch
e
s S
1
, S
2
’ a
n
d S
3
a
nd
H-
B
r
i
dge s
w
i
t
c
he
s S
4
and S
5
are
getting turned ON. He
nce, the DC voltage s
o
urce V
DC2
is l
i
n
k
e
d
with
th
e d
r
i
v
e
l
o
ad.
T
h
e
out
p
u
t
v
o
l
t
a
ge
o
f
H
-
b
r
i
d
ge i
n
ve
rt
er ca
n
be e
x
p
r
es
sed as;
2
02
0
DC
V
V
V
(For Po
sitive Cycle)
(7)
To
ob
tain
th
e 9
th
lev
e
l o
f
inv
e
rter
o
u
t
p
u
t
v
o
ltag
e
, sub
-
m
u
ltilev
e
l switch
e
s S
1
, S
2
’ an
d S
3
and H
-
B
r
i
dge s
w
i
t
c
he
s S
6
and S
7
are
get
t
i
ng t
u
r
n
e
d
ON. T
h
e o
u
t
p
ut
vol
t
a
ge
of
H-
bri
dge i
n
ve
r
t
er can be ex
p
r
essed
as;
2
02
0
DC
V
V
V
(For
Ne
gative
Cycle)
(8)
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
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:
208
8-8
6
9
4
Struct
ure of
15-Level Sub-Module
C
a
sc
ade
d H-Bridge
Inve
rter for
Speed
Contr
o
l of …
(R.
Uthirasamy
)
40
7
3.
4.
I
n
Oper
at
i
n
g Mo
des 3 a
nd 10
To
ob
tain
th
e 3
rd
lev
e
l
o
f
inv
e
rter ou
t
p
u
t
v
o
ltag
e
, sub
-
m
u
ltilev
e
l switch
e
s
S
1
’,
S
2
’ and
S
3
and
H-
B
r
i
dge s
w
i
t
c
he
s S
4
and S
5
are g
e
ttin
g
turn
ed
ON. Hen
c
e, th
e DC vo
ltage so
urce V
DC1
and
V
DC2
are linke
d
wi
t
h
t
h
e
d
r
i
v
e
l
o
ad
. T
h
e
o
u
t
p
u
t
vol
t
a
ge
o
f
H-
bri
dge
i
n
vert
er
can
be e
x
pres
s
e
d as;
)
2
1
(
03
0
DC
V
DC
V
V
V
(For
Po
sitiv
e Cycle)
(9)
To obt
ai
n
t
h
e 10
th
lev
e
l of inv
e
rter ou
tpu
t
vo
ltag
e
, sub
-
m
u
ltilev
e
l switch
e
s S
1
’,
S
2
’
and S
3
and
H-
B
r
i
dge s
w
i
t
c
he
s S
6
and S
7
a
r
e get
t
i
ng t
u
rn
ed
ON
. The
out
p
u
t
vol
t
a
ge o
f
H-
bri
dge i
nve
r
t
er can be e
x
p
r
essed
as;
)
2
1
(
03
0
DC
V
DC
V
V
V
(F
or
Ne
gative
Cycle)
(10)
3.
5.
I
n
Oper
at
i
n
g Mo
des 4
a
nd 11
To
ob
tain
th
e 4
th
lev
e
l o
f
inv
e
rter
o
u
t
p
u
t
v
o
ltag
e
, sub
-
m
u
ltilev
e
l switch
e
s S
1
, S
2
and S
3
’ and H
-
B
r
i
dge s
w
i
t
c
he
s S
4
and S
5
are
getting turned ON. He
nce, the DC voltage s
o
urce V
DC3
is l
i
n
k
e
d
with
th
e d
r
i
v
e
l
o
ad.
T
h
e
out
p
u
t
v
o
l
t
a
ge
o
f
H
-
b
r
i
d
ge i
n
ve
rt
er ca
n
be e
x
p
r
es
sed as;
3
04
0
DC
V
V
V
(For
Po
sitiv
e Cycle)
(11
)
To
ob
tain
th
e
1
1
th
lev
e
l of in
v
e
rter ou
t
p
u
t
v
o
ltag
e
, sub-mu
ltilev
e
l switch
e
s S
1
, S
2
and S
3
’ and
H-
B
r
i
dge s
w
i
t
c
he
s S
6
and S
7
are
get
t
i
ng t
u
r
n
e
d
ON. T
h
e o
u
t
p
ut
vol
t
a
ge
of
H-
bri
dge i
n
ve
r
t
er can be ex
p
r
essed
as;
3
04
0
DC
V
V
V
(F
or
Ne
gat
i
v
e
C
y
cl
e
)
(
1
2
)
3.
6.
I
n
Oper
at
i
n
g Mo
des 5
a
nd 12
To obt
ai
n
t
h
e 5
th
lev
e
l of inv
e
rter
ou
tpu
t
v
o
ltag
e
, su
b-mu
ltilev
e
l switch
e
s S
1
’,
S
2
and
S
3
’ a
n
d H
-
B
r
i
dge s
w
i
t
c
he
s S
4
and S
5
are g
e
ttin
g
turn
ed ON.
Hen
ce, the DC v
o
ltag
e
so
urce V
DC1
an
d V
DC3
is lin
k
e
d with
th
e driv
e lo
ad
.
Th
e
ou
tpu
t
vo
l
t
ag
e of
H-
b
r
i
d
ge i
n
ve
rt
er ca
n
be e
x
pres
sed
a
s
;
3
1
05
0
DC
V
DC
V
V
V
(For
Po
sitiv
e
Cycle)
(13
)
To obt
ai
n
t
h
e 12
th
lev
e
l of inv
e
rter ou
tpu
t
vo
ltag
e
, sub
-
m
u
ltilev
e
l switch
e
s S
1
’,
S
2
a
nd
S
3
’ a
nd
H
-
B
r
i
dge s
w
i
t
c
he
s S
6
and S
7
are
get
t
i
ng t
u
r
n
e
d
ON. T
h
e o
u
t
p
ut
vol
t
a
ge
of
H-
bri
dge i
n
ve
r
t
er can be ex
p
r
essed
as;
)
3
1
(
05
0
DC
V
DC
V
V
V
(For
Ne
gative
Cycle)
(14)
3.
7.
I
n
Oper
at
i
n
g Mo
des 6 a
nd 13
To obt
ai
n
t
h
e 6
th
lev
e
l of inv
e
rter
ou
tpu
t
v
o
ltag
e
, su
b-mu
ltilev
e
l switch
e
s S
1
, S
2
’ a
n
d S
3
’ a
n
d H
-
B
r
i
dge s
w
i
t
c
he
s S
4
and S
5
are g
e
ttin
g
turn
ed ON.
Hen
ce, the DC v
o
ltag
e
so
urce V
DC2
an
d V
DC3
is lin
k
e
d with
th
e driv
e lo
ad
.
Th
e
ou
tpu
t
vo
l
t
ag
e of
H-
b
r
i
d
ge i
n
ve
rt
er ca
n
be e
x
pres
sed
a
s
;
3
2
06
0
DC
V
DC
V
V
V
(For
Po
sitiv
e
Cycle)
(15
)
To obt
ai
n
t
h
e 13
th
lev
e
l of inv
e
rter ou
tpu
t
vo
ltag
e
, sub
-
m
u
ltilev
e
l switch
e
s S
1
, S
2
’ a
nd
S
3
’ a
nd
H
-
B
r
i
dge s
w
i
t
c
he
s S
6
and S
7
are
get
t
i
ng t
u
r
n
e
d
ON. T
h
e o
u
t
p
ut
vol
t
a
ge
of
H-
bri
dge i
n
ve
r
t
er can be ex
p
r
essed
as;
)
3
2
(
06
0
DC
V
DC
V
V
V
(F
o
r
Negat
i
ve C
y
cl
e)
(1
6)
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
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-86
94
I
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PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
4
04 –
41
4
40
8
3.
8.
I
n
Oper
at
i
n
g Mo
des 7 a
nd 14
To
ob
tain
t
h
e 7
th
lev
e
l
of inv
e
rter
o
u
t
p
u
t
vo
ltag
e
, sub-m
u
ltilev
e
l switches S
1
’,
S
2
’
and S
3
’ and
H-
B
r
i
dge
swi
t
c
he
s S
4
and S
5
ar
e g
e
ttin
g
t
u
rn
ed O
N
a
s show
n in
Figur
e 4.
H
e
n
ce, t
h
e D
C
vo
ltag
e
so
ur
ce
V
DC1
,
V
DC2
and V
DC3
i
s
l
i
nke
d
wi
t
h
t
h
e
dri
v
e l
o
a
d
.
The
o
u
t
p
ut
v
o
l
t
age o
f
H-
b
r
i
d
ge i
n
ve
rt
er ca
n
be e
x
pres
sed
a
s
;
3
2
1
07
0
DC
V
DC
V
DC
V
V
V
(Fo
r
Po
sitiv
e
Cycle)
(17
)
To
ob
tain
th
e
1
4
th
lev
e
l of inv
e
rter
o
u
t
p
u
t
vo
ltag
e
, su
b-m
u
ltilev
e
l switch
e
s S
1
’, S
2
’ a
n
d
S
3
’ and
H-
Brid
g
e
switches S
6
and
S
7
are g
e
ttin
g tu
rn
ed
ON. Th
e neg
a
tiv
e
o
u
t
p
u
t
v
o
ltag
e
of
H-bridg
e
inv
e
rter
can
b
e
expresse
d as;
)
3
2
1
(
07
0
DC
V
DC
V
DC
V
V
V
(
1
8
)
Sub
-
m
u
ltilev
e
l
and
H-Bri
d
ge switch
e
s are g
e
ttin
g tr
igg
e
red
b
a
sed
on
th
e
switch
i
ng
strateg
y
as
sho
w
n i
n
Ta
bl
e 1.
Fi
gu
re
3.
M
o
d
e
1
o
p
erat
i
o
n
Fi
gu
re
4
.
M
o
de
7
ope
rat
i
o
n
Tab
l
e 1
.
Switch
i
ng
St
rateg
y
of
Su
b-
Mu
ltilevel Switch
e
s and
H-Bri
d
g
e
Switch
e
s
Sub- Multilevel S
w
itches
H-
br
idge Switches
L
e
vels
S
1
S
1
’ S
2
S
2
’ S
3
S
3
’
S
4
S
5
S
6
S
7
V
O
0
0 0
0 0
0
0 0
0
0
0
0
1 1
0 1
0
1 1
0
0
1
1
0 0
1 1
0
1 1
0
0
2
0
1 0
1 1
0
1 1
0
0
3
1
0 1
0 0
1
1 1
0
0
4
0
1 1
0 0
1
1 1
0
0
5
1
0 0
1 0
1
1 1
0
0
6
0
1 0
1 0
1
1 1
0
0
7
0
1 1
0 1
0
0 0
1
1
8
1
0 0
1 1
0
0 0
1
1
9
0
1 0
1 1
0
0 0
1
1
10
1
0 1
0 0
1
0 0
1
1
11
0
1 1
0 0
1
0 0
1
1
12
1
0 0
1 0
1
0 0
1
1
13
0
1 0
1 0
1
0 0
1
1
14
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
Struct
ure of
15-Level Sub-Module
C
a
sc
ade
d H-Bridge
Inve
rter for
Speed
Contr
o
l of …
(R.
Uthirasamy
)
40
9
4.
IMPLEME
N
TATION OF
1
5
-
LEVEL SUB-MULTIL
E
V
EL CASCADE
D H-BRIDGE INVERTER
Varia
b
le spee
d dri
v
es
ha
ve
made its profound
pl
ace in
prese
n
t industrial applications. Since the
num
ber
of
p
o
l
e
s i
s
fi
xe
d
by
desi
g
n
, t
h
e
bes
t
way
t
o
vary
t
h
e s
p
ee
d o
f
t
h
e i
n
d
u
ct
i
o
n m
o
t
o
r i
s
by
vary
i
n
g
t
h
e
su
pp
ly frequ
ency. Th
e torqu
e
d
e
v
e
l
o
p
e
d
b
y
th
e in
du
ction
m
o
to
r is d
i
rectly p
r
op
ortion
a
l to
th
e ratio
o
f
th
e
appl
i
e
d
vol
t
a
g
e
and t
h
e f
r
e
que
ncy
o
f
su
ppl
y
.
I
n
t
h
e
pr
o
pose
d
sy
st
em
, vari
abl
e
fre
que
ncy
m
e
tho
d
i
s
i
m
p
l
e
m
en
ted
fo
r t
h
e sp
eed
co
n
t
ro
l
o
f
sing
le ph
ase indu
ctio
n m
o
to
r. Pu
lse
Wi
d
t
h Mo
du
lation
(PW
M
)
tech
n
i
qu
e
b
a
sed
switch
i
ng
st
rateg
y
is dev
e
lo
p
e
d
for
su
b-m
u
l
tilev
e
l switch
e
s.
Th
e
pro
t
o
t
yp
e m
o
d
e
l of th
e
pr
o
pose
d
sy
st
e
m
consi
s
t
s
of
c
ont
rol
l
e
r
u
n
i
t
,
dri
v
er
u
n
i
t
an
d
po
we
r c
o
n
v
ert
e
r
uni
t
.
4.
1. C
o
ntr
o
l
l
e
r
Uni
t
PIC
1
6F
8
77 m
i
croc
o
n
t
r
ol
l
e
r
f
o
rm
s t
h
e
m
a
jo
r pa
rt
of t
h
e c
ont
rol
uni
t
.
It
com
p
ares t
h
e
act
ual
spee
d
wi
t
h
t
h
e
desi
re
d s
p
ee
d
of
i
n
d
u
ct
i
o
n
m
o
t
o
r
d
r
i
v
e a
n
d t
h
e P
W
M
pul
ses
are
de
vel
o
pe
d acc
or
di
n
g
t
o
t
h
e
v
a
ri
at
i
o
n
in
th
e sp
eed
.
Actu
al sp
eed
of th
e i
n
du
ction m
o
to
r is
sens
ed
by
usi
n
g
t
h
e pr
o
x
i
m
it
y
senso
r
.
M
i
croc
o
n
t
r
ol
l
e
r
pr
o
v
i
d
es t
h
e c
ont
rol
si
g
n
al
s t
o
t
h
e M
O
SF
E
T
dri
v
e
r
ci
rcui
t
vi
a opt
o
- co
u
p
l
e
r. R
S
-2
3
2
com
m
uni
cat
i
ons i
s
t
h
e
m
o
st
pop
ul
ar
m
e
t
hod
of
Per
s
on
al
C
o
m
put
er (PC
)
t
o
e
x
t
e
rnal
devi
ce c
o
m
m
uni
cat
i
ons. R
e
fere
nce s
p
eed
o
r
d
e
sired
sp
eed
o
f
t
h
e indu
ction
m
o
to
r is en
tered
i
n
PC
u
s
ing
LABVIEW to
o
l
s and
wh
ich is tran
sm
itted
to
th
e
cont
rol
l
e
r u
n
i
t
vi
a
R
S
-
2
32
ca
bl
e.
4.
2. Dri
v
er
U
n
i
t
Th
ree
driv
er IC b
o
a
rds are
assem
b
led
to
trigg
e
r
th
e sub-m
u
lti
lev
e
l an
d
H-b
r
idg
e
M
O
SFET switches.
C
ont
r
o
l
si
g
n
al
s are t
r
a
n
sfe
rre
d f
r
om
PIC
co
nt
r
o
l
l
e
r t
o
t
h
e
dri
v
er
boa
r
d
s
vi
a o
p
t
o
-co
u
p
l
e
r. T
h
e
dri
v
e
r
ci
rcui
t
for th
e su
b-m
u
ltilev
e
l in
v
e
rter switch
e
s (S
1
, S’
1
, S
2
, S
’
2
, S
3
, and
S’
3
) is sh
ow
n in
t
h
e Fi
g
u
re 5
.
Fig
u
re
5.
Driver circu
it un
it
of su
b-m
u
ltilev
e
l in
v
e
rter switch
e
s
4.3. Power Ci
rcuit
unit of
SMCHBI
Figu
re
6.
Ha
rd
ware
eq
uivale
n
t
circuit o
f
1
5
-l
evel SM
CHB
I
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
4
04 –
41
4
41
0
The eq
ui
val
e
n
t
ci
rcui
t
of 1
5
-
l
e
vel
SM
C
H
B
I
fed si
ngl
e
pha
se i
n
d
u
ct
i
o
n m
o
t
o
r dri
v
e
i
s
show
n i
n
Figure
20. E
a
ch s
u
b-m
u
ltilevel m
odule c
onsists
of
two powe
r M
O
S
F
ET s
w
itches.H-bri
dge
unit of the
pr
o
pose
d
sy
st
em
consi
s
t
s
o
f
f
o
u
r
po
wer
M
O
SFE s
w
i
t
c
hes. T
h
e asy
m
m
e
t
r
i
cal
vol
t
a
ge s
o
u
r
ces
o
f
su
b-
m
u
ltilevel
m
odules
are 53.8 V, 107.4
V
and 161.2 V.
T
h
ree asym
m
e
trical DC s
o
urce
s are
de
velope
d
from
th
r
ee
d
i
od
e
b
r
i
d
g
e
r
ectif
ier units as show
n in Figu
r
e
6.
5.
HA
RD
WA
RE
RES
U
LTS
A
N
D
DI
SC
US
S
I
ONS
In
th
is sectio
n, th
e ex
p
e
rim
e
n
t
al resu
lts o
f
th
e
pr
o
p
o
s
ed
1
5
-l
e
v
el
si
ngl
e pha
se SM
C
H
B
I
sy
st
em
for
vari
a
b
l
e
s
p
eed
AC
d
r
i
v
e a
p
pl
i
cat
i
ons i
s
p
r
esent
e
d.
A
n
expe
ri
m
e
nt
al
set
u
p
of
t
h
e
pr
o
pose
d
sy
st
em
i
s
d
e
v
e
l
o
p
e
d
t
o
ob
tain
th
e sp
eed con
t
ro
l of
0
.
25
HP i
n
du
ction m
o
to
r driv
e
and
th
e resu
lts are pu
t fo
rt
h
.
5
.
1
.
Gate Pulses to
Sub-Mul
t
ilev
e
l Switches
Tw
o pat
t
e
r
n
s
of
gat
e
p
u
l
s
es
are de
vel
ope
d
fo
r i
n
vert
e
r
s
w
i
t
c
hi
n
g
.
S
4
and
S
5
switc
hes
receive t
h
e
sam
e
pattern o
f
firi
ng
p
u
lses.
S
6
and S
7
s
w
i
t
ches recei
ve the sam
e
pattern of
firing
pul
ses which a
r
e
180º
p
h
a
se sh
ift with
S
4
and S
5
firin
g
pu
lses. PWM b
a
sed
g
a
t
e
p
u
l
ses are d
e
v
e
lop
e
d
for sub
-
m
u
ltilev
e
l s
w
itch
e
s.
Gat
e
pul
ses a
r
e devel
o
pe
d f
o
r achi
e
vi
ng
4 set
s
of re
fe
re
n
ce speed
of i
n
duct
i
o
n m
o
t
o
r.
The ge
nerat
e
d gat
e
p
u
l
ses
o
f
sub
-
m
u
l
tilev
e
l swit
ch
es fo
r
ob
tainin
g
1
100
RPM an
d
1
200
RPM o
f
ro
tor sp
eed
is sho
w
n
in
Fig
u
re
7
and Figure
8 re
spectively.
(a)
(b
)
(c)
Fig
u
re 7
.
Gate Pu
lses
t
o
Sub
-
m
u
l
tilev
e
l
Switch
e
s for 11
00
RPM:
(a) To
S
1
,(b) T
o
S
1
’,
(c)
To
S
2
Fro
m
th
e Figure 7
and
Fi
g
u
re
8
,
it is
o
b
serv
ed
th
at t
h
e switch
i
ng
freq
u
e
n
c
y o
f
sub
-
m
u
ltil
ev
el pu
lses
get
i
n
c
r
ease
d
t
o
obt
ai
n
t
h
e
t
w
o
refe
rence
spe
e
d
of
1
1
0
0
R
P
M
an
d
12
0
0
R
P
M
,
are
t
a
b
u
l
a
t
e
d i
n
t
h
e
Tabl
e
2.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
Struct
ure of
15-Level Sub-Module
C
a
sc
ade
d H-Bridge
Inve
rter for
Speed
Contr
o
l of …
(R.
Uthirasamy
)
41
1
(a)
(b
)
(c)
Fig
u
re 8
.
Gate Pu
lses
t
o
Sub
-
m
u
l
tilev
e
l
Switch
e
s for 12
00
RPM:
(a) To
S
1
,(b) T
o
S
1
’,
(c)
To
S
2
Tab
l
e
2
.
Switch
i
ng
Freq
u
e
n
c
y o
f
sub
-
m
u
ltil
ev
el switch
e
s
Rotor
Speed (
R
PM)
Switching Fr
equency
(
H
z)
Ref
e
rence Actual
S
1
S
1
’
S
2
1100
1099
242.
35
240.
73
475.
02
1200
1195
259.
00
257.
29
509.
70
5.
2.
Ou
tpu
t
V
o
l
t
age
o
f
H
-
B
r
i
d
ge In
ver
t
er
The
out
put
vo
l
t
a
ge wave
f
o
r
m
s of H
-
b
r
i
d
g
e
i
nve
rt
er are
sho
w
n i
n
Fi
gu
re 9
(
a) a
n
d (
b
). F
r
om
t
h
e
obt
ai
ne
d w
a
ve
fo
rm
show
n i
n
Fi
gu
re 9(
a), i
t
i
s
obser
ve
d t
h
at
t
h
e out
p
u
t
v
o
l
t
a
ge an
d f
r
eq
uency
o
f
H-
b
r
i
d
ge
in
v
e
r
t
er
is
2
80V
an
d
41
.3
5H
z r
e
sp
ectiv
ely.
Fr
o
m
th
e ob
ta
in
ed wav
e
form
sh
own
in Figu
re 9
(b), it is
o
b
served
t
h
at
t
h
e
out
p
u
t
vol
t
a
ge
an
d
fr
e
que
ncy
of
H
-
b
ri
d
g
e i
n
vert
e
r
i
s
2
8
0
V
a
n
d
5
2
.
4
1
5
H
z
respect
i
v
el
y
.
(a)
(b
)
Fi
gu
re
9.
O
u
t
p
ut
V
o
l
t
a
ge
o
f
H-B
r
i
d
ge I
n
ver
t
er f
o
r
a)
4
1
.
3
5
Hz
b
)
F
o
r
5
2
.
4
15
Hz
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
4
04 –
41
4
41
2
5.
3. Ac
tual
Sp
eeds of 1
5
-l
e
v
el
SMCHBI fe
d
Ind
u
cti
o
n Motor Drive
Spee
d co
nt
r
o
l
of i
n
d
u
ct
i
o
n
m
o
t
o
r i
s
achi
e
ved i
n
acc
or
d
a
nce wi
t
h
t
h
e
refe
rence s
p
e
e
d,
whi
c
h i
s
im
port
e
d t
o
t
h
e cont
rol
l
e
r t
h
ro
u
gh
per
s
o
n
al
com
put
er u
s
i
ng
LAB
V
IE
W
t
ool
s.
Fo
r t
h
e
refe
rence
spe
e
ds
o
f
1
100
RPM,
1
2
0
0
R
PM t
h
e
ob
tain
ed th
e actu
al sp
eed
s
o
f
t
h
e indu
ctio
n m
o
to
r is
1
099
RPM,
1
1
9
5
R
PM
respectively. T
a
ble 3 clearly im
plie
s th
e sp
eed
con
t
ro
l of 1
5
-lev
el SMC
H
BI fed
indu
ctio
n
m
o
to
r which
is
achi
e
ve
d usi
n
g
vari
abl
e
fre
q
u
e
ncy
m
e
t
hod.
The act
ual
rot
o
r s
p
eed o
f
t
h
e i
nduct
i
o
n m
o
t
o
r fo
r t
h
e re
fere
nce
sp
eed
o
f
11
00RPM
is
show
n in
Figur
e 1
0
.
Tabl
e
3.
Fre
q
u
e
ncy
V
s
A
c
t
u
a
l
Spee
d
of
t
h
e
I
n
d
u
ct
i
o
n M
o
t
o
r
Rotor Speed (RPM
)
Frequency (
H
z)
Ti
m
e
Period
(
m
s
)
Ref
e
rence Actual
1100
1099
41.
35
24.
18
1200
1195
48.
85
20.
47
1500
1494
52.
415
19.
07
The
re
qui
re
d
DC
s
o
u
r
ces
a
n
d
s
w
i
t
c
hes
f
o
r
si
n
g
l
e
phas
e
15
-l
evel
C
M
LI, B
C
M
L
I
a
n
d
SM
C
H
B
I
syste
m
s are analyzed and tabulated in
Tab
l
e 4
and
5
respectiv
ely. Fro
m
th
e an
alysis, it is in
ferred
that the
pr
o
pose
d
SM
C
H
B
I
sy
st
em
requi
red l
e
ss n
u
m
ber of DC
s
o
u
r
ces, a
nd
n
u
m
ber of swi
t
c
hes t
h
a
n
co
nve
nt
i
onal
sy
st
em
s. The t
echni
cal
s
p
eci
fi
cat
i
on
of
IC
L
7
66
7 i
s
l
i
s
t
e
d i
n
Tabl
e
6.
Table
4. Re
quired Num
b
er Switches
for
Sing
le Ph
ase CM
LI an
d SMCHBI
Nu
m
b
e
r
of
levels
Nu
m
b
e
r
of Switch
e
s
In
CML
I
In
SMCHB
I
5 4
6
7 12
8
15
28
10
31
60
12
Fig
u
r
e
10
.
A
c
t
u
al dr
iv
e sp
eed (1
099
RPM) fo
r th
e
r
e
f
e
r
e
nce sp
eed
(
110
0
RPM)
Table 5.Required Num
b
er DC
Sources
for Si
ngle
Pha
s
e CM
LI a
n
d SMCHBI
Nu
m
b
e
r
of
levels
Nu
m
b
e
r
of
DC So
urces
In
CML
I
In
SMCHB
I
3 2
1
7 3
2
15
7
3
31
15
4
Table
6. T
echnical Specifications
of
ICL
7
667
S.
No. Specification
Range
1
L
ogic 1 I
nput Voltage
V
IH
4.
5 V to 17 V
2
Output High Voltage
V
OH
14.
95
V
3
Power
Supply
Curr
ent
I
DD
7
m
A
4 Supply
Voltage
V
DD
15
V
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
Struct
ure of
15-Level Sub-Module
C
a
sc
ade
d H-Bridge
Inve
rter for
Speed
Contr
o
l of …
(R.
Uthirasamy
)
41
3
Fi
gu
re
1
1
. E
x
p
e
ri
m
e
nt
al
Set
up
of
PC
i
n
t
e
rfa
ced
15
-
lev
e
l SMCHBI fed
Ind
u
c
tion
Mo
to
r Driv
e Syste
m
Table 7. Hardware
Specifica
tion
Co
m
ponents Specifications
Diode 1N4007
Capacitor
1000
μ
F
Disc Capacitor
22 pF
MOSF
ET
IRF840
PI
C M
i
cr
ocontr
o
ller
16F87
7A
Dr
iver
I
C
I
C
l7667
Opto I
s
olator
6N135
1Ø I
nduction M
o
tor
0.
25 HP
Speed Sensor
Pr
oxim
ity
Th
e exp
e
r
i
m
e
n
t
al setu
p
o
f
t
h
e pr
opo
sed
syste
m
is sh
own
in
Figur
e 11
. Th
e pow
er su
pp
ly un
it
consists of
step down t
r
ans
f
orm
e
r and re
gulator ICs
IC
7805 and
IC7815.
Sub-m
u
ltilevel
m
odule c
o
nsis
ts of
si
x M
O
S
F
ET
swi
t
c
hes.
H
-
b
r
i
dge i
nve
rt
er c
onsi
s
t
s
o
f
f
o
ur
M
O
SFE
T s
w
i
t
c
hes. C
o
nt
r
o
l
l
er u
n
i
t
co
nsi
s
t
s
of
PIC16F
877 a
n
d its biasing c
o
m
pone
nts
inc
l
uding crystal oscillator.
Driver
unit consist
s
of ICL
7
667
and its
bi
asi
n
g c
o
m
ponent
s
.
T
h
ree
di
ode
b
r
i
d
ge
rect
i
f
i
e
rs are
i
m
pl
em
ent
e
d f
o
r
o
b
t
a
i
n
i
n
g
eq
ui
val
e
nt
DC
so
urc
e
s
. T
h
e
det
a
i
l
e
d sy
st
e
m
hardwa
re s
p
eci
fi
cat
i
on i
s
t
a
bul
at
ed
i
n
Tabl
e 7.
6.
CO
NCL
USI
O
N
In
t
h
is p
a
p
e
r, a n
e
w stru
ctu
r
e
o
f
si
n
g
l
e
ph
ase 1
5
-l
ev
el
Su-Mu
ltilev
e
l
Cascad
ed
H-Bridg
e
In
v
e
rter fed
vari
a
b
l
e
sp
eed
i
n
d
u
ct
i
o
n m
o
t
o
r
d
r
i
v
e
has
b
een
pr
o
pose
d
.
It
has
bee
n
sh
ow
n t
h
at
t
h
e
s
t
ruct
u
r
e c
o
nsi
s
t
i
ng
o
f
sub-m
u
ltilevel
m
odules and
H-bri
dge i
nve
rter. It is s
h
own that this struct
ure ca
n be
a
n
appropriate
aspira
nt
f
o
r
pow
er
co
nver
t
er
s used
i
n
sp
eed
con
t
ro
l o
f
A
C
d
r
i
v
e app
l
icatio
n
s
.Co
m
par
e
d
w
ith
conven
tio
n
a
l inv
e
r
t
er
f
e
d
spee
d co
nt
r
o
l
of i
n
d
u
ct
i
on m
o
t
o
r dri
v
e sy
st
em
s, t
h
e pr
op
ose
d
sy
st
em
em
pl
oy
s l
e
ss v
o
l
t
a
ge st
ress
, r
e
duc
e
d
switch
cou
n
t
an
d DC
source cou
n
t
. Th
e
p
r
o
p
o
s
ed
t
o
po
log
y
ex
ten
d
s th
e d
e
si
g
n
flex
ib
i
lity an
d
p
o
s
sib
l
e t
o
opt
i
m
i
ze t
h
e powe
r
c
o
n
v
e
r
t
e
r
fo
r ac
hi
evi
ng t
h
e m
a
i
n
ob
j
ect
ives. T
h
e e
x
perim
e
ntal results of t
h
e
15-level
Sub-
Mu
ltilev
e
l Cascad
ed
H-Bridge Inv
e
rter are
v
a
lid
ated
i
n
th
i
s
p
a
p
e
r.
In
th
e p
r
op
o
s
ed
syst
e
m
, d
e
sired
speed
of
t
h
e i
n
d
u
ct
i
o
n
m
o
t
o
r dri
v
e i
s
achi
e
ve
d t
h
ro
u
gh t
h
e A
pr
ot
o
t
y
p
e
m
odel
of
15
-l
evel
SM
C
H
B
I
i
s
de
vel
o
ped
fo
r
solar powere
d
industrial dri
v
e
syste
m
and their perfor
m
a
nce is validated. The propose
d syste
m
enhanc
es the
u
tilizatio
n
of C
M
LI system
fo
r indu
strial applicatio
n
s
.
REFERE
NC
ES
[1]
AmuliuBogdanProca,
and Ali K
e
y
h
an
i, “Iden
tification of
v
a
riable frequency
induction
motor models from operatin
g
data,”
IEEE Tra
n
s. on
Energy Conv.,
vol. 17
, pp
. 24-31, March
2
002.
[2]
Alfredo Munoz-Garcia, Thomas A. Lipo,
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