Internati
o
nal
Journal of P
o
wer Elect
roni
cs an
d
Drive
S
y
ste
m
(I
JPE
D
S)
Vol
.
6
,
No
. 2,
J
une
2
0
1
5
,
pp
. 39
6~
40
3
I
S
SN
: 208
8-8
6
9
4
3
96
Jo
urn
a
l
h
o
me
pa
ge
: h
ttp
://iaesjo
u
r
na
l.com/
o
n
lin
e/ind
e
x.ph
p
/
IJPEDS
Soft Switched Multi-Output Fl
yback Converter with Voltage
Doubler
K. D
eepa
*
,
Hridy
a
M
erin
Sa
j
u
**
, M. V
i
ja
ya
Kuma
r ***
* EE
E Dep
a
rtm
e
nt, Am
rita
Vis
w
a Vid
y
ap
ee
tham
Univers
i
t
y
,
Ben
g
aluru,
Indi
a
** EEE Dep
a
rtment, Colleg
e of
Engin
eering
,
A
door, India
*** EE Depar
t
ment, JNTU, Anantapur, India
Article Info
A
B
STRAC
T
Article histo
r
y:
Received Dec 25, 2014
Rev
i
sed
May
1, 201
5
Accepted
May 18, 2015
A novel m
u
lti-
output volt
a
ge doubler
circu
i
t with reson
a
n
t
switching
techn
i
que
is pro
posed in
this p
a
per.
The resonant topolog
y
in
the primar
y
side of the fly
b
ack transformer s
w
itches th
e dev
i
ce either at zero
voltag
e
or
current thus opti
m
i
zing the switching de
vi
ces by m
itiga
ting th
e
losses. The
voltag
e
doubler
circu
it in
troduced in the
load side incr
eases th
e voltag
e
b
y
twice th
e value thereb
y
incr
easin
g the
load power and density
.
Th
e proposed
Multi-output
Isolat
ed Convert
er
rem
oves the need for m
u
tiple S
M
PS units
for a parti
c
ula
r
applic
ation
.
T
h
is
reduces the size and weight of the
converters considerably
leading
to a gr
eater p
a
y
l
oad
.
Th
is paper aims at
optimizing th
e
proposed converter with
some
design chang
e
s. The results
obtain
e
d from the hardware pro
t
oty
p
e are g
i
ven
in a comprehens
ive manner
for a 3
.
5W conv
erter
operating
at output
voltages
of 5V and 3
.
3V
at 50
kHz
switching fr
equency
.
The conver
t
er ou
tput
is reg
u
lated with
the
PI controller
designed with S
G
3523 IC. The
effects of load
and line r
e
gulatio
n for ±20%
varia
tions
ar
e
an
al
yz
ed in
de
tai
l
.
Keyword:
Flyback c
o
nve
rter
Lin
e
tran
stien
t
s
L
o
ad
tr
an
s
i
e
n
ts
PI con
t
ro
ller
Vol
t
a
ge
d
o
ubl
e
r
Zero vo
ltag
e
switch
i
ng
Copyright ©
201
5 Institut
e
o
f
Ad
vanced
Engin
eer
ing and S
c
i
e
nce.
All rights re
se
rve
d
.
Co
rresp
ond
i
ng
Autho
r
:
Deepa
K,
Assistant Profe
ssor,
E
EE Departm
e
nt
Am
rita Vishwa
Vidy
a
p
eetham
U
n
ive
r
sity
,
A
m
r
ita Sch
o
o
l
o
f
Eng
i
n
e
er
ing, Bang
alor
e- 56
003
5,
K
a
rn
at
ak
a,
In
d
i
a.
Em
a
il: d
eep
a.kaliyap
eru
m
al@red
iffm
ail.co
m
1.
INTRODUCTION
Flyb
ack
conv
erters are b
e
st
su
ited
fo
r low p
o
wer app
licatio
n
s
, as repo
rted
in
literat
u
res. Man
y
Fl
y
b
ack c
o
n
v
e
t
ers t
o
p
o
l
o
gi
es
im
pl
em
ent
a
t
i
o
n [
1
7,
18]
h
a
v
e
been
di
sc
uss
e
d i
n
t
h
e area
of
res
ona
nce a
nd i
t
s
im
port
a
nce i
n
hi
g
h
s
w
i
t
c
hi
n
g
fre
que
ncy
a
p
pl
i
cat
i
ons
[1
2,
13]
. R
e
s
o
nan
ce (ZV
S
/
Z
C
S
)
i
n
t
r
o
d
u
ced i
n
t
h
ese
conve
r
ters s
o
l
v
e the iss
u
e
of redu
ci
n
g
s
w
i
t
c
hi
n
g
l
o
s
s
es d
u
ri
ng
O
N
an
d
OFF c
o
ndi
t
i
o
n
s
. He
nce
no
wa
day
s
,
R
e
sona
nce T
o
pol
ogi
es [
1
]
ar
e prefe
rre
d t
o
P
W
M
co
n
v
ert
e
rs [
2
-
3
]
.
Li
t
e
rat
u
res ha
ve re
po
rt
ed t
h
at
t
h
e
R
C
D
snubber ci
rcui
ts [4,
15] were used t
o
diss
ipate l
eakage inductance
e
n
ergy, wh
ich
i
n
tu
rn
in
t
r
oduces a
dra
w
back whe
n
leakage
inductance [5, 6]
v
a
l
u
e
i
s
hi
g
h
.
O
n
t
h
e
ot
her
han
d
, res
ona
nt
ci
r
c
ui
t
s
en
g
u
l
f
t
h
e
effe
ct
of lea
k
age
inductance, switc
h ca
pacitance a
nd
pa
rasitic
capacitance; in e
ssence, rem
oving t
h
e
necessity for a
n
ext
r
a i
n
du
ct
or
and ca
paci
t
o
r f
o
r
reso
na
nce.
Thi
s
pa
pe
r em
pha
sises on the load power,
density and efficiency
o
f
t
h
e m
u
ltio
u
t
p
u
t
co
nv
erters. Th
e m
u
lti-o
u
t
p
u
t
[9, 10
] a
nd v
o
ltag
e
dou
b
l
er [8
,
1
1
, 14
, 16
] con
cep
ts i
n
crease
t
h
e n
u
m
b
er of
out
put
s i
n
t
h
e con
v
e
r
t
e
r an
d
hence t
h
e p
o
w
e
r de
nsi
t
y
. The
swi
t
c
hi
n
g
l
o
ss
es due t
o
t
h
e d
e
vi
ce
s
use
d
in the c
onverter are
re
duced to
zero
with
ZVS/ZCS during
ON/OFF
[7
].
To
th
e au
thor’s k
n
o
w
led
g
e
, prev
i
o
u
s
works repo
rted
in
lite
ratu
re co
n
c
en
trate o
n
redu
cing
switch
i
ng
lo
sses in th
e
p
r
i
m
ary circu
it by in
trod
ucing
reson
a
n
c
e in
the p
r
im
ary switch
e
s; wh
ile in
secon
d
a
ry d
i
o
d
es, t
h
e
switch
i
ng
lo
sses are n
o
t
consid
ered
for sing
le/
m
u
lti-
o
u
t
pu
t co
nv
erter.
Th
is wo
rk
fo
cu
ses on
m
u
lti-
o
u
t
p
u
t
t
o
p
o
l
o
gy
an
d
vol
t
a
ge
d
o
ubl
e
r
i
n
t
h
e sec
o
n
d
a
ry
ci
rcui
t
.
As
t
h
ere a
r
e
no
m
a
jor c
h
a
n
g
e
s
i
n
t
h
e e
n
er
gy
st
ora
g
e
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l. 6,
No
.
2,
Ju
ne 20
15
:
396
–
4
03
3
97
ele
m
en
ts ex
cep
t for th
e add
itio
n
o
f
a tertiary win
d
i
n
g
i
n
th
e fly
b
ack tra
n
s
f
o
r
m
e
r,
m
o
re
than
one output
can be
o
b
t
ain
e
d
fro
m
th
e sam
e
sized
co
nv
erter and
t
h
e latter in
creases th
e ou
tpu
t
v
o
ltag
e
. Moreov
er, it h
a
s th
e ad
d
e
d
adva
nt
age
o
f
r
e
duci
ng t
h
e s
w
i
t
c
hi
ng st
re
ss i
n
seco
n
d
ary
di
ode
s. Last
l
y
, i
m
pl
em
ent
a
t
i
on of cl
o
s
ed l
o
o
p
ci
rcui
t
regu
lates th
e ou
tpu
t
v
o
ltag
e
b
y
u
s
ing
a lo
w co
st IC (SG3
525
) resu
lting
in
co
m
p
actn
e
ss, econ
o
m
ic
al u
s
ag
e,
sim
p
l
e
cont
rol
m
e
t
hod
ol
o
g
y
a
n
d
re
g
u
l
a
t
e
d S
M
PS.
2.
PROP
OSE
D
CO
NVE
RTER
Th
e po
wer stag
e circu
it d
i
agram o
f
th
e mu
lti-ou
tpu
t
ZVS-PWM flyb
ack
DC-DC con
v
e
rter with
vol
t
a
ge
d
o
ubl
e
r
i
s
p
r
ese
n
t
e
d
i
n
Fi
g
u
re
1.
T
h
e co
n
v
ert
e
r c
onsi
s
t
i
n
g
of a
swi
t
c
h S
m
, an
isolated tra
n
sform
e
r,
tran
sform
e
r
mag
n
e
tising
i
n
du
ctor L
m
, trans
f
orm
e
r leakage inductor L
s,
o
u
t
p
u
t
filter
cap
acito
rs
C
o1
and C
o2
,
di
o
d
es D
2
an
d D
3
, res
o
nant
i
n
d
u
ct
o
r
L
r
, re
sonant capacit
o
r C
r
, au
x
iliary switch
S
a
, seco
nda
ry
res
ona
nt
capacitors
C
d1
and C
d2
an
d rectifier d
i
od
es
pairs D
11
, D
12
, a
nd
D
21
, D
22
[7
]. Th
e
v
o
ltag
e
do
ub
ler ci
rcu
it has th
e
ad
v
a
n
t
ag
e of i
n
creased
po
wer d
e
n
s
ity in
t
h
e con
v
e
rter
ov
er its co
un
terp
art
- th
e
m
u
lti-o
u
t
p
u
t
ZVS-PWM
,
thu
s
facilitatin
g
redu
ced conv
erter size. Mu
lti-outp
u
t
co
nv
erters are eq
u
i
v
a
len
t
to
m
a
n
y
sin
g
l
e ou
tpu
t
con
v
e
rters
connected in
parallel to each
othe
r; he
nce t
h
e operation is s
i
m
i
lar to the
single
output conve
rters a
s
e
x
plaine
d
by
aut
h
o
r
s i
n
[
14]
.
Fi
gu
re
1.
C
i
rcu
i
t
di
agram
3.
DESIG
N
DET
A
ILS
Isolated
flybac
k converters a
r
e a de
rivative of
n
on-
iso
l
ated
bu
ck-b
oo
st
co
nv
er
ter
s
. Th
e vo
ltag
e
i
n
p
u
t
-
out
put
re
l
a
t
i
on
i
s
gi
ve
n as:
1
(1
)
Wh
ere, n >1
for th
e
propo
sed
co
nv
erter an
d
D is th
e du
ty ratio
(<
1
)
; im
p
l
yin
g
th
at
is always less
th
an
V
in
. As t
h
e v
o
ltag
e
do
ubler is in
trod
u
c
ed
in
th
e se
c
o
n
d
ary
si
de
, i
t
has no e
ffect
on
t
h
e pri
m
ary
vo
l
t
a
ge
but acts only to increase the voltage
on t
h
e loa
d
side
.T
he cha
r
acterist
i
cs of the propos
ed c
o
nve
r
ter are
t
a
bul
at
ed
i
n
T
a
bl
e
1. T
h
e
de
si
gn
cal
cul
a
t
i
o
ns a
r
e
d
one
us
i
ng e
q
uat
i
o
ns
(2
)-
(6
) a
n
d t
h
e
o
b
t
a
i
n
e
d
val
u
es ar
e
listed
in
Tab
l
e
1
.
Tabl
e
1. C
o
n
v
e
r
t
e
r s
p
eci
fi
cat
i
o
n
an
d
desi
gne
d
val
u
es
Specifications
Designed
values
I
nput voltage,
V
i
n
: 12 ± 10%V
M
a
gnetising induc
tance,
L
m
:
81
μ
H
Output voltage,
V
o1
: -3
.3
V
No
.o
f
tu
rn
s in prim
a
r
y,
N
p
: 36
Output cur
r
e
nt,
I
o1
: -
0
.
33A
No.
o
f tur
n
s in fir
s
t
secondar
y
,
N
s1
: 19
Output voltage,
V
o2
: -
5
V
No.
o
f tur
n
s in second secondar
y
,
N
s2
: 12
Output cur
r
e
nt,
I
o2
: -
0
.
5
A
T
r
ansform
e
r
Cor
e
selected :
E
E
/
20/10/15
Switching fr
equen
c
y
,
f
s
: 50kHz
L
r
= 25
μ
H C
r
= 27.
77nF
L
s
= 50
μ
H
Power
rating,
P
o
:
3.
5W
C
d1
= 300
nF
C
d2
= 1000
nF
f
r
= 25
0kHz
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
S
o
ft
S
w
itch
e
d
Mu
lti-Ou
tpu
t
Flyb
a
ck C
o
n
vert
e
r with
Vo
lta
ge Do
ub
ler
(D
eep
a
K)
39
8
For
ac
hieving ZVS criteria
0
.
2
(2
)
Characteristic i
m
pedance,
√
(3
)
R
e
sona
nt
fre
qu
ency
,
√
1
(4
)
Th
e tran
sform
e
r
d
e
sign
[5,
6
]
is carried
ou
t and
th
e d
e
tails are tab
u
l
ated
in tab
l
e 1.
Ou
t
p
u
t
filter
cap
acitan
ce,
∗
100
(5
)
The sec
o
nda
ry
reso
na
nt
capa
c
i
t
o
r C
d
[8
, 11
]
an
d th
e
r
ectifier d
i
od
es D
11
and
D
12
dou
b
l
e t
h
e ou
tpu
t
vo
ltage.
Out
put
res
ona
n
t
capaci
t
o
r
,
4
(6
)
4.
R
E
SU
LTS AN
D ANA
LY
SIS
Th
e
h
a
rdware resu
lts ob
tain
ed are
p
r
es
ente
d
and analyse
d
i
n
this
section.
4.1. Har
d
ware
Implementati
on
Th
e hard
ware
lab
o
rato
ry
p
r
o
t
o
t
yp
e was
d
e
velo
p
e
d
fo
r M
u
lti-o
u
t
pu
t vo
ltag
e
dou
b
l
er ZVS flyb
ack
con
v
e
r
t
e
r
wi
t
h
t
h
e
desi
gne
d
val
u
es
(l
i
s
t
e
d
i
n
Ta
bl
e
1)
.
IR
F8
40
wa
s
use
d
as
po
we
r s
w
i
t
c
hes a
n
d
IN
5
8
1
9
as
di
o
d
es.
The
ga
t
i
ng
pul
ses
f
o
r
t
h
e swi
t
c
hes S
a
and S
m
wer
e
gene
rat
e
d
usi
n
g
AR
M
p
r
oce
s
sor
wi
t
h
p
u
l
s
e
wi
dt
h
of
40
% an
d 2
0
%
respect
i
v
el
y
.
Fi
g
u
re
2(a
)
a
nd
(b
) de
pi
ct
t
h
e o
u
t
p
ut
v
o
l
t
a
ge an
d c
u
r
r
ent
val
u
es
(-
3.
3V
,
-0
.3
3A
and
-
5
V,
-0
.5
A
)
f
o
r the
co
n
v
e
r
ter.
The
res
o
n
a
nt capa
c
itor
v
o
ltage
V
cr
and I
cr
ob
tain
ed is sh
own
in Figur
e 2(
c)
.
(a)
(b
)
(c)
Fi
gu
re
2 L
o
a
d
and
R
e
so
na
nt
.
(a)
Loa
d
-
1
v
o
l
t
a
ge a
n
d
cu
rre
n
t
(b
) L
o
a
d
-
2
vo
l
t
a
ge an
d c
u
r
r
e
n
t
(c
) R
e
s
ona
nt
cap
acito
r vo
ltag
e
an
d curren
t
with
m
a
in
p
u
l
se
From
the fi
gure it can be
s
een that t
h
at t
h
e m
a
in
switch
is t
u
rn
ed ON/OFF
wh
en
th
e reson
a
nt
capacitor
volta
ge bec
o
m
e
s ze
ro (i.e
) at ZVS and 82V is
the peak voltage
across th
e re
s
ona
nt capacitor. And
wh
en
th
e
reson
a
n
t
cu
rren
t
d
e
creases to
zero (ZCS), th
e aux
iliary switch
is also
tu
rn
ed
OFF. Th
e
vo
ltag
e
and
cu
rren
t for o
u
t
p
u
t
reso
n
a
n
t
cap
acito
r
with
main
switc
h pulse
are shown
in Figure 3(a).
T
h
e pea
k
s
w
itch
v
o
ltag
e
o
f
84
V ob
tain
ed
an
d th
e
h
a
rdw
a
r
e
pro
t
o
t
yp
e ar
e
pr
esen
ted in
Figu
re 3(
b)
& (
c
)
r
e
sp
ectiv
ely.
I
t
is also
o
b
s
erv
e
d
fro
m
th
e op
en
l
o
op resu
lts th
at wh
en
t
h
e lo
ad
is in
creased
,
o
u
t
p
u
t
v
o
ltag
e
tend
s to
in
crease, an
d
a
sim
i
l
a
r st
at
e i
s
obse
r
ve
d d
u
r
i
ng s
u
ppl
y
v
o
l
t
a
ge i
n
crea
se
wh
ich
is no
t p
r
eferred
m
o
stly
b
y
lo
ad
app
licatio
n
s
.
Hence
a closed loop
op
eration is neces
sary.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l. 6,
No
.
2,
Ju
ne 20
15
:
396
–
4
03
3
99
(a)
(b
)
(c)
Figu
re
3.
(a
) S
econ
d
a
r
y
res
o
n
a
nt capa
c
itor
v
o
ltage
an
d cu
rren
t
with m
a
in
switch
p
u
l
se (b
) Main
switch
vol
t
a
ge
(
V
dsm
) and
cu
rre
nt
(I
dm
) with
m
a
in
switch
p
u
l
se (V
gs
m
) (c)
Ex
pe
rim
e
ntal setup
4.
2.
Cl
os
ed L
o
op E
m
pl
o
y
me
nt
The cl
ose
d
loop ha
rdwa
re e
x
ecution of the conve
rt
er is
co
m
p
leted
with
SG3
525
IC
as shown i
n
Fi
gu
re
4. T
h
e s
econ
d
o
u
t
p
ut
v
o
l
t
a
ge i
s
c
ont
r
o
l
l
e
d
wi
t
h
t
h
e
anal
o
g
c
ont
r
o
l
l
er IC
S
G
35
2
5
,
whi
c
h i
s
a
16
p
i
n I
C
com
m
onl
y
used f
o
r P
W
M
ge
nerat
i
o
n. T
h
e f
eedbac
k
vol
t
a
g
e
i
s
fed t
o
t
h
e i
nve
rt
i
n
g pi
n
(1
st
pi
n)
of t
h
e
I
C
an
d
th
e referen
ce
vo
ltag
e
is fed
to th
e non
-inv
ertin
g
p
i
n
(2
nd
pi
n
)
f
r
om
t
h
e 1
6
th
pi
n.
The
PI c
o
nt
r
o
l
l
e
r o
u
t
p
ut
at
t
h
e
9
th
pi
n a
n
d t
h
e sawt
o
o
t
h
wa
vef
o
rm
gene
ra
t
e
d i
n
t
h
e sam
e
IC
are c
o
m
p
are
d
.
P
W
M
gene
rat
o
r i
s
u
s
ed f
o
r
gene
rat
i
n
g
t
h
e pul
ses fr
om
11
th
and 14
th
pi
n. T
h
e p
u
l
s
e g
e
nerat
e
d f
r
om
11
th
p
i
n
is u
s
ed
to
trigg
e
r the
m
a
in
switch
S
m
. The b
e
h
a
v
i
o
r
o
f
th
e conv
erter
with
clo
s
ed
l
o
o
p
circu
it is stu
d
i
ed in
d
e
tail for lo
ad
an
d lin
e
transients
as e
x
plained bel
o
w.
Fi
gu
re
4.
C
l
os
ed l
o
o
p
em
pl
o
y
m
e
nt
4.
2.
1
L
oad
T
r
a
n
si
e
n
ts
Fo
r a
fall in
load
-1
, th
e effect o
n
ou
tpu
t
v
o
l
tag
e
s is sho
w
n in
Fi
g
u
re
5
(
a). Fu
rt
h
e
r it also
reiterates
th
at th
e l
o
ad vo
ltag
e
-2
is
regu
lated
at
5V fo
r th
e l
o
ad v
a
riatio
n
o
f
-20%. Sim
ilar resu
lts are
ob
tained
for
increase i
n
loa
d
also. T
h
e e
f
fect on
outp
ut
-
1
an
d 2
f
o
r
ri
se
i
n
l
o
a
d
-
2
ca
n
b
e
seen i
n
Fi
gu
r
e
5(
b
)
an
d
(c)
.
Loa
d
v
o
ltag
e
-1
is
d
i
min
i
sh
ed
t
o
2V
wh
ile lo
ad
vo
ltag
e
-2
is
regu
lated
at
5
V
for +2
0
%
v
a
riatio
n
s
in lo
ad
-2
.
4.
2.
2
Line Tra
n
sients
A va
ri
at
i
on
of
±2
0% i
s
ap
pl
i
e
d fo
r l
i
n
e v
o
l
t
a
ge and t
h
e effect
o
n
l
o
a
d
vol
t
a
ge
-
1
an
d
2 f
o
r
fal
l
i
n
su
pp
ly vo
ltag
e
is p
r
esen
ted
i
n
Fig
u
re
6
(
a). It i
s
witn
esse
d t
h
a
t
t
h
e out
put
v
o
l
t
a
ge-
1
dec
r
eas
es t
o
2
V
f
r
o
m
r
a
t
e
d
3.
3V
f
o
r
d
ecre
a
se i
n
su
p
p
l
y
.
Fi
gu
re
6(
b
)
c
o
nfi
r
m
s
t
h
e e
ffe
ct
of
l
o
a
d
-
2
v
o
l
t
a
ge an
d c
u
rre
nt
f
o
r
fal
l
i
n
s
u
p
p
l
y
vol
t
a
ge
. T
h
e l
o
ad
v
o
l
t
a
ge-
2
i
s
det
ect
ed t
o
b
e
reg
u
l
a
t
e
d
fo
r
bot
h
ups
wi
n
g
and
decl
i
n
e i
n
sup
p
l
y
v
o
l
t
a
ge
. The
sup
p
l
y
c
h
an
ge
appl
i
e
d
i
s
a
ppa
rent
i
n
t
h
e
cha
nge
i
n
c
u
rre
nt
.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
S
o
ft
S
w
itch
e
d
Mu
lti-Ou
tpu
t
Flyb
a
ck C
o
n
vert
e
r with
Vo
lta
ge Do
ub
ler
(D
eep
a
K)
40
0
(a)
(b
)
(c)
Figu
re
5.
(a
) L
o
ad
v
o
ltages
w
h
en
R
o1
decline (b)
V
o1
, I
o1
for lo
ad
v
a
riations in
R
o2
(c) V
o2
, I
o2
fo
r l
o
ad
va
riations
in
R
o2
(a)
(b
)
(c)
Figu
re
6.
(a
) L
o
ad
v
o
ltages
f
o
r
decrease
in s
u
p
p
ly
vo
ltag
e
(b
) Regu
lated
l
o
ad vo
ltag
e
and
cu
rren
t
(V
o2
, I
o2
)
fo
r
line v
o
ltage
re
ductio
ns (c)
Efficiency
c
u
r
v
e
5.
ANALYSIS OF THE
CONVERTER
Fro
m
th
ese ev
alu
a
tio
n
s
we
determin
e th
at t
h
e ou
tpu
t
v
o
l
t
a
g
e
-2
is regu
lated
for ±20
%
v
a
riation
in
bot
h line a
n
d l
o
ad va
riation.
Efficiency
of t
h
e
co
nv
erter is
calcu
lated
from
Eq
u
a
tio
n
s
(7 -9
).
Out
put p
o
we
r,
(7
)
I
npu
t pow
er
,
(8
)
Efficiency,
(9
)
Th
e m
u
lti-o
u
t
p
u
t
vo
ltag
e
do
ub
ler ZVS
fl
yb
ack conv
ert
e
r
g
i
v
e
s an efficien
cy of
88%,
wh
ich
is
sig
n
i
fican
tly h
i
g
h
e
r th
an
t
h
at o
f
th
e m
u
lti-
o
u
t
p
u
t
ZVS
fl
yb
ack
co
nv
ert
e
r as rev
ealed in
efficien
cy
cu
rv
e
Fig
u
re
6
(
c).
A co
m
p
arison
of th
e efficien
cies o
f
si
ng
le ou
t
p
u
t
and
m
u
lti-
o
u
t
p
u
t
ZVS fl
yb
ack
con
v
e
rter with
an
d
witho
u
t
voltag
e
do
ub
ler i
s
illu
strated
in
Tab
l
e 2.
Fro
m
th
e tab
l
e it is can
b
e
seen
t
h
at
m
u
lti-o
u
t
pu
t
ZVS
to
po
log
y
with
v
o
ltag
e
dou
b
l
er is m
o
re efficien
t th
an
the
o
t
h
e
r top
o
l
o
g
i
es.
Table
2. E
ffici
ency appraisal
PWM based Fl
yback
ZVS Fl
yb
ack
ZVS Fl
yback with
VD
Single-
Output 40%
75%
85%
Multi-Output 72%
80%
88%
Th
e propo
sed
circu
it i
m
p
l
e
m
en
ted
withou
t v
o
ltag
e
d
oub
ler circu
it (C
d1,
D
11
and C
d2,
D
21
are rem
oved)
resul
t
e
d i
n
out
put
s -
2
.
6
V, -
0
.
2
6
A
an
d -
3
.
4
V
,
-0.
3
4A
, as sh
ow
n i
n
Fi
g
u
r
e
7(a
)
. Fr
om
t
h
i
s
wave
fo
rm
i
t
i
s
cl
ear
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l. 6,
No
.
2,
Ju
ne 20
15
:
396
–
4
03
4
01
t
h
at
t
h
e sec
o
n
d
ary
out
put
vo
l
t
a
ge an
d cu
rre
nt
s res
p
ect
i
v
el
y
are d
o
u
b
l
e
d
due t
o
t
h
e i
n
t
r
od
uct
i
o
n
of a
vol
t
a
g
e
d
oub
ler circu
it
in
th
e l
o
ad sid
e
of th
e flyb
ack
tran
sform
e
r.
Po
wer de
nsi
t
y
i
s
m
easured
as po
wer pe
r uni
t
v
o
l
u
m
e
.
Ad
di
n
g
a cap
aci
t
o
r an
d a di
ode at
t
h
e
seco
nda
ry
si
de
has an i
n
si
g
n
i
fi
cant
effect
on
v
o
l
u
m
e
. Wi
t
hout
a v
o
l
t
a
ge d
o
ubl
er
, t
h
e po
wer
o
b
t
a
i
n
ed i
s
1
.
8
32W
, wh
ile w
ith
th
e v
o
ltag
e
do
ub
ler
th
e p
o
w
e
r
is 3
.
589W
. Tak
e
n
as a r
a
tio
, w
e
ob
ser
v
e th
at th
e po
w
e
r
d
e
nsity is d
oub
led
.
Sim
i
larly
,
m
u
lti-o
u
t
p
u
t
ZVS
flyb
ac
k
co
nv
erter ex
h
i
bits d
o
u
b
l
e the
v
o
ltag
e
stress
o
n
t
h
e
seconda
ry diodes than the
proposed c
o
nve
r
ter, as ve
ri
fie
d
in sim
u
lation (Fig
u
r
e 7 (
b
) & (c)
)
an
d h
a
rd
ware
resu
lts
(Figure
8
(
a) & (b
)). The vo
ltag
e
RMS across t
h
e
device is 5.3V c
o
m
p
ar
ed t
o
j
u
st
2.
8V
i
n
t
h
e
pr
o
pos
ed
co
nv
er
ter
.
Thus it is v
i
b
r
an
t
th
at th
e
vo
ltage str
e
ss on
t
h
e second
ar
y
d
i
od
e is
do
ub
le t
h
at of
t
h
e
p
r
op
o
s
ed
conve
r
ter.
(a)
(b
)
(c)
Fig
u
re
7
.
(a)
Ou
t
p
u
t
vo
ltag
e
s and
cu
rren
ts
with
ou
t
v
o
ltage do
ub
ler circuit; Vo
ltag
e
acro
ss t
h
e secon
d
ary
d
i
od
es i
n
sim
u
l
a
tio
n
for
(b) mu
lti-ou
tpu
t
vo
ltag
e
d
oub
ler ZVS
flyb
ack
con
v
e
rter
(c) m
u
lti-o
u
t
p
u
t
ZVS
flyback converter
(a)
(b
)
Fi
gu
re
8.
V
o
l
t
a
ge ac
ros
s
t
h
e
s
econ
d
a
r
y
di
ode
s (a
)
wit
h
v
o
ltag
e
d
oub
ler (b) with
ou
t v
o
ltage
do
ub
ler
Thi
s
researc
h
pape
r
pr
o
p
o
s
es
t
h
at
-
f
o
r
ap
pl
i
cat
i
ons
of
po
w
e
r s
u
p
p
l
i
e
d
t
o
di
ve
rse s
u
bsy
s
t
e
m
s
such
as
dri
v
es, t
une
rs,
audi
o st
a
g
es a
n
d c
o
m
p
l
e
x p
r
o
cesso
r an
d l
ogi
c ci
rcui
t
s
;
m
u
l
t
i
p
l
e
o
u
t
p
ut
fl
y
b
ack
co
n
v
ert
e
r
s
wi
t
h
vol
t
a
ge/
c
ur
re
nt
[1
9]
ra
nges
o
f
5V/
0
.
5
A
,
3
.
3
V
/
0
.
3
3A
, et
c a
r
e vi
t
a
l
.
Ty
pi
c
a
l
appl
i
cat
i
on i
s
al
so n
o
t
e
d i
n
set
t
o
p
bo
xes
,
deco
der
s
an
d sm
al
l
DVD
pl
ay
ers
[
1
9]
.
6.
CO
NCL
USI
O
N
An
alysis of the Mu
lti-o
u
t
pu
t v
o
ltag
e
dou
b
l
er ZV
S flyb
ack
DC
-DC conv
erter con
c
ludes th
at th
e
au
x
iliary switch
S
a
o
p
erat
es
at
ZC
S du
ri
n
g
t
u
rn
ON a
n
d t
u
r
n
OF
F, an
d
al
l
ot
her sem
i
con
duct
o
r
de
vi
ces
ope
rat
e
at
ZVS
duri
n
g t
u
r
n
O
N
an
d t
u
r
n
OF
F. Thi
s
i
s
ach
iev
e
d
with
ou
t any cu
rren
t/v
o
ltag
e
sp
i
k
e th
at persists
i
n
co
n
v
ent
i
ona
l
har
d
s
w
i
t
c
hi
ng
ci
rc
ui
t
.
T
h
us,
ZV
S
fl
y
b
a
c
k c
o
n
v
e
r
t
e
rs
have
re
d
u
ced
swi
t
c
hi
n
g
l
o
ss
es w
h
e
n
com
p
ared to c
o
nve
n
tional
flyback c
o
n
v
ert
e
r
s
. Thi
s
si
gni
fi
cant
l
y
im
prove
s
the pe
rform
a
nce and efficiency of
th
e circu
it.
It
is also
pro
m
in
en
t th
at
b
y
cou
p
li
ng th
e m
u
lti-o
u
t
pu
t ZVS flyb
ack
con
v
erter with
a vo
ltag
e
d
oub
ler, th
e po
wer
d
e
n
s
ity o
f
th
e conv
ert
e
r can
b
e
i
n
creased
. Also
, giv
e
n th
at the switch
i
ng
l
o
sses in
t
h
e
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
S
o
ft
S
w
itch
e
d
Mu
lti-Ou
tpu
t
Flyb
a
ck C
o
n
vert
e
r with
Vo
lta
ge Do
ub
ler
(D
eep
a
K)
40
2
active and pas
s
ive devices a
r
e negli
g
lble the efficiency
is
m
o
re th
an
d
oub
led
,
whe
n
com
p
ared to hard
swi
t
c
he
d co
nv
ert
e
rs. Si
m
u
l
a
ti
on was ca
rri
e
d
o
u
t
for
rat
e
d
3.5
W
o
u
t
p
ut
po
we
r and t
h
e
resul
t
s
obt
ai
n
e
d ar
e
anal
y
zed. T
h
e
har
d
ware
pr
ot
o
t
y
p
e was m
odel
e
d fo
r t
h
e sam
e
po
wer
rat
i
n
g
and t
h
e res
u
l
t
s
obt
ai
ne
d a
r
e si
m
i
l
a
r
to
th
o
s
e
ob
tained
in
sim
u
latio
n
s
. Thu
s
a m
u
lti-o
u
t
pu
t vo
ltag
e
dou
b
l
er t
o
po
log
y
o
c
cu
p
i
es th
e sam
e
sp
ac
e as
th
at o
f
th
e m
u
lti-o
u
t
pu
t flyback
co
nv
erters and
h
a
s b
e
tte
r efficien
cy also
.
Th
e
ou
tpu
t
o
f
th
e co
nv
erter is
regu
lated
fo
r li
n
e
an
d lo
ad
tran
sien
ts
with th
e PI co
nt
r
o
l
l
e
r
desi
g
n
ed
wi
t
h
a
si
m
p
le an
d lo
w cost laborato
r
y
pu
r
pose
IC
SG
35
2
5
.
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a
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h R
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T,
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a
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r
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[14]
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y
a
merin saju and
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y
a
kumar M, “High efficien
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[15]
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a
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y
a
kumar M, “Soft
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13,
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. 475
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[16]
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Vija
ya
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ar
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ctive
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a
m
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u
lti-outpu
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ac
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o
ltag
e
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”,
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.
[17]
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[18]
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[19]
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.
BIBLIOGRAPHIES
OF AUTHO
R
S
K. Deep
a
was
born in Tam
il Nadu. S
h
e receiv
e
d
M
.
E degree fro
m
College of Engineer
ing Anna
University
, Ch
ennai, Ind
i
a
in 20
05. She is pur
suing her PhD in the area of DC-
D
C Converters
from JNTU, An
antapur
, India.
Currently
she is
wo
rking as Assistant Professor in Ele
c
tri
c
a
l
&
Electronics Engineer
ing Dept.,
Amrita school of Engineer
ing,
Amrita Vishwa
Vid
y
apeeth
am
Univers
i
t
y
, B
a
n
g
alore
,
India
.
S
h
e has
16
y
e
ars
of
teach
ing exp
e
ri
ence
. S
h
e is
a M
e
m
b
er of IEEE
and a life Mem
b
er of IETE an
d ISTE, India
.
She has authore
d
2 textbooks on “
E
lectri
ca
l
Machines”
and “Control S
y
stems”. She has publishe
d 11 international journal pap
e
rs, 2 nation
a
l
journal pap
e
rs, 18 papers in international conf
erence and 6 pap
e
rs in national conference. 11
M.Tech Degr
ees were awarded
under her guidances.Her areas
of interests includ
e Power
electronics
and
Control Engineering
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
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088
-86
94
I
J
PED
S
Vo
l. 6,
No
.
2,
Ju
ne 20
15
:
396
–
4
03
4
03
H
r
id
y
a
Me
rin
Saju
was born in Kerala. She r
eceived M
.
Tech
degree from Amrita school of
Engineering, A
m
rita Vishwa Vi
d
y
ap
eetham Univ
ersity
, Bang
alo
r
e, India in 201
3. She obtained
her B.Tech
deg
r
ee from Amal J
y
othi College of
Engin
eering
,
Kanjir
apally
,
India in
2010.
Currentl
y
s
h
e
is
working as
an
As
s
i
s
t
ant P
r
ofes
s
o
r in Ele
c
tri
cal
and El
ectron
i
cs
Engine
ering
Dept, Colleg
e
of Engineer
ing
Adoor, Kerala, I
ndia. Her ar
eas of interests
include Power
Electronics and
Digital electroni
cs. She has published 1 international journ
a
l p
a
p
e
r and 1 p
a
per
in int
e
rna
tiona
l
c
onferenc
e
.
M. V
i
ja
ya
Ku
mar
gradu
a
ted
f
r
om S.V. Univer
sity
, Tirupa
thi,
A.P, India
in 19
88. He obtain
e
d
M.Tech d
e
gree
from Regional
Engineering Co
lleg
e
, Warang
al, India
in 1990
. He receiv
e
d
Doctoral degr
ee from
Jawaharlal
Nehru Techno
logical University
, H
y
d
e
rab
a
d,
India in 2000.
Currently
he is
working as Pr
ofessor in Elec
trical and Electr
onics
Engineering Department,
JNTU College o
f
Engine
ering
,
A
n
antapur
, A.P,
I
ndia. H
e
was the
Section M
a
nagi
ng Com
m
ittee
Member of ISTE AP Section fr
om 2009 to 2011.
He is the Ch
airman, UG Board of studies
(EEE) of JNTUniversit
y Anant
a
pur and m
e
m
b
er of Board of studies (EEE) for few other
Universiti
es in
A.P., Indi
a. He
has published 9
3
resear
ch pap
e
r
s
in nation
a
l
an
d inter-n
ation
a
l
conferen
ces and
journals.
Eight Ph.Ds and
79 M.Tech Deg
r
ees were award
e
d under his
guidanc
e. He re
ceiv
e
d two resea
r
ch awards from
the Institution o
f
Engineers (Ind
i
a). He served
as Director
, AICTE, New Delh
i f
o
r a short peri
od
. He was Head o
f
the Depar
t
ment during 2006
to 2008. He also
served as Founder Registrar
of JNT University
,
Anantapur durin
g 2008 to 2010.
As Registrar, he has also ac
ted
as Mem
b
er Convener
to Monitor
i
ng & Dev
e
lopm
ent Com
m
ittee
having Executiv
e Council Powers. He was Nati
onal Executiv
e
Council member of ISTE, New
Delhi during 20
03-2005. His areas of inter
e
sts in
clud
e Electr
i
cal Machin
es, Electr
i
cal Drives,
Microprocessors and Power
Electronics.
Evaluation Warning : The document was created with Spire.PDF for Python.