Int
ern
at
i
onal
Journ
al of
P
ower E
le
ctr
on
i
cs a
n
d
Drive
S
ystem
s
(
IJ
PEDS
)
Vo
l.
1
2
,
No.
2
,
Jun
202
1
,
pp.
870
~
885
IS
S
N:
20
88
-
8694
,
DOI: 10
.11
591/
ij
peds
.
v
1
2
.i
2
.
pp
870
-
885
870
Journ
al h
om
e
page
:
http:
//
ij
pe
ds
.i
aescore.c
om
Des
i
gn o
f a hig
h perfo
rmance AC
-
DC LE
D driver
based o
n
SEPIC t
opology
Fou
zi
a
Ferd
ous,
A.
B
. M.
H
arun
-
ur
-
R
as
h
id
Depa
rtment
o
f
E
le
c
tri
c
al a
nd
Ele
ct
roni
c
Eng
ineer
ing,
B
angl
ad
esh
Univer
sity
of
En
gine
er
ing
and
T
e
chnol
ogy,
Banglade
sh
Art
ic
le
In
f
o
ABSTR
A
CT
Art
ic
le
history:
Re
cei
ved
M
a
r 31,
2020
Re
vised Jan
15
, 2021
Accepte
d
Fe
b 1, 2
021
Li
ght
e
mi
t
ti
ng
d
iode
s
(
LE
Ds
)
ar
e
cur
ren
t
dr
ive
n
devi
c
es.
So,
it
is
essent
ia
l
to
ma
intain
the
st
a
bil
it
y
of
L
ED
v
olt
ag
e
and
cur
re
nt.
Var
ia
t
ion
of
te
mp
era
tur
e
ma
y
ca
us
e
of
in
stabi
litie
s
and
b
i
furc
ations
in
the
L
ED
dr
ive
r
.
Dr
ivi
ng
LE
Ds
from
an
offl
ine
power
source
fa
ce
s
design
ch
al
l
enge
s
l
ike
it
hav
e
to
maint
ain
low
har
mon
ic
s
i
n
input
cur
r
ent
,
t
o
ac
h
ie
v
e
high
p
ower
fa
ct
or,
hig
h
eff
i
cienc
y
and
to
maintain
consta
nt
L
ED
cu
rre
nt
and
to
ensure
long
li
f
et
i
me.
Thi
s
p
ape
r
proposes
the
t
ec
hniqu
e
of
h
arm
oni
cs
red
u
c
ti
on
by
using
par
am
e
tri
c
opti
mizat
ion
of
Single
ende
d
pr
i
ma
ry
induc
tor
c
onver
te
r
(SEPIC)
base
d
LE
D
drive
r.
W
it
hout
opti
mization
o
f
SEP
IC
par
amet
e
rs
input
en
erg
y
will
no
t
b
e
prope
rly
tr
ansfe
rre
d
to
the
lo
a
d
and
th
is
un
-
t
ran
sferre
d
en
er
gy
wil
l
b
e
tra
nsmit
te
d
to
th
e
sourc
e.
Conse
quent
ly
,
the
qua
li
ty
of
input
cur
ren
t
will
be
ham
per
ed
i.
e
.
ha
rmoni
cs
wi
ll
co
nta
mi
n
ate
th
e
in
put
cur
r
ent.
Foc
uss
ing
thi
s,
the
pap
er
has
pr
ese
nte
d
the
d
esi
gn
of
a
non
-
isol
at
ed
int
egr
ated
-
stage
sing
le
-
sw
it
ch
consta
nt
cur
ren
t
L
ED
dr
i
ver
op
era
t
ing
in
discontinuous
conduc
t
i
on
mode
(DCM
)
in
SEP
IC
inc
orpor
at
ing
the
design
of
con
trol
ci
r
cu
it
with
sof
t
start
mecha
n
ism.
Thi
s
LE
D
driv
er
h
as
ac
hi
eve
d
a
good
eff
icien
cy
(90
.
6%
)
and
high
-
power
fac
tor
(0.
98)
with
red
uc
ed
h
arm
oni
cs
(3.
35
%).
Sys
te
m
stabi
lity
h
as
be
en
d
et
er
mi
ned
and
simu
l
ation
studie
s
ar
e
p
e
rform
ed
to
conf
irm
th
e
vali
dit
y
of
the
L
ED
drive
r
circui
t.
A
la
bora
tory
p
rototype
is
bui
lt
to
ver
ify the
f
un
ct
ion
al
it
y
and
pe
rform
ance
of
th
e
proposed
L
ED d
rive
r.
Ke
yw
or
ds:
Harmo
nics
LED d
river
Op
ti
miza
ti
on
SEPI
C
Stabil
it
y
This
is an
open
acc
ess arti
cl
e
un
der
the
CC
BY
-
SA
l
ic
ense
.
Corres
pond
in
g
Aut
h
or
:
Fouzia
Fe
rdo
us
Dep
a
rteme
nt
of Elec
tric
al
and
Elec
tro
nic E
nginee
rin
g
Ba
ng
la
desh Un
iversity
of E
ngineerin
g
a
nd T
echnolo
gy
Dh
a
ka
-
12
05
,
B
ang
la
des
h
Emai
l:
f
fe
rdo
us91@
gm
ai
l.co
m
1.
INTROD
U
CTION
The
a
dvance
m
ent
of
li
ghti
ng
te
ch
nolo
gy
is
mo
stl
y
due
to
the
ad
ve
nt
of
hi
gh
-
lumi
nan
ce
li
ght
emit
ti
ng
diode
(
LE
D
)
.
I
n
ord
er
to
e
ns
ure
good
ex
plo
it
at
io
n
of
LE
Ds,
a
highly
ene
rgy
-
eff
ic
ie
nt
a
nd
r
el
ia
ble
LED
dr
i
ver
wi
th
co
ns
ta
nt
c
ur
ren
t
ou
t
pu
t
is
utterl
y
necessa
ry.
I
n
AC
-
DC
LED
a
ppli
cat
i
on
sy
ste
ms
in
put
AC
go
e
s th
rou
gh re
ct
ific
at
i
on
and
DC/DC c
onve
rsion acc
ordin
g
to
the l
oad
re
qu
i
reme
nts.
T
he
u
se
of s
om
e
ci
rcu
it
el
ements
li
ke
diodes,
MOSF
ET
are
the
c
au
se
of
e
xtre
me
deformat
ion
in
input
cu
rr
e
nt.
PFC
co
nverte
rs
are
require
d
i
n
AC
/DC
c
onversi
on
t
o
e
nsure
h
ig
h
powe
r
facto
r.
F
or
PFC
a
pp
li
cat
ion
s
some
c
ircuit
to
polo
gies
li
ke
boos
t,
buc
k
-
boos
t, S
EP
IC, a
nd C
uk are
im
m
ensely
us
e
d.
Cl
assic
LED
s
ys
te
ms
are
ba
sed
on
sin
gle
-
sta
ge
or
m
ulti
-
sta
ge
or
integ
rated
sta
ge
L
ED
dri
ve
rs.
Sing
le
sta
ge
si
ng
le
switc
h
A
C
-
DC
c
onve
rt
ers
a
re
more
a
ccepte
d
f
or
low
er
co
st
a
nd
s
iz
e.
But
outp
ut
volt
age
con
t
ro
l
a
nd
power
qual
it
y
ar
e
sacrifice
d
[
1]
relat
ive
t
o
t
wo
sta
ge
ap
proach.
T
he
t
wo
sta
ges
a
nd
m
ulti
pl
e
sta
ges
a
re
us
e
d
f
or
hi
gher
po
wer
le
vel
a
nd
mu
lt
iple
loa
d
c
onditi
ons
[2
],
[
3],
bu
t
in
smal
l
an
d
medi
um
powe
r
app
li
c
at
io
n
it
has
s
om
e
dr
a
w
backs
su
c
h
as
low
ef
fici
enc
y,
mu
lt
iple
co
ntr
ol
an
d
hi
gh
c
ost
.
A
lot
of
res
earch
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N:
20
88
-
8
694
Desig
n of
a hig
h perfor
m
an
ce
AC
-
DC
LE
D d
riv
er base
d on
SEP
IC to
po
l
ogy
(
F
ouzia Fe
rdou
s
)
871
works
has
bee
n
done
on
harmo
nic
reducti
on
a
nd
powe
r
fa
ct
or
co
rr
ect
io
ns
(
PFC)
in
LE
D
a
ppli
cat
ion
ov
e
r
t
he
la
st t
en
yea
rs [
4
]
-
[
7].
High
po
wer
fa
ct
or
an
d
lo
w
i
nput
-
c
urre
nt
ha
rm
on
ic
s
a
re
be
coming
the
m
and
at
ory
de
sig
n
crit
eria
f
or
switc
hing
po
w
er
s
upplies.
In
order
t
o
obta
in
hi
gh
PF
an
d
low
T
H
D,
a
fa
mil
y
of
si
ng
le
-
sta
ge
is
olate
d
PFC
cel
l
li
ke
bu
c
k,
boost
are
a
dv
a
nce
d
[
8
]
-
[
13].
T
hose
LE
D
dri
ve
rs
suffe
r
f
rom
volt
a
ge
sp
i
kes
arise
n
acr
os
s
the
switc
h,
high
c
omplexit
y,
an
d
zero
-
cr
os
si
ng
distor
ti
on
of
i
nput
cu
rrent.
LED
Dr
i
ver
i
n
ref
e
ren
ce
[
14
]
,
[
15]
su
f
fer
s
from l
ow e
ff
ic
ie
nc
y.
In
c
ompa
rison
to
va
rio
us
to
po
l
og
ie
s
,
the
SEPI
C
is
mor
e
sat
isfact
ory
so
luti
on
for
ac
hieving
high
powe
r
fact
or
i
n
lo
w
-
powe
r
L
ED
li
ghti
ng
a
ppli
cat
ion
.
J
ha
[
16]
proposes
a
LED
dr
i
ver
wi
th
good
powe
r
factor
and
go
od
t
otal
harmo
nic
dist
ort
ion
(T
HD)
w
it
h
co
ns
ta
nt
L
ED
c
urren
t.
Bu
t
com
plexity
of
the
dr
i
ver
dec
reases
eff
ic
ie
nc
y.
In
Hwu
[
17]
the
LED
dr
ive
r
is
capaci
tor
a
nd
i
nducto
r
le
ss
an
d
ha
rm
on
ic
s
a
r
e
re
duced
but
THD
i
s
no
t
go
od
e
nough.
In
LE
D
dri
ver
s
uch
as
bri
dg
el
ess
boos
t
c
onve
rter
with
s
ing
le
i
nducto
r
and
sin
gle
cap
aci
tor
as
in
Pa
nd
e
y
[
18]
ha
rm
on
ic
s
are
sat
isfact
ory
but
s
witc
hing
losses
a
re
hi
gher.
H
a
rm
on
ic
s
are
c
ompe
ns
at
ed
i
n
LED
d
ri
ver
i
n
Anwar
[
19]
but
comp
le
x
harmo
nic
co
mp
e
nsa
ti
on
un
it
is
a
dd
e
d.
Lo
w
pas
s
filt
er
is
instal
le
d
in
LED
dri
ve
r
in
Ka
rim
[20]
f
or
ha
rm
onic
mit
igati
on
but
the
obta
ined
ha
rm
on
ic
s
w
as
25.
3%.
Re
f
.
[
2
1]
com
pr
ise
s
of
t
he
met
hod
o
f
ha
rm
on
ic
i
nject
ion
w
her
e
thir
d
harmo
nics
r
ed
uction
is
not
s
o
good.
I
n
re
f.
[
22]
in
sing
le
sta
ge
P
FC
LED
dr
i
ve
r
the
LE
D
ou
tpu
t
is
not
co
ns
ta
nt
as
the
re
is
no
cl
ose
d
loop
co
ntr
ol
of
the
conve
rter.
On
the
oth
e
r
ha
nd
TH
D
re
du
ct
ion
pr
ocess
is
com
plex.
In
t
he
AC
L
ED
dr
ive
r
ha
rm
on
ic
com
pensat
ion i
s not sati
sfied
for l
ow
order ha
rm
on
ic
c
urre
nts [23].
This p
ape
r
pro
po
s
es
a
c
onsta
nt
cu
rr
e
nt
LE
D
dr
i
ver
b
ase
d
on
SE
PI
C w
here
harmo
nics
a
r
e
reduce
d
by
op
ti
miza
ti
on of S
EP
IC p
ara
m
et
ers.
The
S
EP
IC
is
ch
os
e
n
f
or PFC due
to
s
om
e
a
dv
a
ntage
s:
posit
ive
dc
outp
ut,
high
-
l
ow
ou
t
put
le
vel,
lo
w
s
witc
hing
stress
and
lo
w
ou
t
put
ripp
le
cu
rr
e
nt
.
SEP
IC
is
al
so
a
good
Power
Fact
or
Correct
or.
O
n
the
oth
e
r
hand
,
thou
gh
buck
conve
rter
ope
r
at
es
at
lower
DC
outp
ut
but
it
giv
es
po
or
powe
r
facto
r
an
d
buc
k
-
boos
t
operat
es
in
lo
we
r
a
nd
higher
DC
ou
t
pu
t
but
wit
h
neg
at
ive
pol
arit
y.
T
he
pro
po
s
ed
dr
i
ver
al
s
o
im
pro
ves
ef
fici
ency
a
nd
po
we
r
facto
r
an
d
i
t
do
es
no
t
ne
ed
ext
ra
co
m
pone
nt
f
or
ha
rm
on
ic
reducti
on.
A
c
omplet
e
co
ntr
ol
ci
rcu
it
ha
s
al
so
bee
n
desig
ne
d
in
fa
vour
of
re
du
ce
d
ha
rm
on
ic
s
with
s
of
t
sta
rt.
The
propose
d
const
ant
cu
rr
e
nt
LED
d
rive
r
op
e
rates
wit
h
sing
le
s
witc
h,
simple
co
ntr
ol
ci
rcu
it
with
r
edu
ce
d
com
plexity
a
nd
c
os
t.
T
he
pro
po
s
ed
ci
rc
uit
operates
in
10
0
kH
z
f
re
qu
e
nc
y
at
g
lo
bal v
olta
ge
ra
ng
e
o
f
90
-
270V,
so
it
ca
n be si
mp
ly
used
in d
iffer
e
nt
geogra
ph
ic
l
ocati
on.
This
pa
per
is
orga
nized
in
the
fo
ll
ow
i
ng
orde
r:
S
EPIC
P
FC
co
nverte
r
i
n
Sect
ion
2
,
Propose
d
LE
D
dr
i
ver
ci
rc
uit
in
3
,
H
arm
onic
re
duct
ion
by
SEP
IC
pa
ra
mete
r
opti
miza
ti
on
meth
odol
ogy
i
n
4
,
T
r
a
ns
fe
r
functi
on
an
d
f
eedb
ac
k
c
ontr
ol
in
5
,
Re
s
ul
ts
and
disc
us
s
ion
s
on
protot
yp
e
are
sta
te
d
in
Sect
io
n
6
an
d
con
cl
us
io
n
i
n Sect
ion
7
.
2.
SEPIC
PF
C
C
ONVERTE
R
Fo
r
a
n
in
put
volt
age
,
le
t
is
the
recti
fier
outpu
t
volt
age
a
nd
the
i
nd
ucto
r
current
1
and
2
flo
ws
th
rou
gh
inducto
r
1
and
2
resp
ect
ivel
y.
T
he
(
1)
-
(4)
are
ta
ken
from
Ru
i
[24]
t
o
der
i
ve
so
me
us
e
f
ul
relat
ion
s i
n DC
M
mode
(F
ig
ur
e 1)
.
Inp
ut volt
age,
=
,
So
acc
ordi
ng to
the
SE
PI
C
functi
on
al
it
y
1
=
2
.
The
t
otal i
nduc
tor
c
urre
nt.
(
)
=
1
(
)
+
2
(
)
(1)
The rel
at
ion
s
hi
p betwee
n vo
lt
age a
nd curre
nt
in
an
in
duct
ance is as
foll
ows,
1
(
)
=
1
(
)
So
,
the i
nducta
nce c
urren
t
cha
ng
e
s as.
(
)
=
1
(
)
1
+
2
(
)
2
(2)
(
)
=
1
+
2
1
2
1
(
)
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
Dr
i
S
ys
t
,
V
ol
.
12
, N
o.
2
,
J
une
202
1
:
870
–
885
872
Figure
1. Ba
sic
SEPIC
wit
h
L
ED
l
oad. In
pu
t
f
il
te
r
(
L
f
, C
f
)
is
conn
ect
e
d bef
or
e
the
br
i
dg
e
re
ct
ifie
r
f
ollow
e
d by
the SE
PI
C
The
wa
vefo
rm
s
of
gate
volt
age
dri
ving
s
witc
h
1
,
i
nduct
or
volt
ages
1
,
2
,
c
urren
t
fl
ow
i
ng
thr
ough
induct
ance,
1
(
)
,
2
(
)
,
dio
de
are
de
p
ic
te
d
in
Figure
2.
The
maxim
um
valu
e
of
in
duct
or
current
is give
n
as
:
=
(
)
=
1
+
2
1
2
(3)
Fr
om Fi
gure
2 t
he
ma
xim
um
value o
f dio
de c
urren
t
:
=
(4)
wh
e
re
=
1
2
1
+
2
an
d
is
the
duty
c
ycl
e.
Di
ode
c
onduct
ion
ti
me
is
dete
rmin
e
d
by
the
volt
-
s
e
c
balance.
=
1
=
(5)
2
is
the
off
ti
me
of
M
O
S
swit
ch.
F
or
operat
ing
in
DCM
>
(
+
)
,
wh
e
re
the
ON
ti
me
of
t
he
MOS
switc
h
1
a
nd
is
the
ti
me
pe
rio
d
of
one
s
witc
hing
cycle
.
Fi
gure
2
s
hows
t
he
volt
age
an
d
current at
dif
fe
ren
t
points
of the
dr
i
ver
.
Ave
r
age
of D
i
od
e
c
urren
t,
=
1
2
1
(6)
Pu
tt
ing t
he val
ues of
and
fro
m
(
4
)
to
(
6
)
.
=
1
2
(7)
Diode
cu
rr
e
nt
=
2
+
,
wh
e
re
is
t
he
ave
rag
e
ou
tpu
t
cu
rr
e
nt.
S
ince
avera
ge
of
2
=
0
,
we
get
aver
a
ge of
=
. S
o, the a
ve
rag
e
outp
ut curre
nt is
as.
=
1
2
(8)
If
t
he
a
ver
a
ge ou
t
pu
t c
urre
nt
flo
ws
th
r
ough
resist
or
.
Av
e
ra
ge ou
t
put current
=
,
Ou
t
pu
t
volt
age
:
=
1
2
,
(9)
and d
i
od
e
con
duct
ion t
ime
=
2
.
(10)
V
i
n
L
1
C
1
M
1
L
2
C
2
L
f
D
i
o
d
e
L
E
D
S
t
r
i
n
g
B
r
i
d
g
e
R
e
c
t
i
f
i
e
r
I
V
g
I
C
f
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N:
20
88
-
8
694
Desig
n of
a hig
h perfor
m
an
ce
AC
-
DC
LE
D d
riv
er base
d on
SEP
IC to
po
l
ogy
(
F
ouzia Fe
rdou
s
)
873
The
n
the
duty
cycle ca
n be s
pe
ci
fied.
=
√
2
(11)
1
=
√
2
(12)
Both
MOSFE
T
and
Diode
Off
-
ti
me.
2
=
(
1
−
−
1
)
(13)
Figure
2. Wa
ve
form o
f gate
pulse
,
ind
uct
or
volt
age
1
,
2
,
inducto
r
curre
nt
1
,
2
and
di
od
e
curre
nt
If
we
a
ssume t
he powe
r
c
onve
rsion e
ff
ic
ie
nc
y
is
100%
, so
input p
ower
equals t
he
outp
ut
powe
r.
=
(
)
=
Hen
ce
,
(
)
=
By
pu
tt
in
g
the
values
of
an
d
we get
.
(
)
=
(
1
2
)
2
(14)
The
(
14)
sho
w
s
that
i
n
SEP
I
C
DC
M
i
nput
current
f
ollo
ws
in
pu
t
volt
age
and
it
is
possib
le
to
ac
hieve
un
it
y
po
wer
f
act
or
.
H
ow
e
ve
r,
as
disc
us
se
d
earli
er
,
f
or
br
i
dg
e
recti
fie
r
di
od
e
in
pu
t
current
wa
ve
sh
a
pe
becomes
disto
r
te
d
a
nd
ha
rm
onic
s
is
c
onta
mi
nated
in
t
he
i
np
ut
cu
rr
e
nt.
So,
ha
rm
onic
s
re
du
ct
io
n
is
esse
ntial
to
achieve
hi
gh pow
e
r fact
or.
3.
PROP
OSE
D L
ED DRI
VE
R CIRC
UIT
The
LE
D
dr
i
ve
r
ci
rc
uit
con
si
sts
of
si
ng
le
-
phase
ac
vo
lt
ag
e
source,
in
duct
or
,
ca
pacit
or,
diode,
MO
S
switc
h
an
d
LE
D
m
odule.
T
he
sc
hemati
c
dia
gr
a
m
of
LED
dr
i
ver
ci
rc
uit
is
sh
ow
n
in
Fig
ur
e
3.
Co
ntr
ol
ci
rcu
it
desig
n
,
the
c
ontr
ol
ci
rc
uit
c
onsist
s
of
tw
o
c
losed
lo
ops
co
ntr
ol
un
it
s
-
ou
t
er
ci
r
cuit
c
ontr
ols
outp
ut
c
urr
ent
by
S
w
i
t
c
h
i
n
g
C
y
c
l
e
,
T
t
I
D
D
T
D
1
T
D
2
T
0
0
I
L
2
0
I
L
1
t
t
V
L
2
V
g
t
t
-
V
0
0
V
g
-
V
0
V
L
1
t
G
a
t
e
p
u
l
s
e
V
p
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
Dr
i
S
ys
t
,
V
ol
.
12
, N
o.
2
,
J
une
202
1
:
870
–
885
874
regulat
ing
the
ou
t
pu
t
volt
age
an
d
i
nn
e
r
ci
r
cuit
co
ntr
ols
i
nput
c
urre
nt
to
im
pro
ve
po
wer
fact
or
.
O
ut
ermo
st
cl
os
ed
lo
op
rea
li
zes
the
cu
rr
e
nt
t
hroug
h
the
LED
m
odule
a
nd
kee
ps
it
co
ns
ta
nt.
T
his
cu
rr
e
nt
is
se
ns
e
d
with
a
resist
or
a
nd
the
correspo
nd
i
ng
sense
d
volt
age
is
comp
a
re
d
w
it
h
a
fixed
r
efe
ren
ce dc
volt
ag
e
in
a
vo
lt
age
e
rror
amplifie
r
.
V
oltage
er
ror
am
plifie
r
is
an
inte
grat
or
an
d
gen
e
r
at
es
an
erro
r
sign
al
.
T
he
c
urre
nt
ge
ner
at
e
d
from
it
is
passed
t
hro
ugh
the
c
urre
nt
err
or
am
plifie
r
as
it
s
ref
ere
nce
cu
rr
e
nt.
C
urren
t
er
r
or
a
mp
li
fier
is
s
hown
i
n
Figure
4
(a
).
The
i
nduct
or
c
urren
t
(
)
is
sens
ed
a
nd
c
ompar
ed
with
t
he
re
fer
e
nce.
Cu
rr
e
nt
er
r
or
am
plif
ie
r
perform
s
pro
portio
nal
a
nd
integ
ral
functi
on
(PI
co
ntr
ol).
It
a
ddresses
t
he
slo
w
res
po
ns
e
of
volt
age
er
r
or
amplifie
r
. I
t e
nsures
stable
op
erati
on and
ma
kes
c
ompe
ns
at
ion easi
er.
v
in
L
1
C
1
M
1
L
2
C
2
Lf
D
i
o
d
e
L
E
D
S
t
r
i
n
g
C
u
r
r
e
n
t
Er
r
o
r
A
m
p
l
i
fi
e
r
R
e
fe
r
e
n
c
e
C
u
r
r
e
n
t
G
e
n
e
r
a
ti
o
n
(
M
u
l
ti
p
l
i
e
r
)
V
o
l
ta
g
e
Er
r
o
r
A
m
p
l
i
fi
e
r
P
WM
G
e
n
e
r
a
ti
o
n
V
r
e
f
IL
B
r
i
d
g
e
R
e
c
t
i
f
i
e
r
I
V
g
I
P
W
M
P
U
L
S
E
S
e
n
s
e
d
V
o
l
t
a
g
e
S
EP
I
C
C
O
N
V
ER
T
ER
V
p
*
I
Vg
I
S
o
ft
-
S
ta
r
t
C
i
r
c
u
i
t
Cf
I
e
r
r
or
1
I
e
r
r
or
2
V
c
on
tr
ol
Figure
3. SEP
I
C C
ircuit
. T
he ou
te
r
ci
rc
uit ke
eps
outp
ut curr
ent consta
nt and inne
r
ci
rc
uit
con
t
ro
ls i
nput
current a
nd im
pro
ves powe
r
f
act
or
a
nd T
HD
Gain o
f
the
Cu
rr
e
nt erro
r
a
mpl
ifie
r
(Com
pensat
or)
(
)
=
−
(
)
(
)
.
(
)
=
3
,
(
)
=
(
4
+
1
1
)
∥
1
2
(
)
=
−
1
3
2
(
+
1
4
2
)
(
+
1
+
2
3
1
2
)
Pr
op
or
ti
onal
Gain
=
4
3
and
I
nt
egr
al
Gai
n
=
1
3
1
.
If
increases
rise
-
ti
me
de
creases,
ov
e
rs
hoot
inc
r
eases
an
d
ov
e
r
sh
oot
e
rror
de
creases.
If
increases
rise
-
ti
m
e
decr
ea
ses,
overs
hoot
i
ncr
e
ases,
set
tl
ing
ti
me increases,
el
i
min
at
es stea
dy
stat
e error
. Fi
rst th
e p
ara
mete
rs o
f
the compe
ns
a
tor
are
opti
mize
d
by
the
sim
ulati
on
of
L
ED
dri
ve
r
(
M
ai
n
ci
rc
ui
t
+co
ntro
l
ci
rc
uit).
B
y
us
i
ng
the
ci
rcu
it
pa
rameter,
the
tr
ansf
e
r
functi
on
ha
s
be
en
determi
ne
d.
T
he
fo
ll
owi
ng
ste
ps
a
re
t
aken
to
c
hoose
gain
i
n
or
de
r
to
get
the
de
sired
respo
ns
e,
i)
obta
inin
g
the
open
l
oop
respon
s
e
an
d
de
te
rmin
e
w
hat
ne
eds
to
be
i
mpro
ve
d,
ii
)
add
i
ng
pro
portion
al
c
on
t
ro
l
t
o
im
prov
e
rise
ti
me,
ii
i)
add
i
ng
inte
gr
al
c
ontrol
t
o
el
imi
nate
the
s
te
ady
sta
te
e
rror
a
nd,
iv)
ad
j
us
tme
nt
an
d
by
ch
ang
i
ng
ci
rc
uit
pa
ramete
rs
unti
l
obta
inin
g
a
de
sire
d
over
al
l
res
pons
e.
I
f
sta
bili
ty
is
ba
d
an
d
gain
is
ne
eded
to
c
ha
ng
e
to
meet
sta
bili
ty
crit
erio
n
t
he
ab
ov
e
pro
ced
ur
e
will
be
re
pe
at
ed.
Finall
y,
the
sta
bili
ty
ha
s
bee
n
determi
ned
by
(i)
ste
p
res
ponse
a
nd
(ii)
r
oot
-
loc
us
meth
od
exp
la
ine
d
in
S
ect
io
n
5.
In
DCM
t
hough
powe
r
fact
or
is
hi
gh,
the
input
curre
nt
harmo
nics
is
hi
gh
.
B
rid
ge
re
ct
ifie
r
dr
a
ws
distor
te
d
cu
rr
e
nt
from
i
nput
AC
an
d
caus
e
s
high
TH
D,
very
lo
w
PF
a
nd
very
lo
w
e
ff
ic
ie
nc
y
to
th
e
LE
D
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N:
20
88
-
8
694
Desig
n of
a hig
h perfor
m
an
ce
AC
-
DC
LE
D d
riv
er base
d on
SEP
IC to
po
l
ogy
(
F
ouzia Fe
rdou
s
)
875
modu
le
.
I
n
or
der
to
re
du
c
e
ha
rm
on
ic
s
in
the
i
nput
c
ur
ren
t,
m
ulti
plier
is
us
e
d
i
n
t
he
c
ontrol
ci
r
cuit.
It
el
imi
nates
the
distor
ti
on
in
i
nput
c
urren
t
wa
ve
sh
a
pe
by
m
ulti
ply
in
g
the
outp
ut
of
cu
rr
e
nt
err
or
am
plifie
r
with
rep
li
ca
of
the
i
nput
ac
vo
l
ta
ge
.
T
he
outp
ut
s
ign
al
of
m
ulti
pl
ie
r
is
natur
al
ly
sync
hro
nized
and
s
ym
met
ric
to
t
he
input
AC
volt
age,
w
hich
is
th
e
co
nd
it
io
n
t
o
achieve
unit
y
powe
r
fact
or
w
it
h
re
du
ce
d
ha
r
monics.
T
he
n
PWM
pu
lse
s
a
re
ge
ne
rated
by
co
m
par
i
ng
a
saw
-
t
oo
t
h
wa
ve
with
t
he
ref
e
re
n
c
e
pr
oduce
d
by
the
m
ulti
plier.
T
he
detai
ls
co
ntr
ol
ci
rcu
it
is
sho
w
n
i
n
Fig
ur
e
4
(
b).
T
he
f
unct
io
n
of
t
he
s
oft
st
art
ci
rc
uit
is
t
o
pre
ven
t
sud
de
n
rise
of
i
nput
cu
rr
e
nt
and
overs
hoot
of
vo
lt
ag
e
in
the
sta
rtin
g
pe
r
iod
to
preve
nt
dama
ge.
Pu
lse
thinn
i
ng
mec
ha
ni
sm
is
us
e
d
t
o
rem
ov
e
s
om
e
puls
es
f
rom
a
cl
oc
k
pulse
a
nd
ge
ner
at
es
thin
pulse
.
I
n
t
he
soft
sta
rt
ci
rc
uit,
c
loc
k
pu
lse
is
ge
nerat
ed
by
us
in
g
A
sta
ble
mu
lt
ivib
rator.
The
ou
t
pu
t
of
the
mu
lt
ivib
rato
r
i
s
cl
am
ped
to
get
on
l
y
po
sit
ive
pulse
.
Cl
k2
is
obta
ined
f
rom
cl
oc
k
pu
lse
ge
nerat
or
a
fter
rem
ov
i
ng
some
pulse
s’
wa
veform
i
s
gen
e
rated
f
rom
co
ntr
ol
ci
rc
uit.
Cl
k2
a
nd
P
W
M
a
re
t
he
i
nput
s
of
AND
gate
an
d
t
hinner
pu
lse
is
obta
ine
d
from
the
outp
ut.
T
hi
s
thinn
e
r
pu
ls
e
is
fed
directl
y
to
t
he
M
O
S
FET
th
rou
gh
M
U
X
at
th
e
onset
o
f
sta
rtin
g.
T
he
sel
ect
or
of
2
-
1
MU
X
determ
ines
sta
rtin
g
pe
rio
d
a
nd
no
r
mal
operati
on.
I
n
normal
op
erati
on
re
gula
r
PWM
pu
lse
s
are
f
e
d
t
o
the
M
O
S
gate.
It
is
t
o
be
not
ed
t
hat
al
l
wa
ve
f
or
m
s
requi
red
in
the
dr
iv
er
is
ge
ne
rated
inter
nally
an
d
no
exte
rn
al
so
urc
e
is
needed
i
n
th
e
dr
i
ve
ci
rcu
it
.
I
n
t
he
desig
ne
d
LE
D
dr
i
ver
,
the
vo
lt
age
e
rror
am
pl
ifie
r
us
es
sin
gle
O
p
-
amp
f
or
both
c
omparis
on
an
d
amplific
at
io
n
pur
po
ses
.
Simi
la
rly,
t
he
c
urre
nt
er
ror
a
mp
li
f
ie
r
us
e
s
a
sin
gle
O
p
-
amp
for
c
omp
ariso
n
an
d
P
I
con
t
ro
ll
in
g
pu
r
po
s
es.
T
he
f
un
ct
ion
of
sa
wtooth
wav
e
is
obta
ined
f
rom
s
qu
a
re
wav
e
gen
e
rato
r
by
us
in
g
si
ngle
Op
-
A
mp
only.
T
hus,
t
he
num
ber
of
co
mpon
e
nts
i
n
t
he
c
ontrol
ci
rc
uit
is
reduce
d.
T
he
ov
e
rall
c
on
t
ro
l
ci
rc
uit
is
us
e
d
t
o
imp
r
ov
e
t
he
ste
p
re
spo
nse
a
nd
i
ncr
eas
e
the
sta
bi
li
ty
of
the
ci
rcu
it
. I
t
also
plays
the
ro
le
in red
ucin
g
T
H
D
a
nd imp
r
ov
i
ng po
wer facto
r.
(a)
3
.
9
K
R
3
27
k
0
.
1
n
.
12
n
V
r
e
f
I
L
V
g
A
C
B
V
o
l
t
a
g
e
E
r
r
o
r
A
m
p
l
i
f
i
e
r
C
u
r
r
e
n
t
E
r
r
o
r
A
m
p
l
i
f
i
e
r
M
u
l
t
i
p
l
i
e
r
P
WM
G
e
n
e
r
a
t
o
r
0
.
1
n
22
K
10
K
10
K
V
S
e
n
s
e
MO
S
F
E
T
D
r
i
v
e
r
V
e
r
r
or
1
V
e
rro
r
2
V
c
o
n
t
ro
l
V
s
a
w
t
o
o
t
h
S
a
w
t
o
o
t
h
Wa
v
e
G
e
n
e
r
a
t
o
r
2
/
1
M
U
X
R
e
f
e
r
e
n
c
e
P
WM
S
o
ft
S
ta
r
t
C
i
r
c
u
i
t
T
h
i
n
P
u
l
s
e
0
.
1
u
C
40
k
10
k
0
.
1
u
PWM
C
l
oc
k
G
e
n
e
r
at
i
on
an
d
R
e
m
ova
l
of
s
om
e
p
u
l
s
e
s
C
l
k
2
IC
74157
AD
633
ic
741
ic
7408
ic
741
lm
324
lm
324
10
n
lm
324
(b)
Figure
4. (a
)
c
urren
t e
rro
r
am
plifie
r (PI co
nt
ro
ll
er
),
(b)
t
he deta
il
s contr
ol
ci
rcu
it
w
it
h s
oft
start
4.
HARM
ONIC
S R
E
DUCTI
ON
B
Y
SE
PI
C
P
ARA
METE
R
OPTI
MIZ
ATIO
N MET
HODOL
OG
Y
LEDs
a
re
a
no
nlinear
l
oa
d
th
at
gen
e
rates
ha
rm
on
ic
s.
LE
D
dr
i
ver
delive
rs
co
ns
ta
nt
c
urre
nt
to
L
ED
la
mp
.
I
n
orde
r
to
get
desire
d
DC
outp
ut
f
r
om
AC
i
nput
a
f
ull
bri
dge
r
ect
ifie
r
is
us
ed
be
fore
SEP
IC.
T
hese
diode
recti
fier
s
ca
us
e
highly
dist
or
te
d
in
put
c
urren
t
a
nd
ge
ne
rates
harmo
nicist
of
th
e
in
pu
t
cu
rren
t
is
a
n
importa
nt
factor
i
n
LE
D
dri
ve
r
an
d
it
sho
uld
be
ke
pt
as
lo
w
as
po
ssi
ble.
Lo
wer
T
H
D
in
LE
D
dr
i
ver
e
ns
ure
s
higher
P
ow
e
r Fac
tor
, lower
pea
k
c
urren
ts
and
higher
ef
fici
ency.
We
know that
for
a
sin
us
oi
da
l so
ur
ce a
nd
nonlinear
loa
d
=
(
)
×
(
)
.
=
×
=
×
1
/
(15)
1
is t
he
RMS va
lue of in
pu
t c
urre
nt of funda
mental
f
re
que
nc
y
an
d
is t
he
RMS val
ue of t
otal
com
pone
nt
of
input
cu
rr
e
nt
f
reque
ncy.
Acc
ordin
g
to
(
14)
for
the
LE
D
dr
i
ver
operati
ng
in
disc
on
ti
nuou
s
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
Dr
i
S
ys
t
,
V
ol
.
12
, N
o.
2
,
J
une
202
1
:
870
–
885
876
mode,
=
=
1
But
i
n
pr
act
ic
al
ci
rc
uit
du
e
to
bri
dge
recti
fier
a
nd
M
O
S
s
witc
h
unit
y
powe
r
fac
to
r
cannot
be
ac
hi
eved. S
o, co
ntr
ol circ
uit i
s r
e
quire
d
to
imp
r
ove the
po
wer f
act
or
.
No
w,
.
=
=
1
=
1
√
1
+
2
(16)
The
(16
)
if
t
he
RMS
val
ue
of
i
nput
c
urre
nt
of
fun
dame
ntal
fr
e
quenc
y
is
highe
r,
distor
ti
on
facto
r
be
comes
higher
and T
H
D beco
mes l
ower
. T
heoreti
cal
ly,
if
=
0
, dist
or
ti
on
factor wil
l
b
e
1
a
s fr
om
(
16), an
d
1
=
(17)
This
is
possi
ble
only
wh
e
n
the
c
onve
rter
pa
rameters
ar
e
op
ti
mize
d
t
o
make
in
pu
t
cu
rr
e
nt
distor
ti
on
to
ze
r
o
and to
make
th
e input c
urren
t
in phase
w
it
h i
nput
vo
lt
ag
e to
imp
os
e t
he
c
ir
cuit be
hav
i
or a
s a r
e
sist
ive loa
d.
But
pract
ic
al
ly
in
order
to
re
du
ce
ha
rm
onic
s
in
t
he
in
put
current
t
he
i
nput
in
du
ct
a
nce
(
1
)
,
ou
t
put
inducta
nce
(
2
)
an
d
in
put
ca
pacit
ance
(
1
)
are
re
qu
ired
t
o
be
opti
mize
d
[
25]
.
Ou
t
pu
t
capaci
t
or
(
2
)
is
require
d
to
op
ti
miz
e
to
re
duce
out
pu
t
volt
age
an
d
cu
rr
e
nt
rip
ple.
This
ha
rm
onic
c
ompe
ns
at
io
n
a
nd
powe
r
factor
imp
r
ovement
ca
n
be
done
by
op
ti
mizi
ng
SEP
IC
par
a
mete
rs
by
the
f
ollow
i
ng
meth
odol
ogy
f
or
nonlinea
r
loa
d LEDs
alo
ng w
i
th pr
op
e
rly des
ign
e
d feed
bac
k ci
rcu
it
.
4.1.
SEPIC
pa
r
am
eter
op
timi
z
ati
on
me
thod
ology
Harmo
nics
ari
ses
in
the
in
pu
t
cur
re
nt
f
or
bri
dge
recti
fier
diode,
s
witc
h,
and
nonlinea
rity
of
LE
Ds.
The
facto
rs
t
ha
t
eff
ect
on
ha
rm
on
ic
s
i
n
t
he
input
c
urre
nt
are
the
val
ue
of
in
du
ct
or
1
,
ca
pacit
or
1
,
e
nergy
trans
fer
betwee
n
ca
pacit
or
1
an
d
in
duct
or
2
. Ou
tpu
t c
urren
t
rip
ple d
e
pe
nds
on the
filt
er cap
a
ci
tor
2
.
4.1.1.
THD re
duct
i
on
a.
Fix
ing
t
he
v
alue
o
f i
np
ut In
duct
or
1
The rel
at
ion
s
hi
p betwee
n
in
pu
t i
nducto
r
1
and input
rip
ple cur
ren
t
△
1
.
1
=
.
△
1
.
; w
her
e
switc
hin
g fr
e
quenc
y
(18)
Inp
ut
induct
or
current
rip
ple
△
1
can
be
re
duced
by
usi
ng
gr
eat
er
val
ue
of
1
,
ot
herwise
harmo
nics
will
be
high.
b.
Fix
ing
of
ou
t
put i
nduct
or
The
vo
lt
age
c
onve
rsion
rati
o
M
can
be
obta
ined
by
ap
ply
in
g
the
Power
-
bala
nce
pri
nciple
[
26]:
=
√
2
=
1
√
2
w
her
e
c
onduc
ti
on
par
a
mete
r
=
2
;
her
e
is
the
eq
uiv
al
ent
i
nduct
ance
of
1
an
d
2
in p
a
rall
el
and
is t
he dynamic
resist
ance
of L
ED
l
oad,
F
or
DCM o
perat
io
n,
1
<
1
−
Th
us
, t
he value
of
−
can
be
e
valuated
[
28] by
:
<
−
=
1
2
(
+
2
)
2
(19)
Fo
r
D
C
M
oper
at
ion
shou
l
d be
=
0
.
85
−
.
Th
us
, b
y
e
valu
at
ing
an
eq
ui
valent in
du
ct
a
nce
is o
btained
as
(
20).
=
2
(20)
The val
ue
of
2
can
be
e
xpresse
d
as
(21).
2
=
2
1
1
−
(21)
c.
Fix
ing
Inp
ut c
apacitor
1
has
a sig
nifica
nt inf
l
uen
ce i
n t
he
input cu
rr
e
nt w
a
ve
sh
a
pi
ng. T
he
va
lue
of
1
[27]
will
b
e suc
h
that
<
<
, whe
re
,
li
ne
cu
rr
e
nt and
res
onance
fr
e
qu
e
nc
y res
pecti
vely
.
=
1
2
√
1
(
1
+
2
)
(22)
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N:
20
88
-
8
694
Desig
n of
a hig
h perfor
m
an
ce
AC
-
DC
LE
D d
riv
er base
d on
SEP
IC to
po
l
ogy
(
F
ouzia Fe
rdou
s
)
877
1
,
2
and
1
shou
l
d
be
op
ti
mize
d
for
THD
reducti
on.
Without
opt
imi
zat
ion
ha
r
monics
in
the
input
cu
rr
e
nt
becomes
high.
The
sim
ulate
d
plo
t
i
n
Fig
ure
5
(a).
is
obta
ined
without
op
ti
miza
ti
on
of
1
but
1
a
nd
2
op
ti
mize
d
.
He
re
1
=
0
.
05
,
1
=
10
2
=
36
.
24
.
It
s
ho
ws
.
.
=
0.76,
=
64
.
89%
a
nd
hen
ce
P.F
.
a
nd
T
HD
a
re
not
sat
isfact
ory.
It
is
f
ound
that
t
he
e
f
fect
of
1
is
domi
natin
g
i
n
the
in
put
c
urr
ent
THD.
Af
te
r
opti
miza
ti
on
of
1
,
TH
D
is
sign
i
ficantl
y
r
edu
ce
d
but
sti
ll
high
wh
ic
h
is
show
n
i
n
Fi
gure
5
(
b).
In
this
simula
ti
on
1
is
no
t
opti
mize
d
but
1
2
are
op
ti
mize
d.
1
has
le
ss
in
f
luence
in
ha
r
monic
minimi
zat
ion
than
1
.
Her
e
,
1
=
5
.
0
,
2
=
36
.
24
H,
1
=
0
.
01
a
nd
we
o
btai
ne
d
.
.
=
0
.
885
,
=
24
.
58%
.
Ca
pacit
or
1
is
fun
dame
ntal
in
obta
inin
g
a
high
-
qual
it
y
in
pu
t
c
urren
t
.
2
has
com
par
at
ivel
y
le
ss
eff
ect
on
TH
D
.
W
it
hout
opti
miza
ti
on
of
2
a
nd
1
,
t
he
e
ne
rgy
of
2
will
not
be
pro
pe
rly
tra
nsfer
red
to
the
load
a
nd
t
his
un
-
tra
ns
fe
rr
e
d
ene
r
gy
will
be
tra
ns
mit
te
d
to
the
sour
ce,
as
a
res
ul
t
har
m
onic
w
il
l
be
con
ta
mi
nated
i
n
the
i
nput
c
urren
t.
A
gain,
cu
rr
e
nt
rip
ple
of
input
in
du
ct
or
(
1
)
al
so
ef
fect
the
TH
D
a
nd
it
ca
n
be
r
ed
uce
d
by
increasin
g
1
as
discusse
d
be
f
ore.
By
us
i
ng
th
e
(
18),
(
21),
(22)
1
,
2
1
are
opti
mize
d
as
1
=
10
,
2
=
36
.
24
an
d
1
=
0
.
01
.Simu
la
te
d
ou
t
pu
t
of
t
he
opti
mize
d
res
ult
is
s
how
n
in
Fig
ur
e
5
(c)
.
A
fter
opti
miza
ti
on
we o
btained
.
.
=
0
.
98
and
=
3
.
7%
.
T
he results a
re sa
ti
sfactory.
(a)
(b)
(c)
Figure
5
.
(a
)
Si
mu
la
te
d pl
ot of
input
vo
lt
a
ge,
input cu
rr
e
nt
w
it
ho
ut
opti
miza
ti
on
. He
re,
po
wer facto
r
=
0
.
76
,
64
.
89%
wh
e
n
1
10
,
2
=
36.24
,
1
=
0
.
05
.
(
b)
Simulat
io
n of
i
nput
vo
lt
ag
e, i
nput
current
with
P
F= 0.8
85 a
nd
THD =
24.
58% whe
n
1
=
5
.
0
,
2
=
36
.
24
H
a
nd
1
=
0
.
01
.
(c)
Simulat
io
n of
i
nput
vo
lt
ag
e a
nd in
pu
t c
urre
nt
w
he
n
1
,
2
an
d
1
are
op
ti
mize
d
a
nd
we ob
ta
ine
d
.
.
=
0
.
98
and
=
3
.
7%
wh
e
n
1
=
10
,
2
=
36
.
24
H
a
nd
1
=
0
.
01
.
4.1.2.
Redu
c
tio
n
of
ou
t
pu
t vo
lt
age
a
n
d curre
nt r
ippl
e
Fixin
g
ou
t
pu
t
capaci
tor
C
2
,
accor
ding
t
o
the
(
23)
relat
ion
s
hi
p
,
2
can
be
obta
ined
f
or
the
de
sired
rip
ple v
al
ue of
ou
t
pu
t
volt
age
(
)
.
2
≥
2
(23)
If
ca
pacit
or c
urren
t i
s
an
d
ca
pa
ci
tor vo
lt
age
ri
pp
le
is
∆
then
∆
=
1
2
∫
(24)
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
Dr
i
S
ys
t
,
V
ol
.
12
, N
o.
2
,
J
une
202
1
:
870
–
885
878
By
pr
op
e
r
c
ho
i
ce
of
2
ou
t
pu
t v
oltage
a
nd
cu
rrent
rip
ple
ca
n
be
ma
de
l
ow
a
s
re
qu
ire
d
fro
m
(
24).
F
or
high
f
re
qu
e
nc
y
cap
aci
ti
ve
impe
dan
ce
(
=
1
2
)
is
low,
so
t
he
AC
pa
rt
will
flo
w
th
rou
gh
the
outp
ut
capaci
tor
.
A
ri
pp
le
volt
age
is
pro
du
ce
d
at
t
he
ou
t
pu
t.
Thi
s
rip
ple
of
outpu
t
volt
age
ne
eds
to
be
suffi
ci
ently
low
s
o
a
s
ou
t
put
cu
rr
e
nt
do
e
s
not
flic
ke
r.
From
t
he
(23)
an
d
(
24)
,
the
la
r
ge
the
ca
pacit
or,
the
bette
r
it
re
du
ce
s
the
rip
ple.
T
he
simulat
ion
of
ou
t
pu
t
volt
ag
e
and
c
urre
nt
befor
e
a
n
d
aft
er
opti
miza
ti
on
of
2
are
sh
own
i
n
Figure
6
.
Af
te
r
opti
miza
ti
on
LED
volt
age
and
cu
rr
e
nt
be
comes
sm
oo
t
he
r.
T
hus,
a
hi
gh
-
performa
nc
e
LED
dr
i
ver
c
an
be
desig
ne
d
by
opti
miza
ti
on
of
SEPI
C
pa
rame
te
rs
al
ong
with
a
well
-
desig
ned
fee
dback
con
t
ro
l
ci
rcu
it
.
Tab
le
1
s
hows
the
sim
ulate
d
data
of
opti
miza
ti
on
of
SEPI
C
pa
ram
et
ers
(
2
,
1
)
,
fo
r
harmo
nic
reducti
on.
Fro
m
the
data
i
n
Table
1
an
d
si
mu
la
ti
on
res
ult,
it
is
f
ound
t
ha
t
the
i
nput
ca
pacit
or
1
pla
ys
the
main
ro
le
of
t
r
ansf
e
rr
i
ng
e
nergy
f
r
om
i
nput
port
to
ou
t
pu
t
port
a
nd
via
outp
ut
in
duct
or
2
.
1
must
be
a
lo
w
value
d
ca
pacit
ance.
T
he
e
ne
r
gy of
2
and
1
m
ust
b
e
reim
burse
ment to
e
ach
ot
her.
I
nput c
urr
ent r
ip
ple mai
nl
y
dep
e
nds
on
I
nduct
or
1
s
o
it
al
so
pla
ys
a
vital
r
ole
i
n
ha
r
monics
re
du
ct
i
on.
2
is
filt
er
ca
pacit
or
a
nd
it
smooths
the
ou
tpu
t.
The
total
powe
r
l
os
s
s
how
n
i
n
simulat
io
n
is
6
.
2%
,
Ef
fici
enc
y
is
93
.
78%
,
T
HD
3
.
7%
at
220V.
T
he
Simulat
ed
Power
l
os
ses
a
re
sh
ow
n
c
omponent
wise
in
F
igure
7
.
Her
e
Divid
e
r
is
t
he
resist
ance
us
e
d
to
ta
ke
rep
li
ca
of
in
put
vo
lt
age
to
t
he
M
ulti
plier
a
nd
R
-
di
od
e
a
nd
S
-
diode
denote
recti
fier
dio
de
a
nd
SEP
I
C
dio
de
resp
ect
ivel
y.
It
is
seen
that
t
he
la
r
gest
po
wer
l
os
s
occur
s
in
M
O
S
S
w
it
ch
(
2%
)
,
sli
gh
tl
y
a
bove
1%
is
in
div
ide
r
resist
a
nce,
bel
ow
1%
in
recti
fier
diod
e
an
d
the
n
i
n
SEPI
C
di
ode
and
le
ast
pow
er
l
os
s
occ
urs
f
or
biasin
g.
(
a
)
(
b
)
Figure
6.
(
a
).
S
imulat
ion o
f o
utput v
oltage
,
ou
t
pu
t c
urre
nt
wh
e
n
1
=
10
,
2
=
36
.
24
and
1
=
0
.
01
(
b
) wit
hout
op
ti
miza
ti
on
of
2
(
wh
e
n
2
=
1
)
an
d (ii
) a
fter
op
ti
miza
ti
on
of
2
(whe
n
2
=
3
)
Table1
. Optimi
zat
ion
of SEP
I
C par
a
mete
rs f
or h
a
rm
on
ic
re
du
ct
io
n
Inp
u
t
Ind
u
cto
r
1
(
)
Ou
tp
u
t ind
u
cto
r
2
(
H)
Inp
u
t Cap
acito
r
1
(
F)
THD
(%)
Po
wer
Fa
cto
r
Ef
fic
ien
cy
(%)
1
0
.0
1
0
0
.0
0
.01
1
0
.49
0
.91
8
9
4
.12
1
0
.0
1
0
.0
5
.0
1
0
.0
3
6
.4
3
6
.4
0
.01
0
.01
0
.01
1
3
.37
3
.70
2
4
.85
0
.92
6
0
.92
3
0
.88
5
8
9
.2
9
5
.0 Op
tim
ized
9
2
.24
1
0
.0
1
0
.0
2
.0
1
.8
3
6
.4
3
6
.4
3
0
0
.0
3
6
.4
0
.05
0
.00
5
0
.01
0
.01
6
4
.89
1
5
.43
3
2
.32
9
9
.81
0
.76
0
0
.88
7
0
.86
3
0
.63
7
8
.49
9
3
.89
9
5
.47
9
6
.76
Figure
7
.
M
aj
or
power
loss
comp
on
e
nts
of th
e LED
drive
r f
ound in
sim
ulati
on
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N:
20
88
-
8
694
Desig
n of
a hig
h perfor
m
an
ce
AC
-
DC
LE
D d
riv
er base
d on
SEP
IC to
po
l
ogy
(
F
ouzia Fe
rdou
s
)
879
5.
TRA
NS
FE
RF
UNCTIO
N A
ND FEE
DB
A
CK CO
NTR
O
L
The
powe
r
sta
ge
(S
EP
IC)
of
cl
os
e
d
lo
op
s
ys
te
m
is
nonli
near
syst
em.
Nonlinea
r
s
ys
t
em
is
us
ually
diff
ic
ult
to
m
od
el
a
nd
it
is
al
so
dif
ficult
to
pr
e
dict
the
sy
ste
m
be
ha
vi
or
.
S
o,
it
is
bette
r
to
ap
pr
ox
imat
e
nonlinea
r
s
ys
te
m
to
li
near
s
yst
em.
F
or
this
sta
te
sp
a
ce
ave
ra
ging
te
c
hn
i
qu
e
is
use
d
to
des
cribe
SEP
IC
usi
ng
a
sy
ste
m
of
li
ne
ar
dif
fer
e
ntial
equ
at
io
ns.
Dif
f
eren
ti
al
e
qu
at
i
on
s
of
S
EPIC
and
a
ver
a
ge
m
at
rices
are
give
n
i
n
sect
ion
5.1. i
n
t
he pape
r. Detai
ls Operat
in
g p
oin
t i
s
not disc
us
se
d here
as it i
s a
well
-
kno
w
n ph
e
nome
non.
5.1.
St
ate s
pa
c
e eq
ua
ti
on
s
The
sta
te
s
pace
equati
ons fo
r SEPIC
duri
ng thr
ee
sw
it
chi
ng
sta
te
s in
DC
M
as sho
wn in Fi
gure
8
.
for
sta
te
A
:
<
<
̇
=
1
+
1
(
)
(25)
=
1
+
1
(
)
for
sta
te
B
:
<
<
̇
=
2
+
2
(
)
(26)
=
2
+
2
(
)
for
sta
te
C
:
<
<
̇
=
3
+
3
(
)
(27)
=
3
+
3
(
)
wh
e
re t
he
recti
fied
i
nput
vo
lt
a
ge
is
(
)
an
d
̇
=
an
d
t
he
sta
te
vecto
r i
s d
efi
ned as
(28).
X
=
[
1
2
1
2
]
(28)
(a)
(b)
(c)
Figure
8
(a). S
EPIC circ
uit w
hen
M
1
is
ON
,
Diode is
OF
F
, (b
) wh
e
n M
1
is
O
F
F, Dio
de
is
ON, (c)
SEPI
C
ci
rcu
it
whe
n M
1
is OF
F, Dio
de
is O
F
F
C
1
V
g
V
C
2
V
L
2
V
O
V
C
1
L
E
D
S
t
r
i
n
g
M
1
V
L
1
+
-
L
2
L
1
r
L
1
r
L
2
r
C
1
r
C
2
C
2
r
m
s
+
-
C
1
V
C
2
V
L
2
V
O
V
c
1
L
E
D
S
t
r
i
n
g
M
1
V
L
1
L
2
L
1
r
L
1
r
L
2
r
C
1
r
C
2
C
2
r
D
1
V
g
+
-
+
-
C
1
V
C
2
V
L
2
V
O
V
C
1
L
E
D
S
t
r
i
n
g
M
1
V
L
1
L
2
L
1
r
L
1
r
L
2
r
C
1
r
C
2
C
2
Evaluation Warning : The document was created with Spire.PDF for Python.