Internati
o
nal
Journal of P
o
wer Elect
roni
cs an
d
Drive
S
y
ste
m
(I
JPE
D
S)
V
o
l.
5, N
o
. 3
,
Febr
u
a
r
y
201
5,
pp
. 39
3
~
40
3
I
S
SN
: 208
8-8
6
9
4
3
93
Jo
urn
a
l
h
o
me
pa
ge
: h
ttp
://iaesjo
u
r
na
l.com/
o
n
lin
e/ind
e
x.ph
p
/
IJPEDS
FPGA Based V/f Control of Th
ree Phase Induction Motor
Drives Integrating Super-Lift Luo Converter
P. Ela
n
go
va
n*
,
Na
lin Ka
nt
M
o
hanty*
*
* Depart
em
ent o
f
El
ectr
i
c
a
l
and
Ele
c
troni
cs
Eng
i
neerin
g
,
S.K
.
P.
Engineering Co
llege, Anna Univ
ersity
** Depart
em
ent
of El
ectr
i
c
a
l
and
El
ectron
i
cs
Eng
i
neer
ing,
S
r
i Venkateswara College of
Eng
i
neering, Anna Univer
sity
Article Info
A
B
STRAC
T
Article histo
r
y:
Received Dec 5, 2014
Rev
i
sed
Jan 12, 201
5
Accepte
d
Ja
n 21, 2015
The signifi
cance of Elem
entar
y
Positive Output
Super-Lift Luo
Converter
(EPOSLLC) in constant Voltag
e
/Hertz
(V/f) contr
o
lled Induction
Motor (IM)
drive is present
e
d. The tr
adit
iona
l IM
drive which
integrates phase controlled
rect
ifier
or boost
convert
er in
the
facad
e end
upshot tribul
at
ions li
ke DC link
fluctu
ations and
deprived DC link vo
ltage level. To overcome the problem,
the conv
entional DC-DC conv
erter
is rep
l
aced with Proportional p
l
us
Integral (PI) con
t
rolled
EPOSLLC in the
f
r
ont en
d of IM drive th
at produces
the DC link voltage in geometric progr
ession. The Voltage Source Inverter
(VSI) of the suggested s
y
stem renders
both op
en loop and clo
s
ed loop V/f
control scheme for IM by
feedback
r
e
gulated Sinusoidal Pulse Width
Modulation (SPWM) technique. Simula
tion
an
d experimen
t
al works ar
e
conced
ed and results presented to dem
onstrate the viability
of the proposed
approach
. Simulation is carried out
using MAT
L
AB /SIMULI
NK
software
and the
expe
ri
m
e
ntal setup
is
built wi
th Fie
l
d Program
m
a
ble Gat
e
Arra
y
(FPGA) Spartan-6 processor. Th
e an
tic
ipated EPOSLLC
is
found
fit for V/f
controlled IM dr
ives consid
ering
the DC link
Voltage, Speed resp
onse of IM
and To
tal Harmonic Distor
ion (
T
HD) in IM
curr
ent.
Keyword:
DC link
Vo
ltag
e
EPOS
LLC
I
ndu
ctio
n Mo
t
o
r Dr
iv
es
PI con
t
ro
ller
To
tal Harm
o
n
i
c Distortio
n
Copyright ©
201
5 Institut
e
o
f
Ad
vanced
Engin
eer
ing and S
c
i
e
nce.
All rights re
se
rve
d
.
Co
rresp
ond
i
ng
Autho
r
:
P.El
an
g
ova
n,
Research Sc
holar &
Assistant
Profes
sor,
Depa
rtem
ent of Electrical a
n
d
El
ect
ro
ni
cs E
n
gi
nee
r
i
n
g,
S.K.P. Eng
i
n
e
er
ing
Co
llege,
A
n
n
a
Un
iv
er
sity, Tir
u
v
a
n
n
a
m
a
lai -
606
611
Em
ail: elangoe
ee2007@gm
a
il.com
1.
INTRODUCTION
Induction M
o
t
o
rs
are t
h
e
Workhorse
of th
e
Indu
stry du
e t
o
its eco
no
m
y
o
f
pro
c
urem
en
t, in
stallatio
n
and
use
.
Recent developm
ent in the fi
eld
of
Power Electronics pla
n
ted a
wide usa
g
e
of Induction
M
o
tor (IM
)
i
n
t
h
e ad
j
u
st
ab
l
e
speed
dri
v
es
whe
r
e s
p
eed c
ont
rol
of t
h
e
m
o
t
o
r i
s
hi
ghl
y
requi
red a
n
d
squi
rrel
ca
ge t
y
pe o
f
I
M
is v
e
r
y
popu
lar
in
that case.Th
e
b
a
sic con
t
ro
l in
vo
lv
ed
in
v
a
r
i
ab
le sp
eed
con
t
ro
l of
IM is ap
p
licatio
n
of
a
v
a
riab
le frequ
e
n
c
y and
v
a
riable
m
a
g
n
itud
e
of AC
vo
ltag
e
t
o
th
e m
o
to
r for th
e attain
m
e
n
t
of
v
a
riab
le
sp
eed
ope
rat
i
o
n. M
a
n
y
t
echni
q
u
es ar
e al
ready
i
n
t
r
o
duce
d
t
o
c
o
nt
r
o
l
t
h
e IM
para
m
e
t
e
rs [1]
.
H
o
weve
r, t
h
e m
e
tho
d
by
n
a
m
e
co
n
s
tan
t
Vo
ltag
e
/
H
ertz
(V/f) is v
e
rsatile in
u
s
e. Fu
rt
h
e
r, th
e V/f tech
n
i
q
u
e
is classified
in
to
o
p
en
loo
p
and cl
ose
d
l
o
o
p
co
nt
r
o
l
.
T
h
e
ope
n l
o
o
p
V/
f
cont
rol
of
IM
prese
n
t
e
d
i
n
[
2
]
use t
h
e ar
ra
ngem
e
nt
of
V
o
l
t
a
ge
So
urce
In
verte
r
(
V
SI
) fe
d I
M
with so
urc
e
inp
u
t as
DC
wh
ich
fails to
d
i
scu
ss th
e
in
flu
e
n
ce
o
f
DC link
f
l
u
c
tu
ation
s
in
th
e I
M
d
r
i
v
e du
e to
lo
ad
d
i
stu
r
b
a
n
ce and
also
th
e r
e
su
lts o
b
t
ain
e
d
ar
e ideal. Th
e clo
s
ed
loop
V/
f co
nt
r
o
l
o
v
e
rcom
es t
h
e pr
obl
em
wi
t
h
t
h
e l
o
ad
di
st
ur
ba
nce t
h
at
p
r
e
v
ai
l
s
i
n
ope
n l
o
o
p
V/
f c
o
nt
r
o
l
of
IM
.
Ho
we
ver
,
t
h
e
foc
u
s
o
n
q
u
al
i
t
y
DC
l
i
nk
v
o
l
t
a
ge f
o
r
fee
d
b
ack
pr
ocessi
n
g
i
s
ha
ndl
e
d
by
m
eans of a
br
aki
n
g
circuit [3] whi
c
h com
p
licates the syste
m
d
e
sign. To
i
n
t
r
od
uce t
h
e i
m
port
a
nce o
f
DC
l
i
nk v
o
l
t
a
ge,
a new
m
o
d
e
l [4
] is d
e
v
e
lop
e
d
t
o
u
tilize th
e DC link
v
o
ltag
e
i
n
m
o
re efficien
t way, bu
t th
e m
a
x
i
m
u
m startin
g
cu
rren
t
an
d To
tal Harm
o
n
i
c Disto
r
ti
o
n
(THD) in
stato
r
cu
rren
t o
f
IM
are
still
th
e b
a
rrier facto
r
s of p
r
actical
i
m
p
l
e
m
en
tatio
n
.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
3
93 –
40
3
39
4
In
ad
d
ition
,
usin
g
a DC link
cap
acito
r to
redu
ce th
e THD in
stato
r
cu
rren
t
o
f
IM is d
e
v
e
lo
p
e
d
[5
] but
t
h
e DC
l
i
nk fl
i
c
keri
n
g
w
h
i
c
h
i
s
not
sui
t
a
bl
e for
fee
dbac
k
cont
r
o
l
l
e
d sy
st
em
i
s
not
el
im
i
n
at
ed. In
st
ead o
f
addi
ng a
passi
ve elem
ent to t
h
e
IM
dri
v
e sy
ste
m
for the
pur
po
se of
r
e
du
ci
n
g
TH
D, t
h
e
view
tur
n
ed on
t
o
t
h
e
Pu
lse
Wid
t
h
Mo
du
latio
n (PWM) tech
n
i
que u
s
ed
t
o
g
e
n
e
rate g
a
te
pu
lse fo
r
VSI t
h
ro
ug
h wh
ich th
e req
u
i
red
vari
a
b
l
e
vol
t
a
g
e
and
vari
a
b
l
e
fre
que
ncy
i
s
at
t
a
i
n
ed
si
m
u
l
t
a
neo
u
sl
y
re
duci
ng t
h
e TH
D.
A
m
ong di
f
f
ere
n
t
P
W
M
t
echni
q
u
es
, t
h
e
Si
nu
soi
d
al
Pu
l
s
e
W
i
dt
h
M
o
dul
at
i
o
n (
S
P
W
M
)
[
6
]
,
[
7
]
i
s
m
o
st
pop
ul
ar a
nd
si
m
p
l
e
t
echni
q
u
e
appl
i
cabl
e
f
o
r I
M
dri
v
es
. In S
P
W
M
t
ech
ni
q
u
e
, t
w
o si
g
n
al
s (
a
si
nus
oi
dal
ref
e
rence si
g
n
al
a
nd a hi
gh t
r
i
a
n
gul
a
r
carrier signal)
are c
o
m
p
ared
to prov
i
d
e t
w
o
st
at
uses
(hi
g
h
or
l
o
w)
o
f
ou
t
put
.
O
n
t
h
e
ot
her
ha
n
d
, t
h
e r
i
ppl
e
cont
e
n
t
i
n
t
h
e
DC
l
i
nk v
o
l
t
a
g
e
dest
r
o
y
s
t
h
e feat
ure
of S
P
W
M
t
echni
que
by
di
st
ort
i
n
g
t
h
e o
u
t
p
ut
cur
r
e
nt
of
VSI. Th
e research
wo
rk
[8
] d
e
v
e
l
o
p
e
d
a sep
a
rate
DC
lin
k v
o
ltag
e
con
t
ro
l in
add
ition
with
co
m
p
lex
PWM
cont
rol
f
o
r bac
k
-
b
ac
k con
v
e
r
t
e
r fed IM
d
r
i
v
e, but
i
t
i
s
not
econ
o
m
i
c for l
o
w
po
wer IM
dri
v
es. The i
n
f
l
uenc
e
of
DC
l
i
nk
fl
uct
u
at
i
o
ns
ove
r t
h
e T
HD
of
IM
cur
r
ent
a
nd
v
o
l
t
a
ge i
s
very
cl
earl
y
p
r
esent
e
d i
n
[
9
]
und
e
r
d
i
fferen
t
wo
rkin
g
con
d
ition
s
and
co
n
c
l
u
d
e
d
th
at t
h
e
DC
flu
c
t
u
atio
n
s
has an
effect on
IM
p
a
ram
e
t
e
rs.
To
t
r
i
u
m
ph o
v
e
r
t
h
e a
b
ove
m
e
nti
one
d
dra
w
bac
k
s,
t
h
e
si
m
p
l
e
DC
-
D
C
c
o
n
v
e
r
t
e
rs s
u
c
h
as
b
oost
,
buc
k
an
d
b
u
c
k
-
bo
ost
c
o
n
v
ert
e
rs we
re i
n
t
r
o
d
u
ced i
n
t
h
e
faç
a
de en
d
of
VS
I fe
d IM
dri
v
e
[1
0]
, [
1
1]
. Usi
ng
b
o
o
s
t
co
nv
ert
e
r i
n
IM
d
r
i
v
es
,
onl
y
t
w
i
ce t
h
e i
n
put
DC
i
s
at
t
a
i
n
abl
e
i
n
DC
l
i
n
k
[
1
2]
an
d
he
nce a
not
her
fa
ct
or,
DC
l
i
nk
vol
t
a
ge
lev
e
l co
m
e
s in
to
p
l
ay.
An
ad
va
nce
d
DC
-
D
C
c
o
n
v
e
r
t
e
r i
n
S
u
per
-
L
i
ft
Lu
o c
o
nve
r
t
er seri
es
[
13]
,
[
14]
by
nam
e
El
em
ent
a
ry
Po
sitiv
e
Ou
t
p
u
t
Su
p
e
r-Li
f
t
Luo
Conv
erter (EPOSLLC)
p
r
od
u
ce
ou
tput v
o
ltag
e
in
geo
m
etric p
r
og
ressio
n
o
v
e
rco
m
es
th
e p
r
o
b
l
em
th
at
ex
ist in
co
nv
en
tio
n
a
l boo
st con
v
e
r
ter. H
o
weve
r,
EPOSLLC is not com
p
etent
whi
l
e
use
d
wi
t
h
con
s
t
a
nt
co
nd
uct
i
o
n d
u
t
y
and t
h
e i
n
vest
i
g
at
i
on [
1
5]
hel
d
t
o
cont
rol
EPOS
LLC
usi
ng P
I
regu
lato
r fails t
o
sh
ow im
p
r
ove
m
e
n
t
o
f
EPOSLLC
u
n
d
e
r load
an
d lin
e
v
a
riatio
n
.
Th
is
p
a
p
e
r imp
l
em
en
ts a su
perio
r
PI
con
t
rol o
f
EPOSLLC
in
th
e
fron
t en
d
of bo
th op
en
loop
and
cl
osed l
o
o
p
V/
f co
nt
r
o
l
l
e
d
IM
dri
v
es.
The
p
r
op
ose
d
IM
d
r
i
v
e
gras
p
feat
u
r
es suc
h
as
DC
l
i
nk
vol
t
a
ge
l
e
vel
1
.
5
t
i
m
e
s great
er t
h
an t
h
e co
n
v
e
n
t
i
onal
bo
ost
c
o
n
v
e
r
t
e
r re
d
u
c
e
d TH
D i
n
St
at
or C
u
rre
nt
o
f
IM
, fl
uct
u
at
i
o
n f
r
ee
DC
l
i
n
k
vol
t
a
g
e
an
d i
m
pro
v
e
d
s
p
ee
d re
g
u
l
a
t
i
on
o
f
IM
.
2.
DESIG
N
OF I
M
P
R
O
V
ED
P
I
CO
NT
ROL
LER FO
R P
R
OPOSE
D
EP
OSLLC
Th
e
work
p
r
esen
ted
i
n
th
is
pap
e
r m
a
in
ly focu
s
on
re
g
u
l
a
t
e
d
DC
-
D
C
co
nve
rsi
o
n t
h
at
f
eeds
VS
I-
IM
d
r
i
v
e. On
e of th
e adv
a
n
c
ed
DC-DC conv
erters fro
m
th
e famil
y
o
f
p
o
s
itive o
u
t
pu
t Sup
e
r-lift Lu
o
series h
a
v
e
b
een
cho
s
en
for th
e in
tend
ed
sch
e
m
e
. Th
e po
sitiv
e ou
tpu
t
Sup
e
r-lift Luo
co
nv
erter h
a
s so
m
e
su
b
-
series such
as Main
series, Add
ition
a
l series, Enh
a
n
ced series,
Re-enh
an
ced
series an
d
M
u
ltip
le-en
h
a
n
c
ed
series. Th
e
ele
m
entary cir
c
uit from
Main series is im
p
l
e
m
ented fo
r t
h
e proposed arrangem
ent. The ele
m
entary c
i
rcuit
and
eq
ui
val
e
nt
ci
rcui
t
d
u
ri
n
g
s
w
i
t
c
h
ON
an
d
OFF
are
sh
o
w
n i
n
Fi
g
u
r
e
1.
(a)
(b
)
(c)
Fi
gu
re
1.
(a
) E
qui
val
e
nt
ci
rc
u
i
t
of E
P
O
S
LL
C
,
(
b
)
EP
OSL
L
C
d
u
ri
ng
swi
t
ch
ON
, (
c
)
EP
OSLLC
d
u
ri
ng
swi
t
c
h
OFF
The
voltage ac
ross
C
21
i
s
cha
r
ge
d t
o
V
i(dc)
wh
ich
is th
e rectified
in
pu
t t
o
EPOSLLC.
Th
e curren
t
th
ro
ugh
th
e ind
u
c
t
o
r L
21
inc
r
eases with V
i(d
c
)
d
u
ri
n
g
s
w
i
t
c
h O
N
an
d dec
r
eases wi
t
h
–
(
V
o(dc)
- 2
V
i(dc)
) du
rin
g
switch OFF
of EPOS
LLC. The
ave
r
age
ou
tpu
t
vo
ltag
e
of EPOSLLC is:
o(
dc)
i
(
d
c)
2 -
γ
V =
V
1 -
γ
(1
)
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
FPGA Based V/f Co
n
t
ro
l
o
f
Th
ree Pha
s
e
Indu
ctio
n Mo
to
r Drives In
teg
r
a
t
in
g
Su
p
e
r-Lift…
(P.Ela
ngo
va
n
)
39
5
Whe
r
e,
o(
dc
)
V
i
s
t
h
e avera
g
e
out
put
vol
t
a
ge
o
f
EP
OSLLC
,
i(dc
)
V
is th
e in
pu
t vo
ltag
e
o
f
EPOSLLC
an
d
γ
is
co
ndu
ctio
n du
t
y
.
Th
e
ou
tpu
t
curren
t
o
f
EPOSLLC is:
o(
dc
)
i
(d
c
)
1 -
γ
I =
I
2 -
γ
(
2
)
Whe
r
e,
o(dc
)
I
is the
a
v
era
g
e
output
current
of EP
OSLLC a
n
d
i(
dc)
I
is th
e inpu
t current o
f
EPOSLLC
. Th
e
vol
t
a
ge
t
r
a
n
sfe
r
gai
n
(G
) of
E
P
OSL
L
C
i
s
gi
ven
by
:
2 -
γ
G =
1 -
γ
(
3
)
Wh
ereas, th
e
vo
ltag
e
tran
sfer
g
a
in
of
co
nv
entio
n
a
l boo
st con
v
e
r
t
er
is:
1
G =
1 -
γ
(
4
)
On
com
p
ari
n
g
(3
) a
n
d
(
4
)
,
i
t
i
s
o
bvi
o
u
s t
h
at
f
o
r
t
h
e sam
e
co
nd
uct
i
o
n
dut
y
,
EPOS
LLC
pr
o
duce
1
.
5
t
i
m
es
t
h
e
v
o
ltag
e
tran
sfer th
at
o
f
th
e
con
v
e
n
tion
a
l
b
oost con
v
e
rter.
The c
o
nt
rol
st
r
a
t
e
gy
o
f
EP
OS
LLC
usi
n
g
P
I
r
e
gul
at
o
r
i
s
e
x
p
o
se
d i
n
Fi
g
u
re
2.
The
er
ro
r i
n
t
h
e act
ual
DC link
v
o
ltage with
resp
ect t
o
th
e referen
c
e DC
link
vo
ltag
e
is t
h
e inpu
t
to
th
e
PI con
t
ro
ller.
Fi
gu
re
2.
C
o
nt
r
o
l
st
rat
e
gy
o
f
E
P
OSL
L
C
Th
e PI co
n
t
roller for an
ticip
ated
EPOSLLC is d
e
sign
ed
b
y
find
ing
th
e app
r
op
riat
e v
a
lu
e of
p
r
op
or
tio
n
a
l gain
(K
p
) and
i
n
tegral ti
m
e
(T
i
). T
h
e
first s
t
ep in
determ
inin
g
K
p
and T
i
is to
d
e
v
e
l
o
p
th
e state
m
odel
of EP
O
S
LLC
.T
he st
at
e
m
odel
of E
P
OSLLC
[1
6]
, [
17]
i
s
det
e
rm
ined
by
assum
i
ng t
h
e st
at
e va
ri
abl
e
s
x
1
(cu
rre
nt flo
w
in
g thr
o
u
g
h
L
21
), x
2
(Vo
ltag
e
across C
21
) and x
3
(Vo
ltag
e
across C
o
) and i
n
p
u
t
vari
abl
e
u
(i
n
put
vol
t
a
ge
of E
P
O
S
LLC
)
.
C
onsi
d
eri
ng
n
e
gl
i
g
i
b
l
e
i
n
p
u
t
and
o
u
t
p
ut
resi
st
ance o
f
p
r
op
ose
d
EP
OSLL
C
,
t
h
e
state-space a
v
e
r
agi
n
g m
odel of EPOSL
L
C is
give
n
by:
.
1
21
21
21
21
1
.
22
21
21
21
.
3
3
11
1
1
12
0
11
1
0
oo
o
x
LL
L
L
x
x
xu
CC
C
x
x
CC
C
(
5
)
B
a
sed
on
Zei
g
l
e
r –
Ni
c
hol
s
t
uni
ng
m
e
t
hod
[1
8]
,
K
p
an
d
T
i
ar
e
r
e
so
lv
ed
b
y
ap
p
l
ying th
e step
i
n
pu
t
to
t
h
e
math
e
m
atica
l
m
o
d
e
l (5
) of
EPOSLLC to
attain
S – sh
ap
ed curve a
n
d is shown in
Figure
3. By
drawing a
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
3
93 –
40
3
39
6
tan
g
e
n
tial lin
e
to
th
e S-sh
aped
cu
rv
e g
i
v
e
s th
e co
n
s
tan
t
s
del
a
y
t
i
m
e
(L
= 0.0
0
5
s) an
d
t
i
m
e
const
a
nt
(T =
0.
01
5s
). F
r
om
t
h
e val
u
e o
f
L
and
T, t
h
e K
p
(
9
.
3
6
)
a
nd T
i
(
0
.0
16s
) a
r
e st
rai
ght
a
w
ay
res
o
l
u
t
e
d
fr
om
Zei
g
l
e
r –
Nichols
c
h
art.
Fi
gu
re
3.
S-
sha
p
ed
st
ep
r
e
spon
se
o
f
EPO
S
LLC
3.
DRIVE TOPOLOGY OF
PROP
OSE
D
SCHE
ME AND CAL
CUL
ATION OF
IM PARAMETERS
Th
is section
ex
p
l
ains th
e t
w
o d
i
fferen
t t
o
po
log
i
es
o
f
IM d
r
i
v
e in
tend
ed and
fo
llowed b
y
IM
param
e
t
e
rs cal
cul
a
t
i
on.
Fi
g
u
r
e 4 a
n
d Fi
gu
re
5 s
h
ow
s t
h
e
o
p
en
l
o
op
an
d c
l
osed
l
o
op
V/
f
co
nt
r
o
l
t
o
pol
o
g
y
o
f
pr
o
pose
d
s
c
he
m
e
.
Fi
gu
re 4.
Pr
o
p
o
se
d
Sc
hem
e
wi
t
h
Ope
n
Lo
o
p
V/
f
C
ont
rol
To
pol
ogy
Fi
gu
re
5.
Pr
o
p
o
se
d Sc
hem
e
wi
t
h
C
l
ose
d
L
o
o
p
V/
f
C
o
nt
r
o
l
To
pol
ogy
0
2
4
6
8
10
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
Ti
m
e
(
x
(
1
0
-
2)
s
)
R
e
spon
s
e
of
E
P
O
S
L
L
C
S
t
e
p
R
e
s
p
o
n
s
e
o
f
EP
O
S
LLC
T
=
0
.
01
5s
L
=
0
.
00
5s
T
a
nge
nti
a
l
L
i
n
e
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
FPGA Based V/f Co
n
t
ro
l
o
f
Th
ree Pha
s
e
Indu
ctio
n Mo
to
r Drives In
teg
r
a
t
in
g
Su
p
e
r-Lift…
(P.Ela
ngo
va
n
)
39
7
Both the sche
me presented
above
inc
o
rporates PI cont
rol
l
ed EPOS
LLC
arrangem
ent in the faça
de
end
of V
S
I
.
The o
p
en l
o
o
p
V/
f co
nt
r
o
l
l
e
d IM
dri
v
e
depi
c
t
ed i
n
Fi
gu
re 4
proce
ss t
h
e re
fere
nce spee
d
t
h
at
i
s
m
u
lt
i
p
l
i
e
d wi
t
h
t
h
e fi
xe
d gai
n
val
u
e
s
of m
odul
at
i
o
n i
nde
x
and f
r
e
que
ncy
of t
h
e re
fere
nc
e si
ne wave u
s
ed i
n
SP
W
M
t
ech
ni
que
fo
r ge
nerat
i
ng gat
e
si
g
n
al
s t
o
VSI
.
Wher
eas, t
h
e cl
ose
d
l
o
o
p
V/
f c
ont
r
o
l
l
e
d IM
d
r
i
v
e
sho
w
n
i
n
Fi
g
u
r
e
5
use
s
t
h
e
PI c
o
nt
r
o
l
l
e
r f
o
r
re
gul
at
i
n
g
t
h
e e
r
r
o
r i
n
spee
d
of
IM
vi
a SP
W
M
t
ech
n
i
que.
Apa
r
t
fr
om
t
h
e cont
r
o
l
t
echni
q
u
e di
scu
sse
d ab
ove
, t
h
e cri
t
i
cal
param
e
t
e
r est
i
m
a
t
i
on of IM
i
s
necessa
ry
and t
o
assess, t
h
e
pe
r-
pha
se eq
ui
val
e
nt
ci
rcui
t
of
I
M
i
n
t
h
e pr
op
o
s
ed schem
e
i
s
desi
g
n
e
d
an
d s
h
o
w
n
in
Figur
e
6
.
In Figu
r
e
6, th
e
d
i
f
f
e
r
e
n
t
pa
ra
meters of IM
are Stator
resi
stance (R
S
),
Stator i
n
ductanc
e
(X
S
),
Stator phase
c
u
rrent (I
S
), M
u
tual Inductanc
e
(X
M
), M
a
gn
etizing Cu
rre
n
t
(I
M
), Rot
o
r
resistance (R
R
), Ro
tor
inductance (X
R
), Roto
r cu
rre
n
t
(I
R
) and Slip
(S). For the ca
se prese
n
ted,
th
e r
e
q
u
i
red
speed
of
I
M
is 10
00r
p
m
and
the factors suc
h
as IM
c
u
r
r
ent,
P
o
we
r
fac
t
or
(P.
F
.)
a
n
d
e
fficiency
(
η
) are calcu
lated
i
n
th
is sectio
n.
Fi
gu
re
6.
Per
-
P
h
ase E
q
ui
val
e
n
t
ci
rcui
t
o
f
Pr
o
pos
ed
IM
Usin
g
Kirc
ho
ff
’s Cu
rr
ent la
w, the
prim
ary phase curre
nt
of
IM is specifie
d
by,
I
S
= I
M
+ I
R
(
8
)
The e
x
pressi
on
f
o
r m
a
gnet
i
z
i
n
g c
u
r
r
ent
(I
M
) i
s
,
S
M
M
E
I=
jX
(
9
)
Whe
r
e,
E
S
is intern
al e.m
.
f.
o
f
IM.
The
rot
o
r
cu
rre
nt is,
R
R
(
)
(S
)(
T
)
I=
R(
1
-
S
)
(
1
0
)
Whe
r
e,
ω
i
s
t
h
e req
u
i
r
ed s
p
e
e
d o
f
IM
, i
n
(r
ps) a
nd T i
s
t
h
e t
o
rq
ue de
vel
ope
d by
IM
. F
r
om
(9) & (
1
0
)
, t
h
e
pha
se c
u
r
r
ent
o
f
IM
i
s
det
e
rm
ined
an
d t
h
e e
f
f
i
ci
ency
of
IM
i
s
gi
ven
by
:
O
OL
P
η
=
P+
P
(
1
1
)
Whe
r
e,
P
O
is
po
w
e
r
ou
tpu
t
b
y
I
M
an
d P
L
is t
h
e
IM losse
s.
The
o
u
t
p
ut
p
o
w
er
an
d l
o
sses
of
IM
i
s
gi
ve
n
by
:
li
n
k
O
(1
-
S
)
P
P =
S
(
1
2
)
2
2
LS
S
R
R
P=
3
(
I
R
+
I
R
)
(
1
3
)
Whe
r
e,
P
link
is
th
e DC
lin
k power of th
e IM
d
r
i
v
e.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
3
93 –
40
3
39
8
Fro
m
(12
)
, it is un
d
e
rstand
able th
at th
e d
e
p
r
iv
ed
DC lin
k vo
ltag
e
redu
ces
th
e m
a
g
n
itu
d
e
o
f
DC link
po
we
r a
n
d
t
e
n
d
s t
o
hu
ge
dr
o
p
i
n
o
u
t
p
ut
p
o
w
er
o
f
IM
. T
h
i
s
p
r
o
v
es
t
h
at
t
h
e
DC
l
i
n
k
vol
t
a
ge pl
ay
s a
vi
t
a
l
rol
e
i
n
t
h
e
ef
fi
ci
enc
y
poi
nt
of
IM
.
The va
ri
o
u
s fa
ct
ors di
sc
usse
d above
were
ca
lculated for the
anticipated sc
heme
of
4
0
0
V,
5
0
H
z
,
1
4
1
0
r
pm
, 0.5
H
P,
t
h
r
ee
phas
e
IM
a
n
d
are
t
a
bul
at
ed
i
n
Tabl
e 1.
Table
1. Calc
ulated Val
u
es
IM P
a
ra
m
e
te
rs
Calcu
l
ated
Valu
e
M
o
tor
Cur
r
e
nt
1.
736 A
Power
Factor
0.
926
Ef
f
i
ciency 96
%
4.
SIMULATION
WORK AND RESULTS
To
validate t
h
e effectivenes
s
of
pr
o
j
ect
ed
s
c
hem
e
, t
h
e Si
m
u
li
nk m
odel
of
‘E
PO
SLLC
ada
p
t
e
d
V/
f
cont
rol
o
f
IM
dri
v
e
’
i
s
desi
gne
d a
nd t
h
e sim
u
l
a
t
i
on i
s
conce
d
e
d
usi
n
g M
A
TL
AB
20
1
2
a so
ft
wa
r
e
. The
Sim
u
l
i
nk m
o
d
e
l
i
s
de
vel
o
pe
d
fo
r
bot
h
Op
en l
o
o
p
a
n
d c
l
osed
l
o
op
V/
f c
ont
r
o
l
l
e
d
I
M
dri
v
e
wi
t
h
sam
e
arra
ngem
e
nt
of
EPOSL
L
C
i
n
t
h
e fr
ont
e
nd a
nd
hol
ds i
n
va
ri
ab
le si
m
u
latio
n
circu
it p
a
rameters wh
ich
is sh
own
in
Tab
l
e 2.
Tabl
e 2. Si
m
u
lat
i
on
C
i
rc
ui
t
P
a
ram
e
t
e
rs
Para
m
e
ter Rating
I
nput AC Supply
1 phase,
100V,
50
Hz
I
nduction M
o
tor
(
I
M
)
0.
5 hp ,
3
-
phase,
50Hz,
400V
Stator Resistance o
f
IM
11.1
Ω
Stator
I
nductance
of I
M
18.
8
m
H
Rotor Resistance of
IM
12.3
Ω
Rotor
I
nductance of I
M
26.
7
m
H
M
u
tual I
nductance
467
m
H
I
nductor
L
21
= 2.
56
m
H
Capacitors C
21
= 2000µF,
C
o
=
2200µF
Th
e Sim
u
latio
n
resu
lts su
ch
as ou
tpu
t
vo
ltag
e
of
E
P
O
S
LL
C
and l
i
n
e
o
u
t
put
vol
t
a
ge o
f
VSI
rem
a
i
n
s
sam
e
for both t
h
e sim
u
lated Open l
o
op a
n
d c
l
osed l
o
op
V/f cont
rolled IM dri
v
e, b
ecause
the loa
d
disturbance
affects only the stator current
and s
p
eed
of I
M
i
n
pro
p
o
se
d schem
e
. To au
thenticate the prelim
inary feature
of
t
h
e devel
o
p
e
d
m
e
t
hod, t
h
e
DC
l
i
nk v
o
l
t
a
ge (i
.e.
)
t
h
e o
u
t
p
ut
vol
t
a
ge of
pr
op
ose
d
E
P
OSL
L
C
i
s
show
n i
n
Fi
gu
re 7.
Fig
u
r
e
7
.
Ou
tpu
t
Vo
ltag
e
of
pr
opo
sed
EPO
S
LLC
Th
e abo
v
e
resu
lt shows that fo
r
10
0V rectified
i
n
put
,
E
P
OSL
L
C
pr
od
uce
ri
p
p
l
e
f
r
e
e
3
0
0
V
D
C
vol
t
a
ge
an
d
ve
ri
fi
es t
h
e e
f
f
e
c
t
i
v
eness
of
P
I
cont
rol
l
e
d EPOSLLC i
d
eally. Th
e
ou
tpu
t
lin
e vo
ltag
e
of
VSI in
t
h
e p
r
op
ose
d
s
c
hem
e
i
s
sho
w
n i
n
Fi
g
u
r
e
8.
0
0.
5
1
1.
5
2
2.
5
3
0
100
200
300
400
Ti
m
e
(s)
V
o
l
t
ag
e (
V
)
Ou
t
p
u
t
V
o
l
t
ag
e o
f
E
P
O
S
L
L
C
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
SN
:
208
8-8
6
9
4
FPGA Based V/f Co
n
t
ro
l
o
f
Th
ree Pha
s
e
Indu
ctio
n Mo
to
r Drives In
teg
r
a
t
in
g
Su
p
e
r-Lift…
(P.Ela
ngo
va
n
)
39
9
Fi
gu
re 8.
Li
ne Out
put
V
o
l
t
a
g
e
o
f
VSI
i
n
t
h
e pr
o
pose
d
s
c
he
m
e
The
s
p
eed res
p
o
n
se of IM
f
o
r pr
op
osed
op
en
l
o
op
and
clo
s
ed
l
o
op
V/f con
t
ro
lled
IM d
r
iv
e is
prese
n
t
e
d
i
n
Fi
gu
re 9.
(a)
(b
)
Fi
gu
re
9.
S
p
ee
d
resp
o
n
se
of
I
M
fo
r
0.
5N
.m
load
di
st
ur
banc
e at
1s
(a
)
du
ri
ng
o
p
e
n
l
o
o
p
V/
f c
o
nt
rol
(
b
)
du
ri
n
g
cl
osed
l
o
op
V/
f c
ont
r
o
l
Th
e raise ti
m
e
o
f
sp
eed
to
attain
th
e referen
ce rp
m
is v
e
ry lo
w for clo
s
ed
lo
op
V/
f con
t
ro
lled
IM
dri
v
e when c
o
m
p
ared with op
en l
o
o
p
V/
f cont
rol
l
e
d
IM
d
r
i
v
e an
d
du
ri
n
g
t
h
e l
o
a
d
di
st
ur
ba
nce, t
h
e
o
p
en l
o
o
p
V/f con
t
ro
lled
IM d
r
i
v
e fails to
attain
th
e speed
at l
east nearby the re
fe
re
nce.
Wh
e
r
eas,
the closed l
o
op V/
f
co
n
t
ro
l effectiv
ely regu
lates th
e erro
r in
speed
du
ri
n
g
lo
a
d
com
m
ot
i
on. Fi
gu
re 1
0
sh
o
w
s t
h
e st
at
or c
u
r
r
ent
o
f
IM
i
n
t
h
e
pr
o
p
o
se
d sc
hem
e
duri
n
g
l
o
a
d
di
st
ur
ba
nce.
(a)
(b
)
Figu
re
1
0
.
Stator
Cu
rre
nt o
f
I
M
(a)
O
p
e
n
lo
op
V/
f c
ontr
o
l
(b
) Close
d
Lo
o
p
V/f c
o
ntrol
2.
5
2.
6
2.
7
2.
8
2.
9
3
-40
0
-20
0
0
20
0
40
0
Ti
m
e
(s
)
V
o
lta
g
e
(
V
)
L
i
ne
O
u
t
p
ut
V
o
l
t
a
g
e
of
V
S
I
0
0.
5
1
1.
5
2
2.
5
3
0
20
0
40
0
60
0
80
0
10
00
12
00
Ti
m
e
(
s
)
S
p
e
e
d
(rp
m
)
S
p
e
e
d of
I
M
R
e
fe
re
n
c
e
S
p
e
e
d
A
c
t
u
a
l
S
p
eed
0
0.
5
1
1.
5
2
2.
5
3
0
20
0
40
0
60
0
80
0
10
00
12
00
Ti
m
e
(
s
)
Speed (
r
p
m
)
S
p
eed
o
f
I
M
R
e
f
e
r
e
n
c
e S
p
eed
Ac
t
u
a
l
S
p
e
e
d
Lo
a
d
i
n
g
P
o
i
n
t
2.
5
2.
6
2.
7
2.
8
2.
9
3
-2
0
-1
0
0
10
20
Ti
m
e
(
s
)
C
u
rre
n
t
(A
)
S
t
at
o
r
Cu
r
r
en
t
o
f
I
M
P
h
as
e-
a
P
h
as
e-
b
P
h
as
e-
c
2.
5
2.
6
2.
7
2.
8
2.
9
3
-20
-10
0
10
20
Ti
m
e
(
s
)
C
u
rre
n
t
(A
)
S
t
a
t
or
C
u
r
r
e
n
t
of
I
M
Ph
a
s
e
-
a
Ph
a
s
e
-
b
Ph
a
s
e
-
c
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
3
93 –
40
3
40
0
From
Fi
gu
re
1
0
, i
t
i
s
a
ppa
ren
t
t
h
at
t
h
e
un
d
u
l
a
t
i
on i
n
t
h
e st
at
or c
u
rre
nt
o
f
I
M
i
s
hi
g
h
du
ri
ng
o
p
e
n
l
o
o
p
V/f control when c
o
m
p
ared with th
e st
at
or c
u
r
r
ent
o
f
IM
du
ri
n
g
cl
o
s
ed l
o
op
V/
f cont
rol
o
p
e
r
at
i
on a
n
d
corres
ponding
THD in stator
cu
rren
t
fo
r
bo
th
th
e sch
e
m
e
s
were presen
ted in
Fi
g
u
re
11
.
(a)
(b
)
Figu
re
1
1
. T
H
D in
stator
cu
rr
ent o
f
IM
(a
)
d
u
ri
ng
o
p
e
n
lo
o
p
V/f c
o
ntrol
(
b
)
d
u
ri
ng
c
l
o
s
ed
loop
V
/
f
con
t
r
o
l
5.
E
X
PERI
MEN
T
AL
WO
RK
AN
D RES
U
L
T
S
The
Har
d
ware
m
odel
of t
h
e pr
o
p
o
s
ed
o
p
en
l
o
op
an
d
cl
ose
d
l
o
op
V/
f c
o
nt
r
o
l
l
e
d IM
d
r
i
v
e
i
n
co
rp
orat
e
d
wi
t
h
PI c
o
nt
r
o
l
l
e
d EP
OSL
L
C
i
s
sho
w
n
i
n
Fi
g
u
re
12
and Ta
bl
e 3 s
h
o
w
t
h
e e
x
p
e
ri
m
e
nt
al
p
a
r
a
m
e
ter
s
u
s
ed
in
th
e pr
oposed
con
f
i
g
ur
atio
n. Th
e sep
a
r
a
te alg
o
r
ith
m
f
o
r
op
en
loo
p
an
d
closed
loop V
/
f
cont
rol
t
o
p
o
l
o
gy
i
s
dev
e
l
o
pe
d
whi
c
h i
s
em
bed
d
e
d
i
n
F
P
G
A
s
p
art
a
n-
6
p
r
ocess
o
r
f
o
r
g
e
nerat
i
n
g
gat
e
p
u
l
s
e t
o
VSI
.
Fi
gu
re
1
2
.
Har
d
wa
re m
odel
c
o
m
posed
o
f
1p
hase
AC
s
u
ppl
y
,
Po
wer
El
ect
ro
ni
c c
o
n
v
ert
e
r
s
, FP
G
A
pr
oce
ssor
,
IM
and
Tek
t
ron
i
x
Oscillo
scop
e
Tabl
el
3
.
E
x
pe
ri
m
e
nt
al
Param
e
t
e
rs
Para
m
e
ter Rating
I
nput AC Supply
1 phase,
100V,
50
Hz
I
nductor
L
11
= 3
m
H
,
L
21
= 2.
56
m
H
Capacitors C
21
= 200µF,
C
o
= 1320
µF
Diodes
M
V
R3060,
600V,
30A
Voltage Sour
ce I
n
ver
t
er
I
G
BT
I
nver
t
er
Switches
SKM
100GB12T
4,
1200V,
100A
,
20K
hz switching Fr
equency
T
h
r
ee phase I
nduction
m
o
tor
0.
5 hp ,
3
-
phase,
50Hz,
400V
Processor FPGA
Spa
r
tan-6
0
20
0
400
600
80
0
1000
0
5
10
15
20
F
r
e
q
ue
nc
y (
H
z
)
F
u
nda
m
e
n
t
a
l
(
5
0
H
z
)
= 2.
949
,
T
H
D
=
4
.
4
2
%
M
a
g (%
of F
unda
m
e
nt
a
l
)
0
20
0
40
0
60
0
80
0
10
00
0
5
10
15
20
F
r
e
q
ue
n
c
y (
H
z
)
F
u
n
d
a
m
e
n
t
a
l
(
5
0H
z
)
= 2.
9
4
2
,
T
H
D
=
1.
63
%
M
a
g
(
%
of
F
u
nd
a
m
e
n
t
a
l
)
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PED
S
I
S
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:
208
8-8
6
9
4
FPGA Based V/f Co
n
t
ro
l
o
f
Th
ree Pha
s
e
Indu
ctio
n Mo
to
r Drives In
teg
r
a
t
in
g
Su
p
e
r-Lift…
(P.Ela
ngo
va
n
)
40
1
Th
e
IM term
in
al v
o
ltage (lin
e vo
ltag
e
o
f
VSI) an
d DC link
v
o
ltag
e
is
p
r
esen
ted
i
n
Fi
g
u
re 13
.
(a)
(b
)
Fi
gu
re
1
3
.
(a)
Li
ne
out
put
v
o
l
t
a
ge o
f
VSI
(C
H2
)
wi
t
h
x-a
x
i
s
scal
e (
1
di
v.
=
5m
s) an
d y
-
a
x
i
s
scal
e (
1di
v.
=
10
0
V
)
(
b
)
DC
l
i
nk
V
o
l
t
a
ge
(C
H2
)
wi
t
h
x-a
x
i
s
scal
e (
1
di
v.
=
2
5
m
s
) and
y
-
a
x
i
s
scal
e
(1
di
v
.
= 5
0
V
)
The s
p
eed
of
IM in the experim
e
ntal se
tup is
m
easure
d
at the ter
m
inals
of S
p
art
a
n
-
6
pr
ocess
o
r
t
h
r
o
u
g
h
a di
gi
t
a
l
t
o
anal
o
g
co
nve
rt
o
r
an
d
he
nce t
h
e s
p
ee
d r
e
sp
onse i
s
m
easure
d
i
n
t
e
rm
s
of
vol
t
a
ge. Fi
g
u
re
1
4
sh
ow
s th
e sp
eed
r
e
sp
on
se (
C
han
n
e
l
-
1)
o
f
I
M
fo
r 100
0rp
m
r
e
f
e
r
e
n
ce sp
eed (
C
h
a
nn
el-2
) an
d th
e lo
ad
t
o
rq
u
e
o
f
0
.
5
N
.m
ap
p
lied
at 40
0
m
s. Th
e resu
lt o
f
speed
respo
n
s
e
valid
ates th
e feasib
ility o
f
clo
s
ed
loo
p
V/f co
n
t
ro
l
ove
r
o
p
en
l
o
op
V/
f
co
nt
r
o
l
f
o
r
t
h
e
pr
o
pose
d
m
odel
.
(a)
(b
)
Fi
gu
re 1
4
. Spe
e
d resp
o
n
se of
IM
f
o
r
l
o
a
d
di
s
t
ur
bance
(a
) du
ri
n
g
ope
n
l
o
o
p
V/
f
c
o
nt
rol
(
b
) du
ri
n
g
cl
osed
l
o
o
p
V/
f c
o
nt
rol
wi
t
h
x-a
x
i
s
scal
e
(
1di
v. =
5
0
0
m
s
) an
d y
-
a
x
i
s
sca
l
e (1
di
v
.
=
1
6
6
.
6
6
r
p
m
)
The T
H
D in the stator c
u
rre
nt
duri
ng the e
xperim
e
nt
al work is m
easured a
n
d is s
h
own in
Figure
15.
(a)
(b
)
Figu
re
1
5
. T
H
D in
Stato
r
c
u
r
r
ent
of
IM
(a)
du
rin
g
o
p
en
l
o
op
V/
f c
ont
r
o
l
(b
)
du
ri
n
g
cl
os
ed l
o
o
p
V/
f c
o
nt
r
o
l
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l.
5
,
No
.
3
,
Feb
r
uar
y
201
5 :
3
93 –
40
3
40
2
The T
HD i
n
t
h
e st
at
or cu
rre
nt
of IM
du
ri
n
g
ope
n l
o
o
p
V/
f
cont
rol
i
s
ar
ou
nd
5% a
nd
d
u
r
i
ng cl
ose
d
lo
op
V/f con
t
ro
l is arou
nd
2% wh
ich leg
a
lizes th
e sim
u
latio
n
resu
lt presen
ted
i
n
Fi
g
u
re
1
1
.
6.
CO
NCL
USI
O
N
This pa
per
pre
s
ents the im
prove
d PI control of
EPOSLL
C incorporated in
the
façade end of ope
n
l
o
o
p
an
d cl
ose
d
l
o
o
p
V/
f c
o
n
t
rol
l
e
d IM
d
r
i
v
e. Ex
peri
m
e
nt
al
and Si
m
u
l
a
tion re
sul
t
s
suc
h
as DC
l
i
nk vo
l
t
a
ge,
spee
d res
p
onse
of
IM
an
d T
H
D i
n
t
h
e st
at
or
cur
r
ent
of
I
M
ar
e ob
tain
ed
.
O
n
ob
serv
ing
t
h
e sp
eed
r
e
spon
se of
IM
, t
h
e re
g
u
l
a
t
i
on t
i
m
e
for l
o
ad
di
st
u
r
ba
nc
e i
s
very
l
o
w
fo
r cl
ose
d
l
o
o
p
V/
f c
o
nt
r
o
l
of
IM
d
r
i
v
e i
n
bot
h
si
m
u
latio
n
and h
a
rdware test, wh
ich
v
a
lid
ates th
e effectiv
en
ess
o
f
cl
o
s
ed
lo
op
V/
f con
t
ro
l ov
er
op
en
l
o
o
p
V/f
cont
rol
wi
t
h
o
u
t
com
p
l
e
x desi
gn
. O
n
t
h
e
ot
h
e
r ha
n
d
, t
h
e
sp
eed res
p
on
se o
f
IM
du
ri
n
g
o
p
e
n l
o
op
V/
f c
o
nt
r
o
l
suggest that s
u
ch control tec
hni
que is acce
pted
only
for the applications
like water
pum
ping, com
p
ressors,
et
c., whe
r
e t
h
e
speed cha
n
ge of IM
i
s
not
re
qui
red
.
The D
C
l
i
nk ri
ppl
e f
r
ee vol
t
a
ge wa
vef
o
rm
veri
fi
es t
h
e
u
s
efu
l
n
e
ss
o
f
p
r
op
o
s
ed
EPOSLLC in
bo
th th
e arran
g
e
m
e
n
t
s of
IM driv
es.
Th
e
sch
e
me su
gg
ested
u
tilize
min
i
m
u
m recti
f
ied
DC vo
ltage fo
r
d
r
iv
i
n
g a three phase IM
and the
r
efore
,
t
h
e desi
g
n
usi
n
g ren
e
wa
bl
e en
ergy
as a source by
eliminating the single
phase AC supply cas
cading diode rectif
i
e
r i
s
poss
i
bl
e. B
a
si
s of f
u
t
u
re
wo
rk
has b
een
l
e
ft
for t
h
e al
t
e
rat
i
on a
nd i
m
pl
em
ent
a
t
i
ons of e
xpe
ri
m
e
nt
al
dri
v
es
un
der
i
n
v
o
l
v
em
ent
of
som
e
ot
he
r c
ont
r
o
l
t
e
chni
que
s.
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