Internati
o
nal
Journal of P
o
wer Elect
roni
cs an
d
Drive
S
y
ste
m
(I
JPE
D
S)
Vol
.
6
,
No
. 2,
J
une
2
0
1
5
,
pp
. 31
8~
32
5
I
S
SN
: 208
8-8
6
9
4
3
18
Jo
urn
a
l
h
o
me
pa
ge
: h
ttp
://iaesjo
u
r
na
l.com/
o
n
lin
e/ind
e
x.ph
p
/
IJPEDS
A New Multilevel Inverter St
ru
ct
ure F
o
r High-P
ower
Applications using Multi-c
arrier PWM Switching Strategy
Ras
o
ul
Sh
alch
i Alishah*, Se
yye
d H
o
ssein
Hosseini
**
* Department of
Electrical and
C
o
mputer
Engin
e
ering,
Urm
i
a Un
ivers
i
t
y
,
Ir
an
** Departmen
t
o
f
Electr
i
cal
Engin
eering
,
Tabri
z
Univers
i
t
y
,
Iran
Article Info
A
B
STRAC
T
Article histo
r
y:
Received Aug 14, 2014
Rev
i
sed
Feb 6, 20
15
Accepted
Mar 10, 2015
In rec
e
nt,
seve
ral num
bers of
m
u
ltilev
e
l
inv
e
rter stru
ctur
es have b
een
introduced that the numbers of ci
rcuit de
vices hav
e
been re
duced. This paper
introduces a n
e
w structure for
m
u
ltilevel
invert
er which
can be
used in h
i
gh-
power applicatio
ns. The proposed topol
og
y
is based on cascad
ed
connectio
n
of basic units. This topolog
y consis
ts of minimum number
of circuit
components such as IGBT, gate driver
cir
c
uit
and antiparallel diode. Fo
r
proposed topolog
y
,
two methods are pr
esented for determ
ination of dc
voltag
e
sources
values. Multi-carri
er PWM method for 25-lev
e
l proposed
topolog
y
is used. Verification
of th
e analy
tical results is done using
MATLAB sim
u
lation
.
Keyword:
Classical Mu
lti
lev
e
l stru
ct
u
r
e
Multicarrier PWM
Mu
ltilev
e
l Inverter
To
tal Harm
o
n
i
c Distortio
n
Copyright ©
201
5 Institut
e
o
f
Ad
vanced
Engin
eer
ing and S
c
i
e
nce.
All rights re
se
rve
d
.
Co
rresp
ond
i
ng
Autho
r
:
R
a
soul
Shal
c
h
i
Al
i
s
ha
h,
Depa
rtem
ent of Electrical a
nd Co
m
p
u
t
er
Engin
eer
ing
,
Urm
i
a Un
iv
ersity,
Ira
n.
Em
a
il: Raso
u
l
.sh
a
lch
i
@g
m
a
il
.co
m
1.
INTRODUCTION
Mu
ltilev
e
l in
v
e
rters in
co
m
p
arison
with
two
lev
e
l
con
v
e
rter can
g
e
n
e
rate o
u
t
pu
t vo
ltag
e
wav
e
fo
rm
wi
t
h
l
o
we
r val
u
e of t
h
e t
o
t
a
l
harm
oni
c di
st
o
r
t
i
ons (
T
H
D
) a
nd t
h
e
val
u
e o
f
vol
t
a
ge st
ress
on ci
rc
ui
t
devi
ces i
s
lo
w
[1,
2
]
. Mu
ltilev
e
l in
v
e
rters are u
s
ed
i
n
m
o
re app
licatio
n
s
su
ch
as Electric/Hyb
r
id
electric v
e
hicles,
rene
wa
bl
e ene
r
gy
s
o
u
r
ces,
F
A
C
T
S de
vi
ces a
n
d
s
o
on
[
3
-
5
]
.
I
n
gene
ral
,
t
h
e
r
e are
t
h
ree
ki
nds
of
co
n
v
ent
i
onal
m
u
l
tilev
e
l in
v
e
rter stru
ctures
wh
ich
h
a
v
e
b
e
en
n
a
m
e
d
as follo
ws:
Diod
e-Clam
p
e
d
Mu
ltilev
e
l
Inv
e
rter [6
].
Flyin
g
-
cap
acito
rs Mu
ltilev
e
l
Inv
e
rter [7
].
Cascad
e M
u
ltil
ev
el Inv
e
rter [8
].
The m
o
st im
portant topology
am
ong classical
m
u
ltilev
e
l inverters is cascade c
o
nverter
wit
h
separat
e
d dc s
o
u
r
ces [
9
,
1
0
]
.
C
a
scade i
n
ver
t
er req
u
i
r
es t
h
e l
east
num
ber of c
o
m
pone
nt
s whe
n
c
o
m
p
ared t
o
fl
y
i
ng ca
paci
t
o
r an
d
di
o
d
e cl
a
m
ped i
nvert
e
r
s
.
The
casca
ded
i
nve
rt
er c
o
nsi
s
t
s
of a
n
u
m
b
er
of
H
-
b
r
i
d
ge i
n
vert
er
units
with se
pa
rate dc
source fo
r each unit and it is c
o
nnecte
d
in casca
de
or series
[11, 12]
.
Cascade inve
rter is classified int
o
two
ty
p
e
s wh
ich
are called
sy
mme
tric an
d
asy
m
m
e
tric
co
nfigu
r
ation
s
. Th
e symm
e
t
ri
c co
nfigu
r
ation
uses th
e
d
c
v
o
ltag
e
sources with
th
e
same
m
a
g
n
itud
e
s.
In
t
h
e
asy
m
m
e
tric co
n
f
i
g
uratio
n, the v
a
lu
es of th
e
d
c
sou
r
ce
s are
non-equal. Asy
mme
tric
confi
g
u
r
at
i
o
n can p
r
od
uce
m
a
ny
num
bers
of
o
u
t
p
ut
vol
t
a
ge l
e
vel
s
i
n
c
o
m
p
ari
s
on
wi
t
h
sy
m
m
et
ri
c con
f
i
g
urat
i
o
n
[
1
3,
1
4
]
.
T
h
e sy
m
m
e
t
r
i
c
con
f
i
g
urat
i
o
n
has t
h
e a
dva
nt
age
of
m
odul
ar
i
t
y
t
h
at
m
a
kes
t
h
em
sim
p
l
e
t
o
desi
gn
an
d e
x
t
e
nd
. B
u
t
,
t
h
e
n
u
m
b
er
of power electronic
switches
increase
s
.
So
m
e
ap
p
licati
o
n
s
n
e
ed
m
u
lti
lev
e
l in
v
e
rter to
po
log
i
es with cap
ab
ility o
f
u
n
i
d
i
rection
a
l p
o
wer fl
ow
su
ch
as ph
o
t
o
v
o
ltaic syste
m
s
o
r
fu
el cells. Fo
r th
is aim
,
a n
e
w un
id
irecti
o
n
a
l m
u
lt
ilev
e
l i
n
v
e
rter topo
log
y
h
a
s
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l. 6,
No
.
2,
Ju
ne 20
15
:
318
–
3
25
3
19
been
p
r
o
p
o
sed
i
n
[
4
]
.
The m
a
in di
sa
d
v
ant
a
ge
of t
h
i
s
t
o
p
o
log
y
is th
at th
e switch
e
s
o
f
fu
ll
-bridg
e inv
e
rter m
u
st
wi
t
h
st
an
d t
h
e s
u
m
of t
h
e
val
u
es o
f
DC
s
o
u
r
c
e
s. It
lead
s t
o
t
h
e limitatio
n
in h
i
gh-power app
licatio
n
s
.
Seve
ral m
odulation technique have
bee
n
i
m
prove
d for m
u
ltilevel inve
rters s
u
ch as
sinusoi
d
al pulse
width
m
odulation (SP
W
M), space vect
or m
odulation
(S
VM), selective
harm
onic elim
ination (S
HE
-P
W
M
),
fund
am
en
tal freq
u
e
n
c
y switch
i
ng
an
d
so
on [15
]
-[19
].
Th
is p
a
p
e
r
focu
ses on
m
u
lti-carrier
-PWM m
o
du
lation
strateg
y
fo
r tri
g
g
e
r t
h
e
p
o
wer switch
e
s fo
r co
n
t
ro
lling
th
e
v
o
ltag
e
lev
e
ls
g
e
n
e
rated on
t
h
e
o
u
t
p
u
t
.
Th
is p
a
p
e
r presen
ts a n
e
w top
o
l
o
g
y
fo
r m
u
l
tilev
e
l in
v
e
rter wh
ich
n
e
ed
s
min
i
m
u
m n
u
m
b
e
r of po
wer
electronic elements.
2.
PROP
OSE
D
TOPOLOG
Y
Fig
u
re 1
sho
w
s
th
e b
a
sic u
n
it stru
cture for p
r
o
p
o
s
ed
m
u
ltile
v
e
l
inv
e
rter.
Fig
u
re
1
.
Basic un
it stru
ct
u
r
e fo
r propo
sed
mu
ltilev
e
l in
v
e
rter.
Th
is basic un
it can
g
e
n
e
rate fiv
e
lev
e
ls at the o
u
t
pu
t vo
ltage
(0
,
,
,
2
,
2
)
EE
E
E
. Table
I s
h
ows the
swi
t
c
hi
n
g
st
at
e
s
o
f
pr
op
ose
d
b
a
si
c u
n
i
t
fo
r
ge
nerat
i
o
n
fi
ve
l
e
vel
s
at
t
h
e
o
u
t
p
ut
v
o
l
t
a
ge
wa
v
e
fo
rm
.
Tabl
e I
.
S
w
i
t
c
h
i
ng
St
at
es o
f
P
r
op
ose
d
B
a
si
c
Uni
t
.
State
Switches
Output
voltage
S
1
T
1
T
2
T
3
T
4
1
0
1 0 1 0
0
2
0
1 0 0 1
E
3
0
0 1 1 0
-E
4
1
1 0 0 1
2E
5
1
0 1 1 0
-2
E
To produce an out
put voltage wa
veform
wit
h
hi
gh
quality
and l
o
wer val
u
e of
harm
onic distortions,
the num
ber o
f
outp
u
t v
o
ltag
e
levels
m
u
st be increase
d
.
There
f
o
r
e, a cascade to
pol
ogy
bas
e
d
on
series
connection of basic units
is propos
ed. Figure
2 shows
the proposed cascade m
u
ltileve
l inverter. The output
voltage
o
f
t
h
e
pr
o
pose
d
ca
sca
d
e in
ve
rter is
o
b
tained
by
:
...
12
EE
E
E
oo
n
oo
(
1
)
Th
e
nu
m
b
er
of u
s
ed
I
G
BTs in pr
opo
sed cascad
e
st
r
u
ctu
r
e is
give
n
by
the
f
o
llowi
ng
relations
hi
p:
5
Nn
IGB
T
s
(
2
)
In this equation,
N
IG
B
T
represe
n
ts the num
ber o
f
used I
G
B
T
s.
In this structure, the dc voltage
sou
r
ces
m
a
gnitude
s
of eac
h
b
a
sic u
n
it are t
h
e sam
e
. For
p
r
op
ose
d
casca
d
e
inve
rter
tw
o
m
e
thods
are
p
r
esented
to generate all levels (odd a
nd ev
en
) in
th
e
ou
tpu
t
vo
ltag
e
.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
J
PEDS
I
S
SN:
208
8-8
6
9
4
A New Multilevel Inverter Structure
For
High-Power
Applications using …
(R
asoul Shalchi
Alishah)
32
0
2.
1. Fi
rst Met
h
od
In
this m
e
thod,
the
values
o
f
d
c
so
urce
s are
the sam
e
. In
the
othe
r
w
o
r
d
s,
we
have
..
.
12
EE
E
n
(3
)
Because the
va
lues of dc s
o
urces are the sa
m
e
, th
is topology is nam
e
d sy
m
m
e
tric topol
ogy.
For this
m
e
thod,
the
n
u
m
ber of
o
u
tp
ut v
o
ltage le
vels
is calculated
b
y
the f
o
llo
win
g
eq
uation:
41
Nn
l
evel
(
4
)
Figure 2.
Proposed
cascade
m
u
l
tilevel inverter structure
Whe
r
e
n
rep
r
es
ents the
n
u
m
b
er
of
basic
u
n
its in the
p
r
op
ose
d
casca
de st
ruc
t
ure.
Fr
om
(2)
and
(
4
)
,
we
ha
ve
4
1
5
NN
IGBT
l
evel
(
5
)
2.
2. Seco
nd M
e
th
od
In
t
h
i
s
m
e
t
hod,
t
h
e m
a
gni
t
u
de
s o
f
dc
vol
t
a
ge
sou
r
ces
are
o
b
t
a
i
n
ed
by
:
1
EE
(6
)
1
5
E
m
E
m
2,
3
,
mn
(
7
)
Using
t
h
is m
e
t
h
od
, th
e
nu
m
b
er
o
f
ou
tpu
t
voltag
e
lev
e
ls is calcu
l
ated
b
y
:
5
n
N
le
v
e
l
(
8
)
Evaluation Warning : The document was created with Spire.PDF for Python.
I
S
SN
:
2
088
-86
94
I
J
PED
S
Vo
l. 6,
No
.
2,
Ju
ne 20
15
:
318
–
3
25
3
21
Using
(2) and
(8
), th
e relation
b
e
tween
th
e num
b
e
r o
f
ou
tpu
t
vo
ltag
e
lev
e
ls
an
d IGBTs
will b
e
:
5
5
N
IGBT
N
le
v
e
l
(
9
)
In t
h
i
s
m
e
t
h
o
d
, t
h
e m
a
gni
t
ude
s o
f
dc s
o
u
r
ces ar
e n
o
n
-e
q
u
al
. He
nc
e, t
h
i
s
m
e
t
hod i
s
nam
e
d
asymm
e
tric confi
g
uration. It i
s
noti
ceable that Instead of dc voltage sour
c
e
s, we ca
n
use
capacitors
, fuel
cells
an
d so
on
. The vo
ltag
e
str
e
ss o
f
sw
itches
d
e
p
e
nd
s
o
n
the sum
of all dc sources
whic
h c
o
nnected t
o
special
ful
l
-
bri
dge i
n
v
e
rt
er an
d t
h
ei
r
val
u
es
are very low. T
h
erefore, this t
o
p
o
l
o
gy
can be
use
d
i
n
hi
g
h
-
p
o
w
e
r
ap
p
lication
s
.
Fig
u
re 3 shows
th
e stru
ctu
r
e of pro
p
o
s
ed
m
u
ltilev
e
l in
v
e
rter top
o
l
o
g
y
i
n
[4
]. As shown in
th
is
figu
re, th
e switch
e
s of fu
ll-brid
g
e
inv
e
rter mu
st with
stan
d
hig
h
-vo
ltag
e
. Th
en, th
is stru
ct
u
r
e is no
t su
itab
l
e for
hi
g
h
-
p
owe
r
a
p
pl
i
cat
i
ons.
Fi
gu
re
3.
The
s
t
ruct
u
r
e
of
p
r
o
pos
ed
m
u
l
t
i
l
e
vel
i
nve
rt
er t
o
p
o
l
ogy
i
n
[
4
]
3.
M
U
LTI-
CARR
IER PWM
STR
A
TEGY
The
harm
oni
cs
i
n
t
h
e o
u
t
p
ut
vol
t
a
ge
o
f
p
o
w
er el
ect
r
oni
c
con
v
e
r
t
e
rs ca
n be
re
duce
d
usi
n
g P
W
M
swi
t
c
hi
n
g
t
ech
ni
q
u
es. T
h
e wi
del
y
used m
u
l
t
i
-
carri
er P
W
M
m
e
t
hods are
k
n
o
w
n as Phase
Shi
f
t
e
d (
P
S
)
,
Phase
Dispo
s
itio
n
(PD), Ph
ase Opp
o
s
ition
Dispositio
n
(POD),
Altern
ativ
e Phase
Op
po
site Dispo
s
itio
n
(APOD),
Hyb
r
i
d
(HD) an
d
Ph
ase Sh
ift
(PS). For th
is
to
po
log
y
, phas
e
op
p
o
si
t
e
di
s
p
osi
t
i
on (P
OD
) m
u
lt
i
-
carri
er
P
W
M
m
e
thod is utilized. P
OD technique
em
ploys a num
ber of c
a
rriers
(
m-
1
) f
o
r an m
-
l
e
vel
phase wave
fo
rm
whi
c
h
are all in-phas
e
above and below the zero refe
rence
.
The
carriers are define
d with the sa
m
e
freque
ncy (
F
c
)
and am
plitude
(
A
c
)
Th
e am
pl
it
ude
o
f
t
h
e m
odul
at
o
r
i
s
de
n
o
t
ed as
(
A
m
) a
n
d t
h
e
fre
que
nc
y
(
F
m
). In m
u
lt
ilev
e
l
con
v
e
r
t
e
rs,
t
h
e
am
pl
i
t
ude m
odul
at
i
o
n i
nde
x
(
M
a
)
,
a
n
d t
h
e
fr
eq
ue
ncy
rat
i
o
(
M
f
)
are
gi
v
e
n
by
(
1
0)
a
n
d
(1
1)
,
respectively:
1
A
m
M
a
mA
c
(
1
0
)
F
m
M
f
F
c
(
1
1
)
The
s
w
i
t
c
hi
n
g
fu
nct
i
o
ns of
p
r
op
ose
d
i
nve
rt
er
are
t
h
e
n
gi
ve
n by
t
h
e use
o
f
l
ogi
cal
A
N
D
, OR
, NO
T gat
e
s.
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4
A New Multilevel Inverter Structure
For
High-Power
Applications using …
(R
asoul Shalchi
Alishah)
32
2
4.
SIMULATION REULTS
In
or
de
r t
o
val
i
d
at
e t
h
e
pr
op
o
s
ed i
n
vert
e
r
, c
o
m
put
er si
m
u
lat
i
on u
s
i
n
g M
A
TL
AB
-Si
m
ul
i
nk
has
bee
n
created
. Th
e
si
m
u
latio
n
stud
ies are carried
ou
t for 25-lev
e
l asymmetric
m
u
lti
lev
e
l in
v
e
rter. The to
tal
h
a
rm
o
n
i
c d
i
st
ortio
n
(THD) ev
alu
a
tes t
h
e qu
an
tity o
f
h
a
rm
o
n
i
c co
n
t
en
t
s
in
th
e
ou
tput wav
e
form
an
d
is a
po
p
u
l
a
r pe
rf
or
m
a
nce i
nde
x f
o
r
po
wer c
o
n
v
e
rt
ers. T
h
e asy
m
m
e
t
r
i
c
m
u
l
t
ilevel
i
nve
rt
er s
h
o
w
n i
n
Fi
g
u
r
e
3 i
s
adjuste
d
to
produce a
50-Hz, 25-le
v
el staircase wa
veform
. The parameters
selected
fo
r testing a
r
e
(a) a
n
in
du
ctiv
e lo
ad o
f
50
m
H
(b) a resistive load of 50
Ω
. T
h
e val
u
es of
voltage s
o
urce
s are
12
.5
1
EV
and
62
.5
2
EV
.
Fi
gu
re
4.
Pr
o
p
o
se
d
25
-l
evel
c
a
scade i
nve
rt
er
Tab
l
e II
sho
w
s th
e sw
itch
i
ng
states o
f
pr
oposed
25
-
l
ev
el cascad
e i
n
v
e
r
t
er
.
Table II. Switches states
for
25-le
v
el casca
de
topology.
State
Switches
State
Output
Voltage(V)
S
11
S
21
T
11
T
12
T
13
T
14
T
21
T
22
T
23
T
24
1
1
1
1 0
0 1
1 0
0 1
150
2
0
1
1 0
0 1
1 0
0 1
137.
5
3
0
1
1 1
0 0
1 0
0 1
125
…….
….
….
….
….
….
….
….
….
….
….
….
12
0
0
1 0
0 1
1 1
0 0
12.
5
13
0
0
1 1
0 0
1 1
0 0
0
14
0
0
0 1
1 0
1 1
0 0
-
12.
5
……..
….
….
….
….
….
….
….
….
…..
…..
….
23
0
1
1 1
0 0
0 1
1 0
-
125
24
0
1
0 1
1 0
0 1
1 0
-
137.
5
25
1
1
0 1
1 0
0 1
1 0
-
150
Fi
gu
re 5
sh
ow
s
t
h
e carri
e
r
s an
d t
h
e re
fere
nce
si
gnal
s
f
o
r a 2
5
- l
e
v
e
l
P
W
M
usi
n
g P
OD t
e
c
hni
que
wi
t
h
1
M
a
,
48
M
f
an
d ca
rri
er
f
r
e
que
ncy
24
0
0
H
z
.
Evaluation Warning : The document was created with Spire.PDF for Python.
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.
2,
Ju
ne 20
15
:
318
–
3
25
3
23
Figu
re
5.
The
c
a
rriers
an
d t
h
e
refe
rence
sig
n
a
l
s for a 25
- level co
nv
erter
u
s
in
g
POD tech
niq
u
e
The
output vol
t
age and c
u
rre
nt wa
ve
form
s and their co
rre
spo
n
d
i
n
g F
o
uri
e
r s
p
ect
r
u
m
s
are s
h
o
w
n i
n
Fi
gu
re
6.
THD
val
u
es
o
f
t
h
i
s
o
u
t
p
ut
v
o
l
t
age
a
n
d
cu
rr
e
n
t
based
on
si
m
u
l
a
t
i
on
r
e
sul
t
s
are %
5
.
57 an
d %0.
83
. To g
e
nerat
e
a desi
re
d
o
u
t
p
u
t
wi
t
h
best
qual
i
t
y
of t
h
e
wa
ve
fo
rm
, t
h
e nu
mb
er of th
e vo
ltag
e
lev
e
ls shou
ld
b
e
in
creased
.
(a)
(b
)
(c)
(d
)
Fig
u
re
6
.
(a) Si
m
u
la
ted
ou
tpu
t
vo
ltag
e
o
f
th
e
first stag
e
(b
) Si
m
u
l
a
t
e
d
out
put
v
o
l
t
a
ge
of
t
h
e sec
o
nd
s
t
age
(c) Si
m
u
l
a
t
e
d
out
put
v
o
l
t
a
ge and
co
rre
sp
o
n
d
i
ng Fo
u
r
i
e
r
s
p
e
c
t
r
um
(TH
D
=5
.5
7%)
(d
) Si
m
u
l
a
t
e
d
out
put
c
u
rre
nt
and
co
rre
sp
o
n
d
i
ng
Fo
u
r
i
e
r s
p
e
c
t
r
um
(TH
D
=0
.0
83
%)
5.
CO
NCL
USI
O
N
New sy
m
m
etric, asym
m
e
tric
cascade m
u
ltilevel inverte
r
t
o
p
o
l
o
gi
es wer
e
pr
op
ose
d
i
n
t
h
i
s
pape
r
.
New algo
rith
m
s
fo
r d
e
term
in
atio
n
o
f
d
c
vo
l
t
ag
e so
ur
ce m
a
g
n
itud
e
s in
t
h
e pr
opo
sed cas
cade topology
were
prese
n
t
e
d
.
Thi
s
t
echni
q
u
e p
r
ovi
des m
o
re vol
t
a
ge l
e
vel
s
wi
t
h
o
u
t
i
n
cre
a
si
ng
num
ber
of p
o
w
er el
e
c
t
r
o
n
i
c
com
pone
nts.
Multi-carrier P
W
M m
e
thod i
s
applied to
the new topol
ogy to trigger the power s
w
itches for
co
n
t
ro
lling
th
e v
o
ltag
e
lev
e
ls g
e
n
e
rated on
t
h
e ou
tpu
t
.
It was sho
w
n
t
h
at th
e presen
ted
t
o
po
log
y
can
be u
s
ed
in high-powe
r
applications
. Through sim
u
lations it
is
seen that propose
d
m
u
ltilevel conve
rter topol
ogy
gene
rat
e
s l
o
we
r
val
u
e
of
ha
rm
oni
c c
o
m
pon
en
t
s
of
l
o
a
d
vol
t
a
ge a
n
d
cu
rre
nt
.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
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4
A New Multilevel Inverter Structure
For
High-Power
Applications using …
(R
asoul Shalchi
Alishah)
32
4
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mmetric, As
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D., Hosseini
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a
hi
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witched-diod
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u
ltil
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i
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R., Nazarpour
D., Hossein
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N
ew hy
br
id structure for m
u
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e
v
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t
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fewer number o
f
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lev
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ls”,
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c
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id
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”,
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8.
[20]
Shalchi Alishah
,
R., Nazarpour
D., Hosseini,
S.H., Sab
a
hi M
., “Redu
c
tion
o
f
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Electro
n
ic Elements in
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e
l Conv
erters Using
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e
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u
cture
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,
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r
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BIOGRAP
HI
ES OF
AUTH
ORS
Rasoul Shalc
hi Alishah
was born in Alishah,
Iran,
in 1989
.
H
e
received the B.Sc.
d
e
gree in
Power electrical engineering
fro
m the Azad
Univ
ersity
of
Tabr
iz,
Tabriz, Iran
,
in 2011and th
e
M.Sc. d
e
gree in
power electric
al
engineering
fro
m Urmia Univer
sity
, Urmia, Ir
an
, in
2013.
His current
research
inter
e
sts in
clude pow
er
electroni
c conv
erters, m
u
ltil
evel
converters, Z-
source and
matrix conver
t
ers, Application
of Po
wer Electronics in
Renewab
l
e
Energ
y
S
y
stems,
Harmonics and Power Quality
.
Since
2014, he
has been a member of the
Ir
an
's National
Eli
t
es
Foundation (INEF). He is the author
of more than 20 journal and
conference pap
e
rs. Also, he is a
reviewer
and
Ed
itoria
l
Bo
ard m
e
m
b
er
of sever
a
l
i
n
terna
tiona
l jou
r
nals.
Evaluation Warning : The document was created with Spire.PDF for Python.
I
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:
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94
I
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S
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l. 6,
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.
2,
Ju
ne 20
15
:
318
–
3
25
3
25
Se
y
e
d Hosse
in Hosse
ini
was bo
rn in Mar
a
nd, Ir
an,
in 1953
. He
received
the M.S. degree from
the Faculty
of
Engineering University
of
Tabr
iz, Iran in19
76, the DEA degree from INPL,
France, in
1978
and th
e Ph.D. degree f
r
om INPL, Fr
ance, in
1981
all
in electr
i
cal engineer
ing.
In 1982, h
e
join
ed th
e University
of
Tabriz, I
r
an
,
as
an Assistant Professo
r in th
e Department of
Electrical
Engin
eer. From 1990 to 1995, he was an
Associate Professor in the University
of
Tabriz. Since 19
95, hehas been P
r
ofessor in the De
partment of ElectricalE
ngineer, University
of
Tabri
z
. From
Sept. 1990 to S
e
pt. 1991, h
e
was
visiting pr
ofessor in the
Universit
y
of
Queensland, Au
strali
a. From
Sept. 1996 to Sept
. In 1997, he was visiting professor in the
Unive
r
sity
of We
ste
r
n Ontario
,
Canada.
His research interests includ
e Power Electronic
Converters, Matrix Converters
,
Active&H
y
br
id
Filters, Appl
ica
t
i
on of Power Ele
c
troni
cs
in Rene
wable En
erg
y
System
s and E
l
ec
tri
fi
e
d
Ra
ilway
S
y
s
t
em
s
,
Re
act
i
v
e P
o
wer Contro
l, Harm
onics
an
d P
o
wer Qualit
y Com
p
ens
a
tion
S
y
s
t
em
s
s
u
ch as
SVC,
UPQC,
FACT
Sde
v
ic
e
s
.
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