Inter
national
J
our
nal
of
P
o
wer
Electr
onics
and
Dri
v
e
Systems
(IJPEDS)
V
ol.
12,
No.
4,
December
2021,
pp.
1953
1965
ISSN:
2088-8694,
DOI:
10.11591/ijpeds.v12.i4.pp1953-1965
r
1953
Series
F
A
CTS
contr
ollers
in
industrial
lo
w
v
oltage
electrical
distrib
ution
netw
orks
f
or
r
educing
fault
curr
ent
le
v
els
V
ishnu
Charan
Thippana
1
,
Ali
v
elu
Manga
P
arimi
2
,
Chandram
Karri
3
1
Deputy
General
manager
,
T
ata
Projects,
Hyderabad,
T
elang
ana,
India
2
Department
of
Electrical
and
Electronics
Engineering,
BITS
Pilani,
Hyderabad
campus,
Hyderabad,
T
elang
ana,
India
3
Department
of
Electrical
and
Electronics
Engineering,
BITS
Pilani,
Goa
campus,
GO
A,
India
Article
Inf
o
Article
history:
Recei
v
ed
Jun
18,
2020
Re
vised
Mar
26,
2021
Accepted
Aug
28,
2021
K
eyw
ords:
F
A
CTS
F
ault
current
Lo
w
v
oltage
switchgear
Motor
control
centre
Static
synchronous
series
compensator
Th
yristor
control
series
capacitor
ABSTRA
CT
In
this
paper
,
series
Fle
xible
A
C
transmission
systems
(F
A
CTS)
de
vices
lik
e
Th
yristor
control
series
capacitor
(TCSC)
and
Static
synchronous
series
compensator
(SSSC)
with
designed
control
logic
used
to
reduce
the
f
ault
current
located
in
L
V
distrib
ution
netw
ork
at
the
L
V
b
usbar
.
The
electrical
distrib
ution
netw
ork
in
small
and
medium
scale
industries
such
as
steel
plants,
process
and
po
wer
plant
s
is
through
lo
w
v
oltage
switchgear
(L
VS)
fed
from
motor
control
centre
(MCC)
switchgear
through
step
do
wn
transformer
of
11kV
or
33kV
/415V
.
The
designed
switchgear
in
the
L
V
side
for
these
utilities
usually
is
at
50kA.
Ho
we
v
er
,
the
process
loads
are
continuously
increasing
and
sustained
with
additional
feeders
with
the
e
xisting
switchgear
.
Consequently
,
the
f
ault
current
at
the
b
usbar
of
the
switchgear
increases
which
may
require
the
replacement
of
entire
switchgear
to
the
ne
w
design
f
ault
current.
Ho
we
v
er
,
upgrading
the
e
xisting
switchgear
is
not
a
n
economical
solution
to
the
industries.
Alternati
v
ely
reducing
the
f
ault
current
at
the
b
us
bar
is
feasible.
Controller
design
implemented
for
reducing
the
short
circuit
current
with
series
F
A
CTS
de
vices.
A
study
carried
on
800MW
Thermal
po
wer
plant
Ash
handling
L
VS
in
ET
AP
and
Matlab
.
It
is
observ
ed
that
the
results
are
encouraging
to
use
series
F
A
CTS
de
vices
ef
fecti
v
ely
in
the
L
VS.
This
is
an
open
access
article
under
the
CC
BY
-SA
license
.
Corresponding
A
uthor:
Chandram
Karri
Department
of
Electrical
and
Electronics
Engineering
BITS
Pilani,
Goa
campus
GO
A,
India
Email:
chandramk2006@gmail.com
1.
INTR
ODUCTION
Industrial
plants
are
fed
from
33
kV/11
kV
utilities
feeder
and
v
oltage
is
step
do
wn
through
a
dist
ri-
b
ution
transformer
to
lo
w
v
oltage
(L
V)
of
415
V
.
This
v
oltage
is
pro
vided
to
dif
ferent
process
loads
from
load
centers
through
motor
control
centre
(MCC)
and
switchgear
arrangement
consisting
of
circuit
break
ers,
fuses,
protection
equipment,
and
metering
boards.
The
transformers
supply
to
the
L
V
panel
which
distrib
utes
po
wer
to
the
total
demand
of
the
group
of
loads
in
the
industries
as
sho
wn
in
Figure
1.
A
short-circuit
or
f
ault
current
rating
determines
the
interrupting
capability
of
the
switchgear
and
the
mechanical
strength
of
the
bracing
and
support
systems.
The
load
b
us
f
ault
current
mainly
depends
on
impedance
and
load
currents
of
source
transformer
.
Switchgear
f
ault
le
v
el
and
distrib
ution
transformer
impedance
are
sized
to
meet
the
designed
f
ault
le
v
el
of
50
kA
under
normal
loading
conditions.
Ho
we
v
er
,
loads
of
industries
and
capacities
of
the
Plants
are
e
xpanding
as
per
the
demand
in
the
Indian
mark
et.
Due
J
ournal
homepage:
http://ijpeds.iaescor
e
.com
Evaluation Warning : The document was created with Spire.PDF for Python.
1954
r
ISSN:
2088-8694
to
addition
of
loads
the
b
us
f
ault
current
will
increase
be
yond
of
designed
v
al
ue
of
50
kA.
A
consequence
of
increased
f
ault
is
sho
wn
in
Figure
2.
Figure
1.
Lo
w
v
oltage
side
electrical
distrib
ution
system
with
and
without
F
A
CTS
de
vice
Figure
2.
Ef
fect
of
f
ault
current
on
switchgear
Thus
the
electrical
distrib
ution
netw
ork
is
to
be
readjusted
without
ef
fecting
e
xisting
circuit
designed
parameters.
As
a
general
industrial
practice,
plant
o
wners
recommend
to
replace
the
switchgear
to
meet
the
f
ault
current
le
v
el
and
occasionally
the
source
transformer
should
be
upgraded.
Fle
xible
A
C
transmission
systems
(F
A
CTS)
[1],
[2]
de
vices
ha
v
e
been
implemented
and
follo
wing
are
some
research
papers
describing
the
methodology
for
reduction
of
f
ault
current.
2.
LITERA
TURE
SUR
VEY
F
A
CTS
[3]
de
vices
can
re
gulate
acti
v
e
and
reacti
v
e
po
wer
as
well
as
v
oltage
magnitude.
Pl
acement
of
these
de
vices
in
suitable
locat
ion
can
lead
to
the
control
of
the
po
wer
flo
w
,
b
us
v
oltage
and
short
circuit
[3].
characteristics
of
a
f
ault
current
limiter
wit
h
series
compensation
is
pro
vided
in
[4].
UPFC
[5],
[6]
is
a
series
and
shunt
combination
F
A
CTS
de
vice,
and
it
is
applicable
for
high
v
oltage
lines.
F
ault
current
limiter
is
used
in
11
kV
and
3.3
kV
system,
and
it
is
not
an
F
A
CTS
de
vice
it
is
a
nonlinear
reactor
added
in
a
circuit
to
limit
the
f
ault
current
as
this
reactor
is
added
in
series
with
the
circuit
there
is
a
v
oltage
drop.
F
or
compensating
v
oltage
static
v
ar
compensation
(SVC)
is
connected
parallel
to
the
circuit.
Static
Synchronous
Series
Compensator
[7]-
[9]
has
been
used
for
f
ault
current
limit.
A
no
v
el
h
ybrid
current-limiting
circuit
break
er
for
medium
v
oltage
is
presented
in
[10],
[11].
Solid-state
ci
rcuit
break
ers
and
current
limiters
are
used
in
[12].
A
series
compensator
with
f
ault
current
limiting
function
is
gi
v
en
in
[13].
F
ault
current
limiter
by
series
connected
v
oltage
source
in
v
erter
is
pro
vided
in
[14].
A
series
connected
VSC
[15]
has
b
e
en
used
for
limiting
the
f
ault
current.
a
Ne
w
Dual
Functional
Series
Compensator
[16]
is
applied
to
limit
short
circuit
current.
In
this
paper
,
P
article
sw
arm
optimisation
[17]
method
as
proposed
to
find
optimal
location
with
short
circuit
le
v
el
and
losses.
Optimal
location
can
be
deri
v
ed
based
on
losses,
as
short
circuit
mainly
depends
on
loading
of
the
line
and
source,
with
this
approach
short
circuit
limit
is
not
clearly
described
and
also
in
this
grid
netw
ork
is
proposed
for
lo
w
v
oltage
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
12,
No.
4,
December
2021
:
1953
–
1965
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
r
1955
distrib
ution
application
is
not
discussed
in
this
approach.
Cascaded
H-bridge
distrib
ution-static
synchronous
series
compensator
[18]
has
been
deplo
yed
for
finding
the
short
circuit
current.V
arious
adv
antages
of
TCSC
discussed
[19]
i
nterms
of
po
wer
flo
w
control
and
f
ault
current
reduction.
F
A
CTS
based
f
ault
current
limiter
is
used
in
thermal
po
wer
netw
ork,
and
de
vice
used
in
this
paper
is
th
yristor
protected
series
capacitor
(TPSC)
based
short
circuit
current
limiter
(SCCL)
[20].
In
this
paper
SCCL
is
connected
in
400
kV
and
230
kV
v
oltage
le
v
el.
And
results
are
compared
with
50kA
short
circui
t
limit.
TCSC
wil
l
be
used
for
both
po
wer
flo
w
controller
as
well
as
short
circuit
limiter
during
f
aults.
Unified
po
wer
flo
w
controller
(UPFC)
is
used
as
f
ault
current
limiter
[21],
in
this
approach
predefined
impedance
are
added
series
to
the
line
to
limit
the
f
ault
current.
F
ault
Current
Limiter
and
SVC
are
used
for
short
circuit
c
u
r
ret
analysis
in
[22].Inter
line
po
wer
flo
w
controller
(IPFC)
w
as
used
to
reduce
f
ault
current
[23],
[24]
in
this
tw
o
parallel
operation
of
transformer
considered
to
apply
IPFC
in
a
circuit.
2.1.
Obser
v
ations
and
moti
v
ation
Distrib
ution
static
series
compensator
(DSSC)
is
used
as
a
f
ault
current
limiter
in
distrib
ution
l
ine
along
with
shunt
connected
ST
A
TCOM.
DSSC
and
ST
A
TCOM
is
used
to
reduce
the
v
oltage
during
the
f
ault
condition.
As
per
abo
v
e
dif
ferent
research
papers
described,
f
ault
current
limitation
of
series
F
A
CTS
de
vices
are
more
ef
fecti
v
e
in
high
v
oltage
and
me
d
i
um
v
oltage
le
v
els.
In
this
paper
utilization
of
series
F
A
CTS
de
vices
in
415V
distri
b
ut
ion
for
limiting
f
ault
current
belo
w
design
f
ault
current
v
alue
is
described
with
pre-defined
f
ault
current
settings
controller
as
per
Indian
standards.
And
also
this
paper
describes
the
location
of
series
F
A
CTS
de
vices
in
L
V
switchgear
for
ef
fecti
v
e
control
of
acti
v
e
and
reacti
v
e
po
wer
control
in
addition
to
f
ault
current
limitation.
2.2.
Contrib
utions
Series
F
A
CTs
de
vices
are
modelled
in
ET
AP
and
MA
TLAB.
Controller
design
is
implemented
for
reducing
the
short
circuit
current.
The
control
strate
gy
with
series
F
A
CTs
de
vices
ha
v
e
been
applied
to
800
MW
Thermal
po
wer
plant
Ash
handling
unit.
Simulation
results
are
pro
vided.
2.3.
Or
ganization
The
series
F
A
CTS
controllers
ha
v
e
been
de
v
eloped
in
ET
AP
and
MA
TLAB.
The
rest
of
the
article
is
as
follo
ws:
section
2
pro
vides
the
information
of
series
F
A
CTs
de
vices
such
as
TCSC
and
SSSC,
mathematical
modelling
of
these
de
vices
are
gi
v
en
in
section
3,
controller
design
for
TCSC
and
SSSC
are
gi
v
en
section
4,
case
studies
are
pro
vided
in
section
5
and
finally
conclusions
are
gi
v
en
in
the
last
section.
3.
SERIES
F
A
CTS
CONTR
OLLER
T
w
o
series
F
A
CTS
controller
named
TCSC
and
SSSC
are
described
in
this
paper
.
Characteristics
of
F
A
CTS
de
vice
are
described
as
sho
wn
in,
3.1.
Th
yristor
contr
ol
series
capacitor
(TCSC)
Th
yristor
control
series
capacitor
(TCSC)
is
sho
wn
in
Figure
3.
Figure
3.
TCSC
schematic
diagram
F
or
achie
ving
continuous
control
through
the
series
compensation,
th
yristor
control
reactor
(TCR)
is
used
in
parallel
with
fix
ed
capacitor
.
The
TCSC
is
connected
in
series
with
the
load
circuit
to
obtain
desired
Series
F
A
CTS
contr
oller
s
in
industrial
low
volta
g
e
electrical
distrib
ution
...
(V
ishnu
Char
an
Thippana)
Evaluation Warning : The document was created with Spire.PDF for Python.
1956
r
ISSN:
2088-8694
v
oltage
rating
and
operating
characteristi
cs.
The
basic
requirement
of
TCSC
scheme
is
to
pro
vide
a
contin-
uously
v
ariable
capacitance
by
means
of
partially
cancelling
the
ef
fecti
v
e
compensating
capacitance
by
the
TCR.The
TCR
at
the
fundamental
system
frequenc
y
is
a
continuously
v
ariable
reacti
v
e
impedance,
control-
lable
by
delay
angle
,
the
steady
state
impedance
of
the
TCSC
is
that
of
a
parallel
LC
circuit,
consisting
of
a
fix
ed
capaciti
v
e
impedance,
X
C
,
and
a
v
ariable
inducti
v
e
impedance,
X
L
(
)
,
that
is
sho
wn
in
(1).
X
T
C
S
C
(
)
=
X
C
X
L
(
)
X
L
(
)
X
C
(1)
The
delay
angle
measured
from
the
crest
of
the
capacitor
v
ol
tage.
The
TCSC
thus
presents
a
tunable
parallel
LC
circuit
to
the
line
current
that
is
substantially
a
constant
altering
current
source.
As
the
impedance
of
the
controlled
reactor
,
X
L
(
)
,is
v
aried
from
its
maximum
(infinity)
to
w
ards
its
minimum
!
L
,
the
TCSC
increases
its
minimum
capaciti
v
e
impedance,
X
T
C
S
C
;min
=
X
C
=
1
!
C
(this
mode
is
kno
wn
as
capaciti
v
e
compensation).
Decreasing
X
L
(
)
further
,
the
impedance
of
the
TCSC,
becomes
inducti
v
e.
Therefore
with
the
usual
TCSC
arrangement
in
which
the
impedance
of
the
TCR
reactor
is
smaller
than
that
of
the
capacitor
.
The
characteristics
[11],
[12]
of
TCSC
are
sho
wn
in
Figure
4.
When
e
v
er
a
f
ault
appears
in
the
system,
TCSC
senses
the
lo
w
v
oltage
and
firing
angle
mode
changes
to
operate
in
inducti
v
e
re
gion
to
add
additional
impedance
in
the
circuit.
Figure
4.
Characteristics
of
TCSC
3.2.
Static
synchr
onous
series
compensator
(SSSC)
The
SSSC
is
a
series
com
p
e
nsation
de
vice
of
the
F
A
CTS
f
amily
using
po
wer
electronic
based
v
oltage
source
con
v
erter
and
DC
link
to
control
the
po
wer
flo
w
in
transmission
line.
It
can
control
the
v
oltage
at
the
b
us
as
well
as
acti
v
e
po
wer
in
a
transmission
line
and
further
impro
v
es
the
transient
stability
[13],
[14].
T
ypical
single
line
diagram
of
SSSC
is
indicated
in
Figure
5
where
the
SSSC
is
connected
in
series
to
the
load.
Depending
on
load
demand
SSSC
will
inject
a
v
oltage
in
a
respecti
v
e
line
or
b
us
to
control
the
po
wer
in
order
to
compensate
additional
load
requirement
in
a
lo
w
v
oltage
distrib
ution
netw
ork.
As
sho
wn
in
Figure
6
simplified
diagram
of
series
compensation
with
the
phasor
diagram,
where
V
s
is
the
sending
v
oltage,
V
r
is
the
recei
ving
v
oltage,
V
se
is
the
series
injected
v
oltage
of
the
SSSC,
V
1
is
the
v
oltage
drop
across
the
Line
impedance
and
is
the
phase
dif
ference
between
V
s
and
V
r
.
Figure
5.
SSSC
single
line
representation
Figure
6.
Phasor
diagram
of
SSSC
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
12,
No.
4,
December
2021
:
1953
–
1965
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
r
1957
Line
impedance
and
is
the
phase
dif
ference
between
V
s
and
V
r
.
The
SSSC
can
be
stated
that
depending
on
increased
load
demand,
the
series
v
oltage
injected
by
the
SSSC
is
in
phase
with
the
generated
v
oltage.
It
increases
the
v
oltage
across
the
transmission
line
and
thus
increases
the
corresponding
line
current
and
transmitted
po
wer
.
During
f
ault
conditions
controller
se
n
s
es
the
lo
w
v
oltage
on
f
aulted
b
us
and
pro
vides
injection
of
v
oltage
in
the
opposite
direction
of
generated
v
o
l
tage,in
this
re
gion
it
operates
in
inducti
v
e
mode
of
operation
and
net
ef
fecti
v
e
current
will
be
reduced.
The
SSSC
controls
f
ault
current,
impro
v
es
v
oltage
stability
,
pro
vides
po
wer
oscillation
damping
and
acts
as
a
f
ault
current
limiter
.
Simplified
impedance
netw
ork
of
SSSC
for
3
phase
f
ault
is
sho
wn
in
Figure
7.
Figure
7.
Simplified
Impedance
netw
ork
for
3
phase
f
ault
4.
MA
THEMA
TICAL
MODELS
4.1.
Mathematical
model
with
sour
ce
transf
ormer
Mathematical
model
for
short
circuit
current
of
a
typical
source
transformer
connected
to
a
swit
chgear
sho
wn
in
Figure
5
is
deri
v
ed
as
per
belo
w
.
Consider
a
3
phase
f
ault
at
the
b
us,
simplifying
the
Figure
7
netw
ork
which
can
be
represented
as
the
netw
ork
sho
wn
in
Figure
8.
Figure
8.
Simplified
Impedance
netw
ork
for
3
phase
f
ault
Solving
impedance
netw
ork
for
finding
I
S
C
and
gi
v
en
in
(2)
and
(3).
Z
S
C
=
Z
L
Z
T
Z
L
+
Z
T
(2)
I
sc
=
E
1
:
732
Z
S
C
(3)
Using
the
as
sho
wn
(3),
the
f
ault
current
at
b
us
can
be
calculated.
Bus
f
ault
current
mainly
depends
on
the
source
transformer
impedance.
Ho
we
v
er
,
load
impedance
is
process
oriented
and
it
cannot
be
controlled.
F
or
an
y
change
in
f
ault
current
at
the
load
b
us,
it
is
required
to
select
the
transformer
impedance
appropriately
so
as
to
reduce
the
f
ault
current
to
the
desired
le
v
el.
4.2.
Mathematical
model
of
TCSC
The
s
ingle
line
diagram
of
distrib
ution
netw
ork
with
TCSC
is
sho
wn
in
Figure
9.
During
normal
operation
TCSC
acts
lik
e
a
compensation
de
vice
by
impro
ving
v
olt
age
profile
at
b
us
and
also
it
compensates
the
reacti
v
e
po
wer
by
pro
viding
additional
current
to
the
load
without
af
fecting
the
source
parameters.
TCSC
operates
in
capaciti
v
e
mode
and
current
flo
ws
to
the
load
as
sho
wn
in
Figure
10.
Series
F
A
CTS
contr
oller
s
in
industrial
low
volta
g
e
electrical
distrib
ution
...
(V
ishnu
Char
an
Thippana)
Evaluation Warning : The document was created with Spire.PDF for Python.
1958
r
ISSN:
2088-8694
Figure
9.
TCSC
connection
in
distrib
ution
netw
ork
Figure
10.
Impedance
netw
ork
of
TCSC
During
this
mode
currents
at
b
us
are
added
as
so
that
the
current
will
be
impro
v
ed.
Figure
11
depicts
the
f
ault
condition.
During
the
f
ault
condition,
sensing
no
v
oltage
at
b
us
and
hi
gh
current
flo
w
,
controller
of
TCSC
operate
in
inducti
v
e
re
gion
as
sho
wn
in
Figure
12.
Figure
11.
3
Phase
f
ault
at
b
us
with
TCSC
Figure
12.
Inducti
v
e
mode
of
operation
of
TCSC
In
this
re
gion,
net
current
flo
ws
will
be
reduced
and
required
current
will
be
controlled
with
and
the
ef
fect
of
f
ault
current
will
be
reduced.
As
per
abo
v
e
schema
tics,
the
f
ault
current
at
b
us
is
represented
as
sho
wn
in
(5)
I
C
=
I
L
I
T
C
R
(4)
I
F
=
I
C
+
I
Load
(5)
W
ith
the
TCSC
operation
during
f
ault
condition
as
in
inducti
v
e
reason
the
net
f
ault
current
will
be
reduced
with
controlling
current.
During
f
ault
conditions,
the
operation
of
TCSC
is
in
an
inducti
v
e
re
gion
so
that
the
net
f
ault
current
will
be
reduced
by
controlling
the
current,
I
T
C
R
.
4.3.
Mathematical
model
of
SSSC
In
Figure
13,
V
se
,
j
X
se
are
series
injected
v
oltage
and
reactance
of
SSSC
and
V
sef
f
is
a
SSSC
self-
b
us
v
oltage
connected
between
source
v
oltage
and
load
v
oltage,
j
X
L
is
the
line
reactance.
Assuming
f
ault
occurs
at
load
b
us,
during
f
ault
condition
the
current
at
respecti
v
e
b
us
starts
increasing
and
v
oltage
of
the
same
starts
decreasing.
At
this
time
feedback
to
controller
change
the
firing
angle
in
order
to
shift
SSSC
to
inducti
v
e
mode
of
operation,
considering
firing
angle
changes,
SSSC
starts
injecting
v
oltage
in
the
opposite
direction
of
generated
v
oltage
,
as
a
result
net
f
ault
current
will
be
reduced
com
in
comparison
to
the
case
without
using
SSSC.
Figure
13,
to
find
f
ault
current
I
F
.
From
the
(8)
the
contrib
ution
of
f
ault
current
of
source
E
1
is
reduced
due
to
series
v
oltage
injection
of
V
se
1
with
this
f
ault
current
can
be
minimized.
From
this
model
it
can
be
observ
ed
that
SSSC
can
be
utilized
to
impro
v
e
v
oltage
and
support
sudden
changes
of
load
in
a
line
and
also
it
can
minimize
f
ault
current
SSSC
can
limit
the
short
circuit
due
to
f
ault
in
b
us.
Figure
13.
SSSC
single
line
diagram
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
12,
No.
4,
December
2021
:
1953
–
1965
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
r
1959
V
1
=
V
se
+
I
se
j
X
se
+
V
sef
f
(6)
I
F
=
I
se
+
I
L
(7)
I
se
=
V
1
V
se
V
sef
f
j
X
se
(8)
5.
CONTR
OLLER
LOGIC
FOR
INJECTION
OF
V
OL
T
A
GE
The
main
function
of
the
controller
is
to
inject
the
v
oltage
as
per
the
f
ault
current
at
the
b
us.
Th
i
s
controller
w
orks
only
when
the
f
ault
le
v
el
seen
by
the
current
transformer
(CT),
is
greater
than
50
KA
and
as
per
required
ratio,
v
oltage
will
be
injected
into
the
circuit
with
phase
shift
to
achie
v
e
inducti
v
e
mode
of
operation.
As
sho
wn
in
Figure
14,
as
a
cl
osed
indirect
controller
which
consists
of
pre-defined
functional
blocks
with
reference
to
load
current.
Assuming
losses
at
DC
end
is
minimal
and
V1
and
V2
are
source
and
load
v
oltages,
VDC
is
generally
1/3rd
of
the
source
v
oltage
and
the
same
v
oltage
will
be
injected
in
series
for
compensation.
Assuming
3
phase
f
ault
at
load
end
and
the
f
ault
current
is
greater
than
design
f
ault
current
of
50
kA,
and
v
oltage
of
load
end
on
that
time
as
almost
zero,
and
threshold
limit
is
pro
vided
to
0.4
V2,
during
this
condition
Ki
is
the
injection
f
actor
with
-1,
due
to
this
f
actor
firing
pulse
generated
will
be
more
than
-90o
and
its
injection
v
oltage
will
be
in
–v
e
direction
of
generation
v
oltage0.
In
addition,
the
required
v
oltage
to
be
injected
in
the
ratio
of
f
ault
current
reduction,
this
will
be
achie
v
ed
with
Kf
f
actor
which
is
the
ratio
of
load
current
(IL)
and
designed
f
ault
current
of
50
kA.
Re
writing
the
(6),
with
minimum
losses
across
the
capacitor
VDC
=
V
inj.
Vse
is
V
inj
v
oltage
and
net
ef
fecti
v
e
current
will
be
reduced
belo
w
designed
f
ault
current.
The
same
control
logic
will
be
represented
for
TCSC
as
sho
wn
in
Figure
15.
V
1
=
K
f
V
inj
+
I
F
j
X
se
(9)
I
F
=
V
1
K
f
V
inj
j
X
se
(10)
Figure
14.
Control
schematic
diagram
for
SSSC
Series
F
A
CTS
contr
oller
s
in
industrial
low
volta
g
e
electrical
distrib
ution
...
(V
ishnu
Char
an
Thippana)
Evaluation Warning : The document was created with Spire.PDF for Python.
1960
r
ISSN:
2088-8694
Figure
15.
Control
schematic
diagram
for
TCSC
6.
RESUL
TS
AND
DISCUSSION
Simulation
is
carried
for
dif
ferent
case
studies
and
results
are
compared.
The
case
studies
are
consid-
ered
as
per
belo
w
.
Case-1
In
this
case
f
ault
current
is
calculat
ed
for
normal
industrial
load
distrib
ution
MCC
switchgear
.
F
or
this
case
loads
are
considered
at
800MW
po
wer
plant
Ash
handling
(AHP)
unit
MCC
L
V
switchgear
po
wer
distrib
ution
board.
Short
circuit
calculation
is
performed
in
ET
AP
.
F
or
this
model
source
trans-
former
impedance
is
considered
as
per
IS
1180-2014
[25].
Case-2
From
the
abo
v
e
case-1
analysis
short
circuit
current
reduction
methodology
is
applied
by
increas-
ing
transformer
impedance.
Case-3
TCSC
is
introduced
in
series
with
the
circuit
and
short
circuit
analysis
is
performed
with
SIMULINK
model.
Case-4
Introduced
SSSC
in
series
is
introduced
with
the
circuit
and
short
circuit
analysis
performed
with
ET
AP
and
SIMULINK
model.
F
or
all
abo
v
e
cases,
results
are
compared
with
and
without
series
F
A
CTS
de
vices.
6.1.
Case-1
normal
industrial
load
distrib
ution
MCC
switchgear
As
per
load
distrib
ution
sho
wn
in
Figure
16,
the
source
transformer
is
feeding
to
the
load
which
is
connected
to
MCC
switchgear
.
Source
transformer
rating
is
arri
v
ed
as
per
load
condition
and
its
process
oper
-
ating
conditions.
In
this
case
transformer
impedance
is
considered
as
6.25
%
as
per
IS
1180-2014
condition.
Generally
,
design
will
be
carried
for
the
w
orst
operation
condition
as
single
transformer
operating
with
b
us
coupler
closed
condition.
In
this
operating
condition
ET
AP
short
circuit
analysis
is
performed
considering
3
phase
f
ault
at
switchgear
b
us,
and
results
are
as
indicated
in
belo
w
Figure
17.
Figure
16.
Single
line
diagram
of
AHP
MCC
switchgear
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
12,
No.
4,
December
2021
:
1953
–
1965
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
r
1961
As
per
calculations
and
ET
AP
analysis
f
ault
current
at
b
us
f
aults
reaches
68.1kA.
Standard
Lo
w
v
olt-
age
(L
V)
switchgear
is
a
v
ailable
for
50
kA
f
ault
le
v
el
or
65kA
f
aul
t
le
v
el.By
increasing
f
ault
current
capacity
at
b
us
the
cost
of
L
V
switchgear
increases.
Alternati
v
e
methods
to
reduce
the
f
ault
current
to
a
less
v
alue
than
50
kA
are
by
increasing
the
impedance
of
the
transformer
or
distrib
ute
the
load
with
another
set
of
transformer
.
The
second
approach
which
adding
of
an
additional
transformer
is
not
an
economical
solution.
Figure
17.
ET
AP
Short
circuit
analysis
for
AHP
MCC
6.2.
Case-2
From
the
abo
v
e
analysis,
to
reduce
f
ault
current,
one
of
the
methods
can
be
adopted
is
incre
asing
the
impedance
of
the
transformer
,
reducing
the
f
ault
current
up
to
desired
le
v
el.
As
sho
wn
in
Figure
18,
the
transformer
impedance
increased
from
6.25
%
to
10
%,
results
in
b
us
f
ault
current
reduces
to
48.5kA,
which
is
less
than
designed
f
ault
current
of
50
kA.The
disadv
antages
of
increasing
impedance
of
transformer
are,
v
oltage
drop
increases
and
design
of
transformer
has
to
be
changed
to
suit
permiss
ible
losses
with
increased
impedance,
with
the
ef
fect
of
increased
impedance
cost
of
the
trans
former
also
increases.
It
is
suggested
to
ha
v
e
series
F
A
CTS
de
vices
in
a
netw
ork
for
utilizing
multiple
ef
fects.
Among
these
ef
fecti
v
e
use
is
to
reduce
f
ault
current
at
the
b
us,
the
same
is
described
in
the
belo
w
case
studies.
The
disadv
antages
of
increasing
the
transformer
impedance
are:
V
oltage
drop
increases
T
ransformer
design
has
to
be
modified
to
suit
the
permissible
losses.
Cost
of
the
transformer
also
increases
T
o
o
v
ercome
these
demerits,
it
is
suggest
ed
to
include
series
F
A
CTS
de
vices
in
a
netw
ork
in
order
to
serv
e
multiple
needs
of
the
netw
ork.
Figure
18.
ET
AP
Short
circuit
analysis
for
increased
transformer
percentage
impedance
Series
F
A
CTS
contr
oller
s
in
industrial
low
volta
g
e
electrical
distrib
ution
...
(V
ishnu
Char
an
Thippana)
Evaluation Warning : The document was created with Spire.PDF for Python.
1962
r
ISSN:
2088-8694
6.3.
Case-3
From
the
abo
v
e
case-1
model
simulated
in
Simulink,
the
results
are
sho
wn
in
belo
w
Figure
19
The
f
ault
current
obtained
in
Simulink
model
is
65kA.
Including
the
ef
fect
of
TCSC
in
the
same
model
adding
in
TCSC
in
series
as
sho
wn
in
Figure
20.
TCSC
connected
as
a
part
of
L
V
switchgear
and
f
ault
is
created
at
L
V
switchgear
b
us.
From
the
results
it
is
sho
wn
in
Figure
21,
that
when
there
is
a
series
TCSC
de
vice
is
added
in
a
distrib
ution
netw
ork,
the
f
ault
current
is
reduced
to
45kA
and
it
is
lo
wer
than
the
design
f
ault
current
of
L
V
switchgear
i.e.
50
kA.
Figure
19.
Bus
f
ault
current
without
F
A
CTS
de
vice
Figure
20.
Simulink
model
with
TCSC
for
AHP
MCC
Figure
21.
Bus
f
ault
current
with
TCSC
de
vice
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
12,
No.
4,
December
2021
:
1953
–
1965
Evaluation Warning : The document was created with Spire.PDF for Python.