Int
ern
at
i
onal
Journ
al of
P
ower E
le
ctr
on
i
cs a
n
d
Drive
S
ystem
(I
J
PE
D
S
)
Vo
l.
11
,
No.
3
,
Septem
be
r
2020
, pp.
142
3
~
1429
IS
S
N:
20
88
-
8694
,
DOI: 10
.11
591/
ij
peds
.
v
1
1
.i
3
.
pp
142
3
-
1429
1423
Journ
al h
om
e
page
:
http:
//
ij
pe
ds
.i
aescore.c
om
THD pe
rform
ance of si
ngle p
has
e five le
vel i
nvert
er usin
g
proporti
onal r
esona
nt an
d harm
onic c
om
pensators c
urre
nt
contr
oller
Ab
d
ull
ah
M
ohamed
,
S
uria
na
Sa
li
mi
n
Gree
n
and
Sus
tainable
En
erg
y
F
ocus
Group (GSEnergy
), Fac
u
lt
y
of
E
lectr
i
ca
l
an
d
Elec
tron
ic E
ng
ine
er
ing, Unive
r
siti
Tun
Hus
sein
On
n
Mala
ysi
a
(UT
HM
)
,
Mala
ysi
a
Art
ic
le
In
f
o
ABSTR
A
CT
Art
ic
le
history:
Re
cei
ved
Ja
n
1
0
, 2
020
Re
vised
M
a
r
1
2,
2020
Accepte
d
Apr
3,
2020
Thi
s
pap
er
obs
erv
e
the
total
h
arm
oni
c
distor
tion
(
THD
)
per
f
orma
nc
e
of
single
phase
fi
ve
le
v
el
inve
r
t
er
using
propo
rti
onal
resona
n
t
(PR)
and
har
monic
com
p
e
nsators
cur
r
ent
c
ontrol
ler.
Th
e
T
HD
when
add
in
g
PR
cur
ren
t
cont
roller
was
1.
6%
at
first
.
A
fte
r
m
ore
fun
ct
i
ons
were
add
ed
to
th
e
PR
cur
ren
t
con
trol
l
e
r
to
r
educe
th
e
T
HD
at
th
e
3
rd
,
5
th
and
7
th
har
m
onic
ord
ers,
t
he
THD
of
th
e
3
rd
har
mon
ic
o
r
der
was
r
educ
ed
from
0
.
45%
to
0.
1%
whil
e
the
5
th
and
7
th
har
monic
ord
e
rs
were
red
u
ce
d
from
0
.
6%
an
d
0.
43%
to
0.
25%
and
0.
4%
respe
c
ti
ve
ly.
Th
e
dev
el
o
pm
ent
a
nd
simul
a
ti
on
is
per
forme
d
using
Matlab/Si
mul
ink.
Th
e
si
mul
ation
r
esult
is
per
form
ed
by
using
Fast
Fourier
Tr
ansfor
m
an
al
ysis (FF
T
)
for
th
e
h
arm
on
i
cs
ca
p
ture
d
.
Ke
yw
or
d
s
:
Five level i
nve
rter
Harmo
nic c
ompen
sat
ors
Pr
op
or
ti
onal
re
so
na
nt
Total
ha
rm
onic
d
ist
ort
ion
This
is an
open
acc
ess arti
cl
e
un
der
the
CC
BY
-
SA
l
ic
ense
.
Corres
pond
in
g
Aut
h
or
:
Su
ria
na Sal
imi
n,
Gr
ee
n
a
nd S
us
t
ai
nab
le
E
ne
rgy
Fo
c
us
G
rou
p
(
GS
E
nerg
y),
Fa
culty
of Elec
tric
al
an
d El
ect
r
onic
E
ng
i
neer
i
ng,
Un
i
ver
sit
i T
un
Hu
s
sei
n O
nn
M
al
aysia,
86400 Pa
rit R
aj
a, Bat
u
Pa
hat,
Jo
ho
r.
Emai
l:
su
ria
na
@u
t
hm
.e
du.m
y
1.
INTROD
U
CTION
High
a
nd
me
di
um
powe
r
vo
lt
age
a
pp
li
cat
ion
s
a
re
no
w
dema
nd
i
ng
i
n
usi
ng
ca
scad
e
m
ulti
le
vel
inv
e
rter
(CM
L
I)
st
ru
ct
ur
e
.
W
hen
co
mp
a
re
d
to
the
l
ow
e
r
le
vel
in
ver
te
r
s,
it
is
due
to
to
it
s
reduce
d
harm
on
ic
s
,
impro
ved
e
ff
ic
ie
ncy
a
nd
lo
w
vo
lt
age
st
ress
[
1
-
4].
For
ins
ta
nce
of
c
urre
nt
mu
lt
il
evel
c
onver
te
r
i
n
us
e
d
are
t
he
diode
cl
a
mp
e
d,
casca
de
d
H
-
br
i
dg
e
in
ve
rter
s
(C
HBI
)
a
s
well
as
fl
ying
capaci
tors.
W
he
n
seve
ral
H
-
bri
dge
inv
e
rters
with
each
H
-
br
id
ge
has
it
s
own
D
C
so
urce
or
a
sing
le
DC
sour
ce
and
capaci
t
or
s
base
d
DC
so
urces
are
c
onnecte
d
in
se
ries,
it
is
t
hen
cal
le
d
as
s
casca
ded
mu
lt
il
evel
in
ver
te
r
.
I
f
the
casca
de
d
mu
lt
il
evel
i
nverter
has
k
DC
s
our
ces
an
d
num
be
r
of
H
-
br
i
dge
cel
ls,
it
pro
vid
es
(
2k
+
1)
le
vels
to
synt
hesize
the
AC
outp
ut
wav
e
f
or
m
.
F
ollow
in
g
that,
to
f
o
r
m
a
five
-
le
vel
i
nv
e
rter
(
F
LI),
t
wo
DC
s
ources
a
nd
tw
o
casca
de
d
H
-
br
i
dg
e
cel
ls wil
l be
re
qu
i
red [
5
-
11].
Re
searche
rs
ha
ve
made
se
veral
at
te
mp
ts
to
com
bin
e
m
ulti
l
evel
in
ver
te
r
(
M
L
I)
with
a
num
ber
of
H
-
br
i
dg
e
cel
ls
with
the
(2k
+
1)
le
vels
meth
od
.
Bi
gger
nu
mbe
r
of
diodes
a
nd
a
ux
il
ia
r
y
s
witc
hes
are
no
rmall
y
com
bin
e
d
in
th
e
power
ci
r
cuit
to
dev
el
op
a
hi
gh
le
vel M
LI
. I
n
[7],
tw
o
H
-
br
i
dg
e
cel
ls
we
re
arr
a
nged
t
o
make
an
el
eve
n
-
le
ve
l
of
casca
de
d
H
-
bri
dge
M
L
I.
F
or
this
,
f
our
ad
diti
on
al
s
witc
hes
a
nd
ei
gh
t
a
ddit
ion
al
diodes
wer
e
use
d.
T
he
co
ntr
ol
ci
rc
uit
an
d
desi
gn
process
are
ex
pe
ct
ed
to
be
c
omplex.
It
is
al
s
o
mentio
ned
in
[
8]
tha
t
al
l
FLIs
that
ha
s
bee
n
de
vel
op
e
d
pr
ese
nt
more
tha
n
one
diode
an
d
a
uxil
ia
ry
s
witc
h
with
an
e
xtra
con
t
ro
l
ci
rcu
it
s.
As
a
n
exa
mp
le
,
t
here
are
str
uctu
re
s
wit
h
t
wo
a
uxil
ia
ry
s
witc
hes
an
d
tw
o
a
nti
-
bid
irect
io
nal
di
od
es
,
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
Dr
i
S
ys
t
,
V
ol
.
1
1
, N
o.
3
,
Se
ptembe
r
2020
:
14
23
–
14
29
1424
with
tw
o
oth
e
r
di
odes
th
rou
gh
w
hich
the
capaci
to
rs
a
r
e
disc
harged
plu
s
t
wo
DC
vo
lt
age
s
ource
s
are
com
bin
e
d
t
og
e
ther
i
n
a
dd
it
io
n
to
the
sin
gle
k
c
el
l
struct
ure
[
6
-
10].
I
n
ot
her
s
tr
uctu
re,
on
e
ad
diti
onal
switc
h,
four
diodes
a
nd
ei
ther
tw
o
D
C
so
urces
or
two
ca
pacit
ors
acro
s
s
a
boos
t
conve
rter
are
i
n
us
e
d
to
reali
ze
the
FLIs
ou
t
pu
t
volt
ages
[
8
-
15]
.
Be
caus
e
of
t
he
struct
ur
e
s
i
n
t
he
co
ntr
ol
ci
rcu
it
of
five
le
vel
in
ver
te
r
s
are
com
plexe
d
,
fe
w
a
utho
rs
ha
ve
prese
nted
on
the
c
ontr
ol
sc
he
me [
16
-
24]
, mostl
y
on H
-
bri
dge
i
nv
e
rters
a
nd FLI.
This
pa
per
dis
cusse
d
on
a
n
i
mpro
ve
d
c
on
t
r
ol
sc
heme
in
s
ing
le
phase
FL
I
us
in
g
pro
port
ion
al
res
on
a
nt
(P
R)
tog
et
he
r
wit
h
harmo
nic
co
m
pensat
ors
cu
rr
e
nt
co
ntro
ll
er
,
wh
e
re
pe
rfo
rm
ance
on
the
tot
al
har
m
on
ic
distor
ti
on
(THD) i
s als
o hig
hligh
te
d.
2.
RESEA
R
CH MET
HO
D
2.1.
System
de
sign
Ov
e
rall
blo
c
k
dia
gr
a
m
of
5
-
le
vel
in
ve
rter
s
ys
te
m
us
i
ng
t
he
PR
c
urren
t
c
on
tr
oller
is
s
how
n
in
Fig
ur
e
1.
Th
e
sy
ste
m
is
modell
ed
a
nd
desi
gn
e
d
wit
h
mai
n
5
pa
rts
w
hic
h
are
div
i
de
d
into
DC
s
ource,
sing
l
e
ph
a
se
5
-
le
vel
inv
e
rter,
P
W
M
dri
ve
r,
lo
w
pa
ss
filt
er,
a
nd
c
urre
nt
c
ontr
oller.
Pro
pe
r
desi
gn
te
ch
ni
qu
e
a
nd
ci
rcu
it
w
il
l be
sh
ow
n
in
the
next fe
w
sect
io
ns.
Figure
1.
Bl
oc
k diag
ram of
5
-
le
vel
in
ve
rter
sy
ste
m
with
P
R curre
nt contr
oller
2.2.
Single P
ha
se
5
-
le
vel in
vert
er
w
ith
PW
M
The
in
ver
te
r
of
this
po
wer
s
yst
em
is
f
ully
c
ontr
olled
by
ei
ght
IG
BT/
Diode
s
a
nd
it
is
s
uppl
ie
d
by
400
Vd
c
w
it
h t
w
o DC s
ources
20
0V each
as ca
n be
seen
in Fi
gure
2.
Fig
ure
2.
Sin
gl
e phase
5
-
le
vel
inv
e
rter ci
rcu
i
t
The
ci
rc
uit
de
sign
f
ollo
wed
the
H
-
br
i
dg
e
ci
rc
uit
w
he
re
the
I
GBT/Di
od
e
is
f
unct
io
ned
as
the
switc
hing
de
vi
ce
w
hich
f
ollo
ws
t
he
c
omma
nd o
f
P
W
M
wavef
orm.
T
he
gates o
f
al
l IGB
T/Diod
e
s
a
re s
upplied
by
a
P
W
M
ge
ner
at
or
with
100Hz
s
witc
hing
f
re
qu
e
nc
y.
T
he
sine
-
wav
e
blo
c
k
will
generate
in
pu
t
si
ne
wa
ve
sign
al
to
t
he
ci
rcu
it
with
fr
e
quenc
y
2*
π
*50
and
a
mp
li
tu
de
of
1.
T
he
re
ar
e
two
m
easu
re
ment
de
vices
i
n
the
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N:
20
88
-
8
694
THD
perform
ance
of sin
gle
phase
fi
ve le
vel
inverte
r usi
ng
pr
o
porti
onal
r
eso
nant
…
(
Ab
du
ll
ah
Mo
ham
ed
)
1425
ci
rcu
it
one
to
measu
re
the
c
urren
t
a
nd
ot
he
r
to
meas
ure
the
volt
ag
e.
From
the
volt
age
measu
reme
nt,
sco
pe
on
e
w
il
l s
how
t
he vo
lt
age
whi
le
f
r
om
t
he
c
urren
t
measu
rem
ent, sc
ope tw
o wil
l sh
ow the c
urren
t
wa
veform.
2.3.
RLC
l
ow p
as
s
f
il
ter
The
RLC
L
ow
Pass
Fil
te
r
is
chosen
f
or
t
his
desig
n
beca
use
there
is
t
he
functi
on
of
i
nduct
or
a
nd
capaci
tor
to
tu
rn
the
squa
re
wav
e
f
or
m
f
r
om
the
in
ver
te
r
into
si
nuso
i
dal
wa
vefo
rm
f
or
the
c
urren
t
bec
ause
of
the b
e
ha
vior
of cha
rg
i
ng and
discha
rg
i
ng ene
rgy. Cut
-
off fr
equ
e
nc
y,
is
giv
en
as
form
ula
.
=
1
2
√
(1)
Wh
e
re
is
the
f
il
te
r
inducta
nc
e
an
d
is
the
filt
er
ca
pacit
ance
.
F
or
the
init
ia
l
in
du
ct
a
nce
sel
ect
io
n,
it
can
be
cal
cul
at
ed
f
rom
form
ula
.
=
1
4
△
(2)
The
ri
pp
le
fa
ct
or
,
△
ch
os
en
for
cu
rr
e
nt
is
5%
a
nd
t
he
cut
-
off
f
requ
ency
is
1
kHz.
The
inducta
nce
f
or
this
l
ow
pa
ss
fil
te
r
after
tu
ni
ng
is
9µ
H.
A
fter
that,
the
value
of
ca
pacit
or
is
cal
culat
ed
us
in
g
cut
-
off
f
re
qu
e
nc
y form
ula.
Aft
er tunin
g,
t
he value
of ca
pacit
or
is
9pF.
2.4.
PR
c
urrent
contr
oller
Figure
3
s
how
s
the
PR
cu
rr
e
nt
c
on
t
ro
l
strat
egy.
I
i
is
the
inv
e
rter
outp
ut
current
,
I
i
*
is
the
in
ve
rte
r
current
ref
e
re
nc
e an
d U
i
*
is
the inve
rter
vo
lt
age
ref
e
ren
ce
.
The PR
curre
nt
contr
oller
(
)
is r
epr
ese
nted
by
(
)
=
+
2
+
2
(3)
Wh
e
re
is
the
pr
opor
ti
on
al
gain
w
hilst
i
s
re
sona
nt
gain.
is
t
he
res
onant
f
re
qu
e
nc
y
at
fun
dame
ntal w
hich
is
at 5
0Hz
.
Figure
3.
The
PR
cu
rr
e
nt c
ontrol
[
22]
2.5.
PR Contr
ol
w
ith H
arm
on
ic
Co
m
pens
ator
s
Figure
4
s
hows
the P
R
curre
nt
contr
ol w
it
h a
dd
it
io
nn
al
ha
r
monic co
m
pensat
ion
st
rateg
y.
The har
monic
com
pensat
or
(
)
is re
pr
ese
nted
by:
(
)
=
∑
ℎ
2
+
(
ℎ
)
2
ℎ
=
3
,
5
,
7
,
…
.
(4)
Her
e
,
ℎ
is
the
r
eso
nan
t
te
rm
a
t
the
pa
rtic
ular
ha
rm
onic
a
nd
ℎ
is
th
e
res
on
a
nt
fr
e
quenc
y
of
t
he
par
ti
cula
r
ha
r
monic.
T
he
ha
rm
on
ic
c
ompe
ns
at
or
f
or
eac
h
har
m
onic
f
re
qu
e
nc
y
is
a
dded
to
the
fun
da
mental
fr
e
qu
e
nc
y
PR
con
t
ro
ll
er t
o form t
he
c
omplet
e cu
rr
e
nt contr
oller, as
il
lustr
at
ed
in
Fig
ur
e
4.
Figure
4
.
The
PR
cu
rr
e
nt c
ontrol
with
harm
on
ic
c
ompe
ns
a
tors
[
22]
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
Dr
i
S
ys
t
,
V
ol
.
1
1
, N
o.
3
,
Se
ptembe
r
2020
:
14
23
–
14
29
1426
3.
RESU
LT
S
AND DI
SCUS
S
ION
Fo
r
t
his
wor
k,
the
sim
ulati
on
is
do
ne
by
us
i
ng
M
at
la
b/Sim
ulink
s
of
t
war
e
.
T
he
struct
ur
e
consi
st
of
8
IG
BT/
Diodes,
2
DC
s
ources,
low
pass
filt
er
(P
F
),
c
urren
t
a
nd
volt
age
me
asur
e
ment,
SP
W
M
,
an
d
PR
c
urren
t
con
t
ro
ll
er.
T
he
goal
of
this
de
sign
is
to
de
sig
n
a 5
-
le
vel
i
nverter
with
lo
w
TH
D
by u
si
ng PR
c
urren
t
c
ontrolle
r
and
re
du
ce
t
he
3th
,
5th,
an
d
7th
harmo
nics.
The
de
sig
n
ha
s
three
par
ts,
first
par
t
is
to
de
sign
si
ng
le
phase
5
-
le
vel
in
ver
te
r
a
nd
the
sec
ond
par
t
is
to
a
dd
PR
cu
rr
e
nt
co
nt
ro
ll
er
t
o
t
he
fi
rst
desig
n
t
o
re
du
ce
the
T
H
D
le
vel.
The
n
FFT
a
nal
ys
is
will
be
use
d
to
m
onit
or
t
he
TH
D
c
hang
es
that
will
ha
pp
e
n.
Thir
dly,
more
f
un
ct
io
ns
wer
e
add
e
d
t
o
the
P
R curre
nt contr
oller to
r
e
duce
the 3
t
h,
5th, a
nd
7th
ha
rm
on
ic
s.
3.1.
Simul
at
i
on
of
single p
ha
se
5
-
Le
vel
in
vert
e
r
The
de
sig
n
pr
ocess
sim
ply
s
ta
rted
by
de
sign
i
ng
si
ng
le
phase
5
-
le
vel
in
ver
te
r
with
ou
t
PR
current
con
t
ro
ll
er
to
se
e
the
T
H
D
le
ve
l
of
the
i
nv
e
rt
er
without
the
con
t
ro
ll
er
so
that
it
will
be
c
le
ar
the
dif
fer
e
nce
of
PR
c
urren
t
co
nt
ro
ll
er
to
the
in
ver
te
r
i
n
te
rms of
re
duci
ng
the
T
HD
le
vel.
Figure
5
s
hows
t
he
simulat
io
n
r
esult.
The
s
witc
hing
fr
e
qu
e
nc
y
is
100Hz a
nd the
mag
nitud
e
of
t
he vo
lt
age
is
400V as
e
xp
ect
e
d.
Figure
5
.
The
vo
lt
age
out
pu
t
of sin
gle phase
5
-
le
vel in
ve
rter
3.2.
Single P
ha
se
5
-
Le
vel I
nv
er
te
r w
it
h P
R
cur
rent c
ontrolle
r
The
seco
nd
ph
ase
of
the
de
sign
process
is
t
o
a
dd
PR
c
urr
ent
c
on
t
ro
ll
er
and
lo
w
pas
s
f
il
te
r
to
t
he
sing
le
ph
ase
5
-
le
vel
inv
e
rter
c
ircuit
.
T
he
out
pu
t
from
t
he
c
urren
t
m
easu
re
ment
will
be
t
he
input
of
the
c
urren
t
con
t
ro
ll
er
w
hile
the
outp
ut
of
the
c
urre
nt
co
ntr
oller
will
be
the
i
nput
of
th
e
inve
rter
ci
rc
ui
t.
It
is
il
lustrat
ed
as
in Figu
re
6.
Figure
6
.
Sin
gl
e phase
5
-
le
vel
inv
e
rter
with
PR cu
rr
e
nt c
ontrolle
r
ci
rc
uit
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N:
20
88
-
8
694
THD
perform
ance
of sin
gle
phase
fi
ve le
vel
inverte
r usi
ng
pr
o
porti
onal
r
eso
nant
…
(
Ab
du
ll
ah
Mo
ham
ed
)
1427
In
si
de
the
PR
c
urren
t
c
ontroll
er
bl
ock,
the
ci
rcu
it
is
s
how
n
in
Fig
ur
e
7.
T
he
co
ntro
ll
er
ha
s
sine
wav
e
as
re
fer
e
nce
input
with
60
A
ref
e
ren
c
e
c
urren
t
an
d
f
re
qu
e
nc
y
of
2*
π
*50.
T
he
i
nput
node
(i
n1)
i
s
w
he
re
con
t
ro
ll
er
will
receive
the
in
put
c
urre
nt
fro
m
i
nv
e
rter
w
hi
le
the
outp
ut
node
(out
1)
is
the
c
ontrolle
r
ou
t
pu
t
wh
ic
h wil
l go
back to t
he
i
nverter as
in
pu
t i
n
a cl
os
e l
oop.
Figure
7
.
PR c
urren
t c
ontr
oller circ
uit
.
3.3.
FFT
analy
sis
of single
ph
ase
5
-
le
vel
in
ver
ter
with
PR
c
urrent
contr
oller
Af
te
r
ad
ding
P
R
current
c
ontrolle
r,
the
F
FT
analysis
t
oo
l
sh
ows
t
hat
the
TH
D
is
1.6
%
with
Kp
=
0.38, a
nd Kr =
1600 at
fun
da
mental
fre
qu
e
nc
y (50
Hz)
w
hich
is l
ess
tha
n
t
he 5%
[25
]
as
sh
ow
n
Fi
gure
8.
Figure
8
.
FFT
analysis
of sin
gle phase
5
-
le
ve
l i
nv
e
rter
with
PR c
urren
t c
ontr
oller
3.4.
FFT
analy
sis
of
single
p
ha
se
5
-
le
vel
inverter
with
P
R
c
urren
t
co
nt
r
oller
and
ha
r
mo
nic
compe
nsat
or
It
ca
n
be
see
n
in
Fi
gure
8
a
bove
,
t
he
TH
D
value
of
3r
d,
5t
h,
a
nd
7t
h
ha
r
monic
orde
rs
a
re
high.
In
order
to
reduc
e
it
,
a
dju
stme
nt
s
we
re
ma
de
t
o
t
he
PR
c
urre
nt
c
on
t
ro
ll
er
ci
rcu
it
by
a
ddin
g
t
hr
ee
par
al
le
l
set
of
ci
rcu
it
eac
h
set
co
ns
ist
s
of
K
r
gain,
tw
o
m
ulti
pliers,
a
dd
e
r,
a
nd 4
-
unit
dela
y.
Eac
h
ad
de
d
ci
rcu
it
is
f
oc
us
in
g
o
n
reducin
g
t
he
pro
blemat
ic
3r
d,
5t
h
a
nd
7th
harmo
nics.
A
f
te
r
the
simulat
ion
t
he
T
H
D
of
3rd
,
5th
a
nd
7th
harmo
nics
ha
ve
decr
ease
d
as
sh
ow
n
in
the
FFT
an
al
ys
is
i
n
Fig
ure
9.
Th
e
com
par
is
on
of
T
H
D
val
ue
of
3rd,
5th
a
nd
7th
ha
r
monics
befor
e
and after
r
e
duc
ti
on
is als
o
s
ho
wn in T
able
1.
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
Dr
i
S
ys
t
,
V
ol
.
1
1
, N
o.
3
,
Se
ptembe
r
2020
:
14
23
–
14
29
1428
Figure
9. FFT
analysis
of sin
gle phase
5
-
le
ve
l i
nv
e
rter
with
PR c
urr
ent c
ontr
oller an
d ha
rm
on
ic
c
ompe
ns
at
or.
Table
1
.
C
omp
ariso
n of TH
D value
of
3
th
, 5th,
a
nd
7
th
ha
rm
on
ic
s
b
e
fore a
nd a
fter
reducti
on
Har
m
o
n
ic ord
er
Magn
itu
d
e (
% o
f
f
u
n
d
am
en
tal)
b
efore
redu
ctio
n
Magn
itu
d
e (
% o
f
f
u
n
d
am
en
tal)
after redu
ctio
n
0
0
0
.45
1
.62
50
1
0
.7
1
.85
100
2
0
.25
0
.2
150
3
0
.45
0
.1
200
4
0
.55
0
.19
250
5
0
.6
0
.25
300
6
0
.58
0
.27
350
7
0
.43
0
.4
400
8
0
.43
0
.38
Fr
om
the
ta
ble,
the
3rd
or
der
i
mpro
ve
d
by
77
.78%
w
hile
the
5th
an
d
7th
ha
rm
on
ic
s
order
s
improv
e
d
by 58.3
3%
a
nd
6.9
8% res
pecti
vely.
4.
CONCL
US
I
O
N
Desig
n
an
d
si
mu
la
ti
on
res
ult
of
sin
gle
ph
ase
five
-
le
vel
inv
e
rter
with
PR
current
c
ontr
oller
an
d
harmo
nic
c
ompen
sat
or
has
be
en
discu
ssed
in
this
pa
pe
r.
This
desig
n
in
vo
l
ves
t
hr
ee
major
ste
ps.
F
irstl
y,
sing
le
phase
fi
ve
-
le
vel
in
ver
t
er
was
desi
gn
e
d
with
100Hz
switc
hing
fr
e
quenc
y
an
d
400v
of
DC
s
ourc
e.
T
he
five
-
le
vel
volt
age
outp
ut
wa
veform
wa
s
pr
oduce
d.
Sec
on
dly
,
PR
cu
rr
e
nt
con
tr
oller
ci
r
cuit
was
a
dd
e
d
to
the
sing
le
phase
fi
ve
-
le
vel
in
ver
t
er
ci
rc
uit
with
60A
ref
e
re
nce
current.
T
he
and
gain
was
t
un
e
d
t
o
re
duce
the
T
H
D
to
le
s
s
tha
n
5%.
Las
tl
y,
a
dju
stm
ent
s
wer
e
ma
de
t
o
t
he
PR
cu
rr
e
nt
c
ontrolle
r
t
o
re
duce
the
T
HD
at
the
3
rd
,
5
th
,
an
d
7
th
ha
rm
on
ic
order
s
.
T
he
T
HD
of
t
he
3
rd
harmo
nic
orde
r
was
reduce
d
from
0.45
%
t
o
0.1%
wh
il
e the
5
th
a
nd 7
th
harmo
ni
c orde
rs
wer
e
re
du
ce
d from
0.
6%
a
nd
0.43
%
to 0.25%
and
0.4%
r
es
pecti
ve
ly.
ACKN
OWLE
DGE
MENTS
The
a
uthors
w
ou
l
d
li
ke
to
ac
knowle
dge
U
ni
ver
sit
i
Tu
n
H
usse
in
O
nn M
al
aysia
(
UT
HM)
,
Ba
tu
Pa
hat
,
Jo
ho
r,
M
al
a
ys
ia
for
t
he fina
nc
ia
l supp
or
t
of this
pap
e
r
publica
ti
on
.
REFERE
NCE
S
[1]
P.
V.
Kumar
,
et
a
l.,
“Singl
e
Pha
se
Casc
ade
d
Mu
lt
ilevel
Inv
erter
using
Multi
ca
rr
i
er
PWM
Techni
que,
”
Journal
o
f
Engi
ne
ering
and
Applied
S
cienc
e
s
,
vol. 8, pp. 796
-
799,
2013
.
[2]
K.
S.
Reddy
an
d
Ch.
V.
Kumar
,
“Im
pl
ementati
on
of
a
singl
e
-
p
hase
Mul
ti
l
eve
l
Inve
rte
r
with
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a
tt
ery
ba
la
n
ci
ng,
”
Inte
rnational
Jo
urnal
of El
e
ct
ri
c
al
and
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ct
roni
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t
al.,
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l
eve
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ert
e
r
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b
le
for
u
sing
as
a
Volt
a
g
e
Harm
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”
Journal
of
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ower
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troni
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Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N:
20
88
-
8
694
THD
perform
ance
of sin
gle
phase
fi
ve le
vel
inverte
r usi
ng
pr
o
porti
onal
r
eso
nant
…
(
Ab
du
ll
ah
Mo
ham
ed
)
1429
[4]
W.
S
.
Oh,
e
t
al
.
,
“T
hre
e
ph
ase
thr
ee
-
l
eve
l
PWM
s
witc
hed
voltage
source
inv
erter
with
z
ero
n
eut
r
al
point
pot
ent
i
al
,
”
IEE
E
Tr
ans.
on
Powe
r E
le
c
troni
cs
,
vol
.
21
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1
320
-
1327,
2006
.
[5]
B.
M.
Vee
n
a
and
M.
T
.
Triveni,
“Ha
rdwar
e
Impleme
n
ta
t
i
on
of
5
Le
ve
l
Inve
rte
r
Us
ing
Microc
ontro
ll
e
r,
”
Inte
rnational
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urnal
of
Ad
vanced
R
ese
arch
El
e
ct
rical,
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e
ct
ron
ic
s
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Instrum
e
ntat
ion
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n
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vo
l.
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P.
V.
V.
R.
Ra
o,
e
t
al
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,
“Hy
bri
d
5
-
le
v
el
inve
r
t
er
fed
indu
ct
ion
mot
or
drive,”
World
Journal
of
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ll
ing
an
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Isma
il
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a
l.
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ve
Harm
oni
c
E
li
m
in
at
ion
of
Five
-
l
eve
l
Casca
d
ed
Inve
rte
r
Us
ing
Parti
cle
Sw
arm
Optim
izati
o
n,
”
I
nte
rnati
onal
Jou
rnal
of Engi
ne
ering
and
Te
chnology
(IJ
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vo
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2014
.
[8]
P.
Ira
ia
nbu
and
M.
Sivakum
ar
,
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e
DC
Source
Based
C
asc
ade
d
H
-
Bridge
5
-
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ve
l
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r
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Int
ernati
onal
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of
Innov
ati
v
e
R
ese
arch
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ci
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ineering
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chnol
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vo
l. 3, no. 1
,
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[9]
B.
C
.
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k
a
and
S.
N.
Prasad
,
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li
ng
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of
Five
Le
ve
l
C
asc
ad
ed
H
-
Bridge
Mul
ti
l
eve
l
Inv
ert
er
wi
t
h
DC/DC
Boost
Convert
er
,
”
Int
e
rnational
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