Int
ern
at
i
onal
Journ
al of
P
ower E
le
ctr
on
i
cs a
n
d
Drive
S
ystem
s
(
IJ
PEDS
)
Vo
l.
12
,
No.
1
,
M
a
r 202
1
, p
p.
374
~
3
8
4
IS
S
N:
20
88
-
8694
,
DOI: 10
.11
591/
ij
peds
.
v12.i
1
.
pp
37
4
-
3
8
4
374
Journ
al h
om
e
page
:
http:
//
ij
pe
ds
.i
aescore.c
om
A
h
i
gh
e
ffici
ency
and
h
i
gh
s
peed
c
ha
rge o
f Li
-
I
on
b
atte
ry
c
ha
rger
i
nterfa
ce
u
si
ng
s
witchi
ng
-
b
ased
t
echni
que in 180
nm
CMOS
t
echnolo
gy
Musta
ph
a
El
Alaoui
1
, F
oua
d F
arah
2
, Kar
im
El
kh
adi
ri
3
, Ahmed T
ah
i
ri
4
, Rachid El
Alami
5
,
Ha
ss
an
Q
jidaa
6
1,2,5,6
La
bora
tory of Com
put
er
Sci
enc
e
,
Sign
al
s,
Automa
t
ion and
C
ognit
ivi
sm
(LI
S
AC),
Depa
r
tm
en
t
of
Phys
ic
s,
Facul
ty
of
Sci
en
ce
s Dhar
El Mah
raz
,
Sidi
Moham
ed
Ben
Abd
ellah
Univer
sity
,
Fe
z, Moroc
co
3,4
La
bora
tory
of
Comput
er
Scie
n
ce
and
In
te
rdis
ciplina
ry
Phys
ic
s (
LIPI),
Norm
al
S
uper
ior
Schoo
l
F
ez
(
ENSF
),
Sidi
Moham
ed Ben
Abdel
la
h
Univer
sity
,
Fe
z,
Morocc
o
Art
ic
le
In
f
o
ABSTR
A
CT
Art
ic
le
history:
Re
cei
ved
Sep
18
, 20
20
Re
vised
Jan
11
, 2021
Accepte
d
Ja
n
22
, 2
0
21
In
th
is
work,
the
design
and
an
alys
is
of
new
Li
-
I
on
ba
tt
e
ry
cha
rg
er
interfa
c
e
using
the
sw
it
c
hing
-
base
d
t
ec
h
nique
is
propos
ed
for
hig
h
eff
i
ci
en
cy,
h
igh
spee
d
cha
rg
e
an
d
low
area.
Th
e
high
eff
i
ci
en
cy,
the
lower
si
ze
a
rea
and
the
fast
ch
arg
e
are
the
mor
e
i
mpor
ta
nt
nor
ms
of
t
he
proposed
Li
-
Ion
bat
t
ery
cha
rge
r
in
te
rf
ace
.
The
batter
y
ch
arg
ing
is
com
pl
e
te
d
p
asses
to
e
ach
ch
arg
ing
mode
:
Th
e
f
irst
mode
is t
he
trick
le
cha
rg
e
mode
(
TC),
the
se
cond
mode
is t
he
consta
nt
cur
r
ent
mode
(CC)
and
the
la
st
mod
e
i
s
the
consta
n
t
v
olt
ag
e
mod
e
(CV),
in
th
ir
ty
t
hre
e
mi
nu
te
s.
T
he
n
ew
L
i
-
Ion
bat
t
ery
cha
rg
er
int
erf
ac
e
is
designe
d,
simul
a
te
d
and
l
ayout
ed
in
Cad
ence
soft
ware
using
TSCM
180
nm
CMO
S
te
chnol
o
gy.
W
it
h
an
inp
ut
voltage
V
IN
=
4.
5
V,
th
e
ou
tput
ba
ttery
volt
ag
e
(V
B
AT
)
ma
y
ran
g
e
from
2.
7
V
to
4
.
2
V
and
the
m
axim
um
cha
rg
ing
bat
t
ery
cur
r
ent
(I
B
AT
)
is
1.
7
A.
Th
e
pea
k
eff
i
ci
en
c
y
rea
ch
es
97%
a
nd
the
to
ta
l
are
a
is on
ly
0
.
03
mm
2
.
Ke
yw
or
d
s
:
Con
sta
nt curre
nt m
od
e
Con
sta
nt volt
a
ge
m
ode
Current se
ns
i
ng
LDO ba
sed
Li
-
I
on b
at
te
r
y char
ger inte
r
fa
ce
Sw
it
chin
g base
d
This
is an
open
acc
ess arti
cl
e
un
der
the
CC
BY
-
SA
l
ic
ense
.
Corres
pond
in
g
Aut
h
or
:
M
ust
ap
ha
El
A
la
ou
i
Lab
or
at
or
y of
Com
pu
te
r
Scie
nce, Si
gnal
s, A
uto
mati
on
an
d C
ogniti
vism
(L
IS
AC
)
Dep
a
rtme
nt of
Physics
,
Facult
y of Sci
ences
Dh
a
r
El
M
a
hr
a
z, Sid
i
Mo
ham
ed
Be
n Abd
el
la
h Un
i
ver
sit
y,
Fez,
M
or
occo
B.P. 179
6
F
ez
-
Atla
s, 300
03, Fez
, M
orocco
Emai
l:
mu
sta
pha.ela
la
oui@
usmb
a
.ac.ma
1.
INTROD
U
CTION
The
Ba
tt
er
y
is
a
necessa
ry
el
ement
to
sup
ply
the
el
ect
rici
ty
-
pow
ere
d
portable
de
vices,
for
exa
mp
le
,
cel
lular
ph
on
e
,
Lapt
op,
ta
blet
s,
et
c.
In
ad
diti
on,
decr
easi
ng
the
powe
r
c
onsu
m
ptio
n
to
wi
den
the
operati
on
al
li
fe
and
ti
me
,
the
cha
rg
i
ng
is
an
oth
e
r
crit
ic
al
issue
f
or
t
he
ba
tt
ery
[1].
Slow
e
r
c
harg
ing
is
c
onside
red
as
wasti
ng
ti
me.
Howe
ver,
the
degra
dation
of
batte
r
y
li
fe
a
nd
the
inc
rease
in
te
mp
e
ratu
re
are
ca
us
e
d
by
a
fast
chargin
g
[
2].
The
Li
-
Ion
ba
tt
ery
is
mo
stl
y
util
iz
ed
in
th
e
automoti
ve
f
ei
ld
especial
y
in
the
pro
duct
ion
of
el
ect
rical
ve
hicules,
res
pecti
ng
t
he
global
po
li
cy
on
t
he
app
li
cat
io
n
of
ren
e
wa
ble
e
ne
rg
ie
s
a
nd
al
te
r
native
energies
[3
]
-
[
5].
Th
us
,
the
Ni
-
C
d
a
nd
th
e
Ni
-
M
H
batte
ries
a
re
s
ubsti
tute
of
the
Li
-
I
on
batte
ries
,
t
hat
du
e
of
their
high
performa
nce
[
6],
but
to
this
day,
the
Li
-
Ion
batte
ries
are
the
m
ore
use
d
a
nd
po
pu
la
r
rech
a
rg
ea
ble
ba
tt
eries,
and
co
ntr
ols
t
he
m
obil
e
batt
ery
ma
rk
et
[
7].
F
ur
t
her
m
or
e
,
to
f
ull
-
f
ull
the
pur
po
se
of
obta
inin
g
a
r
edu
ce
pro
du
ct
io
n
cos
t,
the
hi
gh
ef
f
ic
ie
ncy
a
nd
t
he
nece
ssit
y
of
a
l
ow
c
omplexit
y
of
th
e
L
i
-
Ion
batte
r
y
c
harger
interface
(
BC
I
)
are hig
hly i
mporta
nt [8].
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N: 20
88
-
8
694
A h
i
gh eff
ic
ie
ncy and h
i
gh s
pe
ed
c
harg
e
o
f
Li
-
I
on batt
ery
charger
interf
ac
e u
si
ng
....
(M
us
ta
pha El
Ala
ou
i
)
375
The
Li
-
I
on
batte
ry
reno
wn
e
d
as
the
best
en
ergy
st
or
a
ge
t
hat
s
olv
e
t
he
need
of
a
lo
w
cost,
a
li
ght
weig
ht
a
nd
a
l
ong
operati
on
t
ime
[
1].
T
her
e
fore,
t
he
c
ha
rgi
ng
so
l
ution
f
or
the
Li
-
Ion
ba
tt
ery
has
a
ppea
le
d
s
o
intense
re
searc
h
ef
forts
re
gardless
in
the
i
ndus
tr
y
or
in
the
academia
[
6
]
,
[
9
]
,
[
10].
T
he
c
harger
s
ol
utions
wel
l
known
are
ess
entia
ll
y
cl
assif
ie
d
int
o
t
wo
ty
pes,
F
ig
ure
1
s
h
ow
s
the
LD
O
(
L
ow
-
Dro
pout
)
ba
sed
c
harg
er
a
nd
the s
witc
hing
-
base
d
c
harger
[
11]
.
Figure
1. The
LDO (
l
ow
-
d
r
opout)
b
ase
d
c
ha
rg
e
r
a
nd the
S
witc
hing
-
base
d cha
rg
e
r [11]
The
L
DO
-
base
d
cha
r
ger
ac
hi
eves
the
be
nefi
t
of
sim
plici
ty
at
the
tro
ub
le
of
a
poor
ef
fi
ci
ency
.
The
LDO
-
base
d
c
ha
rg
e
r
res
ponde
nt
f
or
s
uch
re
quest
s
ca
us
e
of
it
s
low
c
urre
nt
rip
ple
a
nd
it
may
be
inse
rted
int
o
the
c
hip
wit
hout
a
desc
ript
ive
c
ompone
nt
[
12].
T
he
l
ower
ef
fici
enc
y
is
a
gr
eat
pr
ob
le
m
for
it
,
so
t
he
util
iz
at
ion
of
t
he
Power
-
M
O
S
as
a
var
ia
ble
cu
rr
e
nt
s
our
ce
is
a
so
l
utio
n
of
it
s
lo
w
e
ff
ic
ie
nc
y
a
nd
al
so
to
minimi
ze
it
dro
pout
[
13]
.
The
s
witc
hing
base
d
re
quir
es
an
a
dv
a
nce
d
ci
rc
uit
desi
gn
t
o
reali
ze
a
high
eff
ic
ie
nc
y,
it
giv
es
a
wide
ra
nge
of
t
he
in
put/
ou
tp
ut
vo
lt
age
[14
].
F
urt
her
more
the
s
witc
hing
based
is
c
os
ti
ng
a
lot
of
dr
a
w
backs,
li
ke
a
worse
no
ise
r
epudiat
ion
a
s
of
the
rip
ple
at
a
switc
hin
g
rate,
an
d
rise
power
consu
mp
ti
on
[
15].
In
a
ddit
ion
,
t
he
se
chargin
g
s
ys
te
ms
a
re
ty
pi
cal
ly
integrate
d
into
a
sin
gle
chip
to
mini
mize
ci
rcu
it
des
ig
n
c
omplexit
y
th
rou
gh
t
he
imp
r
ov
e
me
nt
of
C
MOS
t
echnolo
gy.
T
he
n,
the
batte
r
y
charger
is
i
ntegr
at
e
d
into
a
S
ys
te
m
-
on
-
Chi
p
(SoC)
to
re
du
ce
the
ef
fect
of
rip
pl
e
an
d
no
ise
[
15].
Fig
ure
2
sh
ows
the
cha
rg
i
ng
modes
of
Li
-
I
on
batte
r
y
that'
s
con
sist
e
d
of
f
our
sta
ge
s:
the
first
one
is
the
tric
kle
cha
rg
e
(
TC),
the
sec
on
d
one
is
the
co
ns
ta
nt
cu
rrent
(CC)
charge,
the
t
hir
d
one
is
t
he
c
onsta
nt
volt
age
(CV)
c
harge
a
nd
th
e
la
st
one
i
s
t
he
charge ter
mina
ti
on
[16
]
,
[
17]
.
Figure
2. The
c
hargin
g mo
des
of Li
-
Ion
batte
ry
The
TC
cha
r
ge
mode
is
act
ivate
d
wh
e
n
th
e
batte
ry
vo
lt
a
ge
(
V
BAT
)
is
re
du
ce
d
tha
n
the
low
volt
age
(V
L
)
,
the
batte
r
y
cu
rr
e
nt
is
ke
pt
at
a
con
sta
nt
low
value
(
0.1
C,
C
represent
s
the
capaci
ty
of
the
batte
r
y
a
nd
it
s
un
it
is
(Ah
)
a
mp
e
re
-
hours)
to
protect
the
batte
ry
f
rom
be
ing
da
mage
d
by
an
ove
rh
ea
ti
ng
.
The
CC
charg
e
mode
is
sel
ect
ed
wh
e
n
V
BAT
is
bet
ween
th
e
low
vo
lt
age
(V
L
)
a
nd
the
hi
gh
volt
age
(
V
H
),
it
mi
nimize
s
the
chargin
g
ti
me
because
the
b
at
te
ry
is c
ha
rg
e
d wit
h
a
high CC
(0.
1
C
-
1C).
The
C
V
c
harg
e
mode
is
act
ivate
d
w
hen
V
BAT
rise
up
t
o
t
he
sp
ecs
va
lue
of
the
V
H
,
w
hich
ma
ke
th
e
chargin
g
cu
rr
e
nt
(I
BAT
)
fall
s
to
t
he
c
ut
-
off
(0.02C
-
0.0
7C)
an
d
the
c
harg
e
pr
ocess
en
ds.
We
prese
nted
t
his
arti
cl
e
at
the
f
ollow
i
ng
:
Sect
ion
I
I
pro
po
se
s
th
e
cha
r
ging
ci
rcu
it
of
Li
-
I
on
batte
r
y
c
harger
inter
face;
Sect
io
n
III
pr
ese
nts the
simulat
io
n res
ults o
f our c
hargin
g
ci
rc
uit;
and
we
c
on
cl
ud
e
in Secti
on
IV.
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
D
ri
S
ys
t,
V
ol
.
12
, N
o.
1
,
Ma
rch
20
21
:
374
–
384
376
2.
PROP
OSE
D CH
ARGIN
G
CIRC
UIT O
F
LI
-
IO
N
B
AT
TE
RY
CHA
R
GER I
NTER
FAC
E
Un
ti
l
now
,
the
re
are
numer
ous
resea
r
c
h
art
ic
le
s
hav
e
offe
red
a
diff
e
re
nt
arch
it
ect
ur
e
s
in
orde
r
to
gen
e
rate
a
c
onsta
nt
outp
ut
su
ppl
y
vo
lt
a
ge
f
or
the
Li
-
Ion
BC
I
us
in
g
CMOS
te
c
hnol
ogy,
but
t
heir
po
wer
eff
ic
ie
nc
y
is
c
omparati
vel
y
low
due
to
a
n
increase
pow
er
loss
of
t
he
Power
-
MOS
F
ET
[
17
]
-
[
21
].
As
a
so
luti
on
of
t
his
pr
ob
le
m
we
a
r
e
goin
g
to
c
on
t
ro
l
the
each
m
od
e
via
it
s
i
de
ntica
l
co
ntr
ol
s
ign
al
t
o
i
mpro
ve
t
he
powe
r
eff
ic
ie
nc
y
that
will
co
ntribute
to
a
da
pting
betwee
n
the
supp
l
y
vol
ta
ge
of
cha
rg
i
ng
a
nd
the
V
BAT
.
A
pro
po
se
d
cha
r
ging
ci
r
cuit
of
Li
-
I
on
BC
I
is
i
ll
us
trat
ed
i
n
F
igure
3
w
hich
i
nclu
des
seve
n
su
b
-
ci
rc
uits:
th
e
m
od
e
con
t
ro
l,
the c
ur
ren
ts
ref
e
re
nce
, th
e c
ha
rg
e
contr
ol,
the
g
at
e
dr
i
ver
,
the le
ve
l shifter
and t
he
curre
nt se
ns
ing.
Figure
3. The
pro
po
se
d
c
ha
rgi
ng
ci
rcu
it
of L
i
-
Ion
batte
r
y
c
harger
inter
fac
e (BCI
)
The
m
ode
c
on
t
ro
l
blo
c
k
is
co
ncep
te
d
to
de
fine
the
c
hargi
ng
m
od
e
s
(TC
,
CC
and
C
V)
by
co
mpa
rin
g
the
V
BAT
with
the
V
H
a
nd
t
he
V
L
,
wh
ic
h
a
re
ge
ner
at
e
d
f
r
om
a
band
-
ga
p
bl
ock.
I
n
oth
er
ha
nd
t
he
c
urren
ts
ref
e
ren
ce
blo
c
k
pro
duces
a
de
sired
c
urren
ts
matc
hing
t
o
the
m
od
e
c
on
t
r
ol
outp
ut
vo
lt
a
ge.
T
he
la
tt
er
blo
c
k
is
fo
ll
owe
d
by
a
charge
co
ntr
ol
blo
c
k
util
iz
ed
for
co
mp
a
rin
g
betwee
n
the
c
urre
nt
sens
or
I
se
nse
and
the
r
efe
ren
c
e
currents
to
ge
ne
rate
the
gate
vo
lt
age
(
V
G
)
w
hich
a
ssist
to
c
on
t
ro
l
t
he
P
-
P
M
O
S
t
hanks
t
o
the
le
vel
-
s
hift
with
a
gate
-
dr
ive
r
ci
r
cuit.
That
mai
ntains
a
c
on
st
ant
volt
age
dif
fer
e
nce
am
ong
the
sup
ply
volt
age
(
V
IN
)
a
nd
t
he
V
BAT
. T
he op
e
r
at
ing
pr
i
nciple
of each
b
l
ock ha
s b
ee
n desc
rib
ed belo
w.
2.1. M
od
e
Co
nt
r
ol
The
mode
c
on
trol
ci
rc
u
it
is
sh
ow
n
i
n
F
i
gure
4.
The
m
ode
co
ntr
ol
bl
oc
k
ci
rc
uit
is
a
l
og
ic
c
ontr
ol
sy
ste
m
co
ns
ist
of
t
w
o
le
vels
from
outp
ut
volt
age:
a
high
vo
lt
age
th
at
m
eans
lo
gic
le
ve
l
eq
ual
'
1'
a
nd
a
lo
w
vo
lt
age
that
m
eans
l
ogic
le
ve
l
eq
ual
'
0'.
It
c
on
t
rib
utes
to
de
f
ine
the
V
BAT
an
d
to
pro
duc
e
the
co
ntr
ol
s
ign
al
s
(V
TC
,
V
CC
,
V
CV
)
res
pecti
vely
.
The
tric
kle
c
harge
vo
lt
age
(V
TC
)
,
the
c
onsta
nt
curre
nt
volt
age
(
V
CC
)
a
nd
t
he
const
ant
volt
ag
e
vo
lt
age
(
V
CV
)
are
re
su
lt
in
g
from
a
c
ompar
ison
(by
tw
o
hi
gh
s
pee
d
co
m
par
at
or)
of
the
V
BAT
with
the
ref
e
re
nce
volt
ages
(t
he
V
H
a
nd
the
V
L
).
The
refore
,
w
hen
V
BAT
is
lowe
r
tha
n
th
e
V
L
,
bein
g
on
ly
the
V
TC
act
ive.
W
hen
V
BAT
is
hi
gh
e
r
or
e
qual
than
t
he
V
L
an
d
lowe
r
tha
n
the
V
H
,
bein
g
onl
y
the
V
CC
act
iv
e.
A
nd
wh
e
n V
BAT
is
hi
gh
e
r or
e
qual
t
han the
V
H
,
b
ei
ng only
the
V
CV
act
ive.
Also
,
t
he
co
ntr
ol
volt
age
sig
na
l
(V
Control
)
is
sent
to
the
cha
r
ge
co
ntr
ol
blo
c
k
f
or
gen
e
rati
ng
a
cha
rg
e
current
in
t
he
corres
pondin
g
charge
mode.
Figure
5
sho
w
s
the
wa
veforms
of
the
c
ontrol
si
gn
al
s
(
V
TC
,
V
CC
,
V
CV
),
the
I
BAT
and
t
he
V
BAT
.
We
can
obser
ve
d
f
rom
F
ig
ur
e
5
that
in
the
T
C
mo
de
,
only
t
he
V
TC
is
set
to
'ON
'.
In the CC
mod
e, only
the
V
CC
is set
to
'
O
N'.
And
i
n
the
CV
mode,
only t
he
V
CV
is set
t
o
'
ON
'
.
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N: 20
88
-
8
694
A h
i
gh eff
ic
ie
ncy and h
i
gh s
pe
ed
c
harg
e
o
f
Li
-
I
on batt
ery
charger
interf
ac
e u
si
ng
....
(M
us
ta
pha El
Ala
ou
i
)
377
Figure
4.
Sc
he
mati
c o
f
the
m
od
e
co
ntr
ol
bloc
k unde
r
CA
D
ENCE s
oft
ware
Figure
5.
Wa
ve
forms
of the
c
on
t
ro
l si
gn
al
s
(V
TC
, V
CC
, V
CV
)
, th
e
batte
r
y
c
urre
nt (I
BAT
)
a
nd the
batte
ry
vo
lt
age
(V
bat
)
2.2. C
urren
ts Refere
nce
Figure
6
s
how
s
the
c
urren
ts
ref
e
ren
ce
ci
rcui
t
under
C
A
D
ENCE
s
of
t
ware
.
It
c
onsist
s
of
an
O
pAm
p
and a C
ompara
tor
t
o produce
a cu
rr
e
nt r
e
fer
e
nce
I
Ref
w
hich
is d
et
er
mine
d
i
n
the
equati
on:
I
Ref
=
V
Ref
R
Ref
(1)
The
fi
rst
cu
rr
e
nt
mir
ror
s
ys
te
m
co
ns
ist
in
g
of
the
P
MOS
tr
ansisto
rs
(
PM2
,
P
M
3,
P
M
4,
P
M
5)
us
e
d
i
n
the
de
sig
n,
a
s
sist
to
pr
oduc
e
a
tric
kle
cha
rg
e
cu
rr
e
nt
(I
TC
),
a
c
onsta
nt
current
c
urre
nt
(I
CC
)
an
d
a
c
ut
-
off
current
(I
Cutt
-
off
),
that
a
re
pro
portio
nal
to
I
R
ef
.
Also,
the
y
a
re
util
iz
ed
as
a
ref
e
ren
ces
pr
oport
ion
al
in
t
he
TC
mode,
t
he
CC
mode
a
nd
the
e
nd
of
the
cha
r
ge
mode,
res
pec
ti
vely.
A
s w
el
l,
w
hen
t
he
V
BAT
reaches
4.2
5V,
t
he
high
sp
ee
d
c
ompa
rator
with
the
seco
nd
cu
r
ren
t
mir
r
or
s
yst
em
consi
sti
ng
of
a
P
MOS
tr
ansisto
rs
(PM
0,
PM1
)
us
e
d
in
the
des
ign
,
sta
rts
to
pro
duce
a
co
ns
t
ant
volt
age
cu
r
ren
t
(
I
CV
)
w
hic
h
is
de
c
reasin
g
from
the
I
CC
to
the
I
Cut
-
off
.
The
I
CV
is
util
iz
ed
a
s
a
ref
e
ren
ce
pro
portion
al
in
the
CV
m
ode.
The
V
TC
,
the
V
CC
a
nd
t
he
V
CV
gen
e
rati
ng
f
rom
the
m
ode
co
ntr
ol
blo
c
k
a
re
us
e
d
in
the
c
urre
nts
re
fer
e
nc
e
blo
c
k
to
c
ontrol
the
t
hr
ee
s
witc
he
s
SW1,
SW2
a
nd
S
W
3,
res
pec
ti
vely.
Se
ndin
g
the
I
TC
,
the
I
CC
and
the
I
CV
to
the
cha
r
ge
c
on
t
ro
l
blo
c
k
i
n
each
charge
mode
(
TC, CC
, a
nd C
V)
.
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
D
ri
S
ys
t,
V
ol
.
12
, N
o.
1
,
Ma
rch
20
21
:
374
–
384
378
Figure
6.
Sc
he
mati
c o
f
the c
urre
nts r
e
fer
e
nc
e b
loc
k u
nd
e
r C
AD
E
NCE s
oft
war
e
2.3. C
ha
r
ge C
on
t
rol
The
c
harge
co
n
tr
ol
ci
rcu
it
is
il
lustrate
d
in
F
igure
7.
This
bl
ock
is
util
iz
ed
to
ge
ner
at
e
a
gate
volt
ag
e
(V
G
)
t
o
the lev
el
-
sh
ifte
r wit
h t
he
gate
-
dr
i
ver
for
dri
vi
ng
th
e Power
-
P
M
O
S
in the each
c
ha
rg
e
mode. T
he valu
e
of
the
V
G
is
va
ried
with
the
c
urren
t
I
TC
-
CC
-
CV
by
the
c
u
r
ren
t
co
mp
a
rato
r
w
hich
use
d
in
t
he
de
sig
n
t
o
co
mp
a
re
betwee
n
t
he
c
urren
t
sen
sin
g
I
sense
(
ge
ner
at
ing
f
rom
the
sensing
cu
rr
e
nt
blo
c
k)
a
nd
t
he
c
urre
nt
I
TC
-
CC
-
CV
(g
e
ner
at
in
g
fro
m
the
c
urre
nts
ref
e
re
nce
blo
c
k
acc
ordin
g
t
o
the
eac
h
m
od
e).
T
he
V
G
is
evaluate
d
as
t
he
low
vo
lt
age
of
the
sign
al
sel
ect
or
ci
rcu
it
.
T
he
V
c
ontrol
(g
e
ner
at
in
g
from
the
m
ode
c
ontrol
bl
oc
k)
is
us
e
d
for
dri
ving
the sele
ct
or cir
cuit t
hat c
on
sis
ts of tw
o
tra
ns
i
stors
w
hich
is the P
MOS
(PM
2) an
d
t
he NMOS
(NM
0).
The
la
st
m
od
e
is
the
en
d
of
charge
m
ode
.
This
mode
is
made
in
dep
e
ndently
durin
g
a
co
mp
a
riso
n
betwee
n
the
c
ut
-
off
cu
rr
e
nt
(
I
cut
-
off
)
an
d
the
sensi
ng
c
urre
nt
(
I
sense
).
T
herefo
re,
if
the
I
cut
-
off
is
lower
t
ha
n
th
e
I
sense
,
the
en
d
volt
age
(V
END
)
i
s
at
the
lo
w
le
ve
l
that
ma
ke
th
e
V
control
re
quir
ed
le
vel
c
orres
pond
t
o
t
hr
ee
c
harge
modes
(TC
m
ode,
CC
m
ode
a
nd
CV
mode)
.
Else
if
the
I
cut
-
o
ff
is
higher
tha
n
t
he
I
sense
,
t
he
V
END
is
at
hi
gh
le
ve
l
that
ma
ke
the
V
control
in
the
low
le
vel
wh
ic
h
tu
r
ns
off
t
he
sel
ect
or
ci
rc
uit.
T
hat
mea
ns
t
he
V
G
is
at
t
he
highest
le
vel to ma
ke
the c
harge
proc
ess termi
nated.
Figure
7.
Sc
he
mati
c o
f
the c
ha
rg
e
contr
ol b
l
ock un
der CA
DEN
C
E s
of
t
w
are
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N: 20
88
-
8
694
A h
i
gh eff
ic
ie
ncy and h
i
gh s
pe
ed
c
harg
e
o
f
Li
-
I
on batt
ery
charger
interf
ac
e u
si
ng
....
(M
us
ta
pha El
Ala
ou
i
)
379
2.4. Le
vel
Shi
ft
er
and G
ate
Driver
The
le
vel
-
s
hift
er
blo
c
k
is
util
iz
ed
to
s
hift
t
he
lo
w
gate
volt
age
(V
G
)
(
ge
ner
at
in
g
from
the
c
harg
e
con
t
ro
l
blo
c
k)
to
a
high
volt
age
f
or
dr
i
vi
ng
the
Power
-
PMOS.
T
he
l
evel
-
s
hifter
ci
r
cuit
is
il
lustra
te
d
in
F
igure
8(
a
).
Al
so
,
the
gate
-
dr
i
ver
bl
ock
is
c
onnecte
d
t
o
the
gate
of
t
he
P
ower
-
P
M
O
S
whic
h
s
upplies
power
to
the
batte
r
y
c
ha
rg
e
via
t
he
s
wi
tc
hin
g
act
io
n,
and
the
n
t
he
s
uitable
s
um
of
cu
rr
e
nt
is
regulat
ed
i
n
the
ba
tt
ery
.
The
gate
-
dri
ve
r
ci
rcu
it
is
il
lu
strat
ed
in
F
ig
ure
8(b
).
T
he
le
vel
-
s
hifter
al
on
g
side
wit
h
t
he
ga
te
-
dri
ve
r
ac
hieves
a rise ti
me a
round 3
6
ps
,
a f
al
l t
ime aro
und 3
6
ps
a
nd a
pro
pa
gation t
ime ar
ound
0.25
ns [
7].
(a)
(b)
Figure
8.
(a
)
S
chemati
c
of
t
he
level
-
s
hifter
blo
c
k unde
r
C
AD
E
NCE
soft
war
e
, (
b) Sc
he
mati
c o
f
the
ga
te
-
dr
i
ver
blo
c
k u
nder
CA
DE
NCE softwa
re
2.5. C
urren
t Sensi
ng
Figure
9
s
how
s
the
c
urren
t
s
ensin
g
ci
rc
uit,
the
P
MOS
tr
ansisto
r
(PM
0)
use
d
in
t
he
de
sign
li
ke
a
charge
c
urre
nt
sens
or
.
T
he
OpAm
p
is
util
iz
ed
to
remai
n
dr
a
in
volt
age
of
th
e
PMOS
tra
ns
ist
or
(PM
0)
c
on
sta
nt
equ
al
t
o
th
e
V
BAT
. A
s a
r
es
ult,
the
I
sense
has b
een a
lwa
ys p
roporti
onal
to
t
he
curre
nt of t
he Po
wer
-
P
M
O
S.
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
D
ri
S
ys
t,
V
ol
.
12
, N
o.
1
,
Ma
rch
20
21
:
374
–
384
380
Figure
9.
Sc
he
mati
c o
f
the c
urre
nt
-
se
ns
in
g b
lock u
nd
e
r
C
A
DEN
C
E s
of
t
w
are
3.
SIMULATI
O
N AND L
AYOUT
3.1. Simul
at
io
n
The
pro
posed
Li
-
I
on
BC
I
de
sign
is
reali
ze
d
by
TS
M
C
180
nm
C
M
O
S
te
chnolo
gy
unde
r
Ca
den
ce
so
ft
war
e
.
In
th
is
simulat
io
n,
the
batte
r
y
ca
pa
ci
ty
sel
ect
ed
at
50
00
m
A
h,
th
e
val
ue
of
t
he
V
L
c
hosen
e
qual
2.
9
and
the
val
ue
of
the
V
H
c
hos
en
e
qual
4.2
.
T
he
wav
e
f
orms
of
the
mode
co
ntr
ol
sig
nals
(
The
V
TC
,
t
he
V
CC
and
the
V
CV
)
i
n
eac
h
ch
ar
ge
m
ode
are
prese
nted
in
F
ig
ur
e
10
(a
)
.
It
s
hows
t
hat
V
TC
is
act
ive
in
the
TC
mode
,
V
CC
is
act
ive
in
the
CC
mo
de
a
nd
V
CV
is
act
ive
in
the
CV
mod
e.
The
sim
ulati
on
res
ults
of
t
he
I
BAT
an
d
th
e
I
sense
are
pr
ese
nted
i
n
F
i
gure
10(
b).
(a)
(b)
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N: 20
88
-
8
694
A h
i
gh eff
ic
ie
ncy and h
i
gh s
pe
ed
c
harg
e
o
f
Li
-
I
on batt
ery
charger
interf
ac
e u
si
ng
....
(M
us
ta
pha El
Ala
ou
i
)
381
Figure
10.
(a)
Simulat
io
n
re
s
ults o
f
the
m
ode co
ntr
ol,
(
b) S
imulat
ion res
ul
ts of the
batte
r
y
c
urren
t
(I
BAT
)
and
the curre
nt se
nsi
ng (I
sense
)
The
simulat
io
n
res
ults
of
t
he
V
BAT
a
nd
th
e
I
BAT
in
eac
h
cha
rg
e
m
ode
(TC,
CC
a
nd
CV)
of
the
pro
po
se
d
Li
-
I
on
BC
I
are
pres
ented
in
F
i
gur
e
11(a)
a
nd
F
i
gure
11(b),
res
pecti
vely
.
A
nd
al
so
,
we
can
obser
ve
from
t
he
sim
ulati
on
that
t
he
batte
ry
ch
arg
es
quic
kly
within
thirt
y
-
three
mi
nu
te
s
(
2
kilo
-
sec
on
d).
T
he
wav
e
f
or
m
of
the
V
BAT
is
pr
e
sented
in
F
ig
ure
11
(a),
w
hich
s
hows
that
a
va
riable
value
o
f
t
he
V
BAT
is
ab
out
2.7
V
t
o
4.2
V
.
Als
o,
the
wa
ve
form
of
t
he
I
B
AT
is
prese
nted
in
F
ig
ur
e
11(b),
w
hich
sho
ws
that
t
he
I
BAT
in
t
he
TC
m
od
e
is
e
qu
al
34
2.7
m
A
a
nd
in
the
CC
mode
is
e
qu
al
1.7
A
.
A
s
well
as
the
chargin
g
proce
dure
is
com
plete
d w
he
n
the
I
BAT
is
re
achin
g
the
I
cut
-
o
ff
value
that e
qual
s a
bout
20
mA.
Figure
12
il
lus
trat
ed
th
e
r
esul
ti
ng
c
urve
of
t
he
powe
r
e
ff
ic
ie
ncy
of
t
he
propose
d
Li
-
I
on
BC
I
w
hich
achievin
g an
ef
fici
ency eq
ual
97%
of
t
he
loa
d
c
urren
t
1.7
A
. I
t i
s calc
ulate
d by eq
uatio
n:
%Efficie
ncy
=
P
Out
(
t
he
ou
tput
pow
e
r
in
Watt
s
)
P
In
(
th
e
in
put
po
we
r
c
on
su
mp
tion
in
w
a
tt
s
)
X
100
(2)
(a)
(b)
Figure
11.
(a)
The wa
veform
of the
batte
r
y v
oltage
(V
BAT
)
,
(b)
T
he wa
veform
of
t
he batt
ery cu
rr
e
nt
(
I
B
AT
)
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2088
-
8
694
In
t J
P
ow
Ele
c
&
D
ri
S
ys
t,
V
ol
.
12
, N
o.
1
,
Ma
rch
20
21
:
374
–
384
382
Figure
12. T
he
res
ulti
ng
c
urv
e of the
po
wer
eff
ic
ie
nc
y
3.2. Lay
ou
t
The
la
yout
of
the
pr
opos
e
d
Li
-
Ion
BC
I
is
s
how
n
i
n
F
igure
13.
All
de
vices
or
ci
rc
uits
pron
e
t
o
pro
du
ce
el
ect
ro
ma
gn
et
ic
inte
rf
e
ren
ce
or
s
usc
eptible
to
in
te
rf
ere
nce
a
re
enclose
d
with
double
la
ye
r
gu
a
r
d
rin
gs
.
It
is
made
by
resp
ect
i
ng
t
he
de
sig
n
ru
le
s
(D
e
ns
it
y,
DRM
a
nd
M
RC
)
a
nd
t
he
desig
ner
c
onstrai
nt
inf
or
mati
on
(
C
at
match,
text a
nd constrai
nt
mana
ger, etc.
). It is
occup
ying a t
otal area
of
0.03 mm
2
.
Figure
13.
La
yout
of the
prop
os
e
d
Li
-
Ion
B
CI
Table
1
is
s
ummari
ze
d
of
t
he
simulat
io
n
resu
lt
s
f
ound
and
a
c
ompar
at
ive
a
nalysis
betwee
n
t
he
pro
po
se
d Li
-
I
on
batte
ry cha
r
ge
r
inter
face a
nd
oth
e
r work
s/r
efere
nces.
Table
1.
C
omp
arati
ve
a
nalysi
s
Refere
n
ce
[2
2
]
(20
1
5
)
[2
3
]
(20
1
6
)
[2
4
]
(20
1
7
)
[2
5
]
(20
1
7
)
[2
6
]
(20
1
7
)
[6]
(20
1
8
)
[2]
(20
1
9
)
This
wo
rk
Top
o
lo
g
y
Ad
ap
tiv
e
LDO
Switch
in
g
Bas
ed
LDO
Switch
in
g
Bas
ed
Switch
in
g
+ L
D
O
Switch
in
g
Bas
ed
Switch
in
g
Bas
ed
Switch
in
g
Bas
ed
Techn
o
lo
g
y
1
8
0
nm
CMOS
1
3
0
nm
BICMOS
1
3
0
nm
BICMOS
3
5
0
nm
CMOS
1
8
0
nm
CMOS
2
5
0
nm
BCD
5
0
0
nm
CMOS
TSM
C
1
8
0
nm
CMOS
Maximu
m
I
n
p
u
t
Vo
ltag
e,
V
I
N(
m
ax
)
(V)
5
16
5
5
.5
5
.5
25
8
.0
-
1
0
.0
4
.5
Ou
tp
u
t Ran
g
e V
B
A
T
(V)
2
.5
–
4
.2
2
.5
-
4
.2
3
-
4
.3
2
.3
-
4
.2
2
.8
-
4
.2
6
-
22
2
.5
-
4
.2
2
.7
-
4
.2
Maximu
m
Ch
argin
g
Cu
rr
en
t,
I
B
AT
(
m
ax
)
(
A)
0
.44
8
1
.5
0
.49
5
0
.6
0
.5
2
.5
1
.5
1
.7
Peak
E
f
ficiency
(
%)
84
90
8
3
.9
9
2
.5
8
7
.6
97
8
7
.4 (CC)
8
8
.6 (CV)
97
Die Size
(
m
m
2
)
1
.62
1
2
.25
1
.41
2
.71
2
6
1
.62
2
.66
7
.29
0
.03
4.
CONCL
US
I
O
N
A
l
ow
c
os
t,
lo
w
siz
e
a
nd
high
s
pee
d
cha
rg
e
of
the
pro
pos
ed
Li
-
I
on
batte
ry
c
harger
inte
rf
ace
(BCI
)
hav
e
been
s
ucc
essfu
ll
y
desig
ne
d
a
nd
im
plem
ented
in
TS
MC
180
nm
CM
OS
proce
ss.
T
his
st
udy
inclu
ded
the
ci
rcu
it
desig
n,
sim
ulati
on
,
a
nalysis
a
nd
la
yout
desi
gn.
The
pr
opos
e
d
Li
-
Ion
BC
I
us
in
g
switc
hing
-
base
d
te
chn
iq
ue
achi
eves
a
n
outp
ut
volt
age
V
BAT
ma
y
range
f
r
om
2.7
to
4.2
V
acco
r
ding
to
a
n
in
put
volt
age
V
IN
=
4.9
V
,
and
al
s
o
achie
ve
a
maxim
um
chargin
g
batte
r
y
cu
rr
e
nt
I
BAT
equ
al
1.7
A.
T
he
ti
me
chargi
ng
is
on
l
y
thi
rty
t
hr
e
e min
utes, t
he peak
ef
fici
enc
y reac
hes 97% a
nd the t
otal are
a is o
nly 0
.03 mm
2
.
REFERE
NCE
S
[1]
D.
Andrea
,
“Ba
t
te
ry
Man
ageme
nt
Sys
te
ms
for
La
rge
Lithium
-
I
on
Battery
Pack
s
,
”
Norw
o
od,
M
A:
Artec
h
Hous
e,
2010.
Evaluation Warning : The document was created with Spire.PDF for Python.
In
t J
P
ow Elec
& Dri S
ys
t
IS
S
N: 20
88
-
8
694
A h
i
gh eff
ic
ie
ncy and h
i
gh s
pe
ed
c
harg
e
o
f
Li
-
I
on batt
ery
charger
interf
ac
e u
si
ng
....
(M
us
ta
pha El
Ala
ou
i
)
383
[2]
C.
C
.
Wa
ng
and
G.
X.
Li
u
,
“A
1.
5A
88.
6%
Li
-
i
on
ba
tt
ery
ch
arg
er
d
esign
using
pulse
sw
allow
t
ec
hniqu
e
in
li
gh
t
loa
d,
” in
Proc
.
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f
2019
I
EEE
Int
.
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C
ircui
ts and
System
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,
May
2019
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[3]
M.
G.
Ega
n
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D
.
L.
O'S
ullivan
,
J.
G.
Hay
e
s,
M.
J
.
Wille
rs
,
and
C
.
P.
Henz
e,
“
Pow
er
-
Fact
or
-
Corr
ecte
d
Sing
le
-
Stag
e
Induc
ti
v
e
Ch
arg
er
for
E
lectr
i
c
V
ehi
c
le
Batteries,
”
in
IE
EE
Tr
ansacti
ons
on
Indus
trial
El
e
ct
roni
cs
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F.
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h
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M.
El
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outa
hiri,
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em
ch
i,
K
.
E
l
Kh
adi
ri
,
A.
T
ahi
ri
,
and
H.
Qjidaa,
“
High
Eff
i
ci
en
cy
Buck
-
Boost
Con
ver
te
r
with
Three
Modes
Select
i
on
for
HV
Applic
a
ti
ons
using
0
.
18
μm
Technol
o
gy
,
”
ECTI
-
EEC
,
vol.
18
,
no
.
2
,
pp
.
137
–
144
,
Aug.
2020,
DO
I:
h
tt
ps
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10
.
379
36
/e
c
ti
-
e
ec.2020
182.
222580.
[5]
L.
Lu
,
X
.
H
an,
J
.
Li,
J
.
Hua
,
and
M.
Ouyang,
“A
rev
ie
w
on
the
k
ey
issues
for
lith
ium
-
ion
ba
tt
ery
ma
nag
em
en
t
in
el
e
ct
ri
c
v
ehi
c
le
s
,
”
Journal
of
Powe
r
Source
s
,
vol.
226
,
pp.
272
–
288
,
2013,
DO
I:
htt
ps://
do
i.
org/1
0.
1016/j.jpowsour.2012
.
10
.
060.
[6]
J.
F.
Wu,
C
.
L
.
We
i
,
and
Y.
Z.
J
uang,
“A
mono
lithic
high
-
vo
ltage
Li
-
Ion
ba
tt
ery
c
har
ger
with
shar
p
mode
tr
ansit
io
n
and
par
t
ia
l
cur
r
ent
con
trol
t
ec
h
nique
,
”
IE
EE
T
rans
act
ions
on
Circui
ts
and
Sy
stems
I:
Re
gula
r
Pape
rs
,
v
ol.
6
5
,
n
o.
9
,
pp
.
3099
–
3109,
Sep
.
2018
,
DO
I:
10.
1109
/TCS
I.
2018.
27996
14.
[7]
M.
El
Alaoui,
F.
Fara
h,
K.
El
Kh
adi
ri
,
H.
Qjidaa,
A.
Aara
b
,
A.
Lakhs
sass
i
,
and
A.
Ta
hir
i,
“De
sign
and
Analysis
of
New
Le
ve
l
Shift
er
W
it
h
Ga
te
Drive
r
for
Li
-
Ion
B
at
t
ery
Charg
er
i
n
180nm
CMO
S
Technol
ogy
,
”
Ir
anian
J
ournal
of
El
e
ct
rica
l
and
E
le
c
tronic
Engi
n
e
ering
,
vo
l.
04
,
pp
.
477
–
484
,
201
9,
DO
I:
10
.
2206
8/IJEE
E
.
15.
4
.
47
7.
[8]
S.
Kee
ping
,
“Unde
rstandi
ng
th
e
adv
ant
ag
e
and
disadva
n
ta
ge
o
f
li
n
ea
r
r
egulato
rs
,
”
E
lectr
oni
c
Product,
Dig
ikey
Artic
l
e
L
ibra
ry
,
2012
.
[9]
C.
H.
Li
n,
C
.
Y.
Hs
ie
h
,
and
K.
H.
Chen
,
“
A
Li
-
ion
b
at
t
er
y
ch
arg
er
with
smooth
con
trol
ci
rcu
it
and
bui
lt
-
in
resista
nc
e
com
p
ensa
tor
for
ac
h
i
evi
ng
stable
and
fast
ch
arg
ing
,
”
IEE
E
Tr
ans.
on
Circui
ts
&
System
s
-
I
:
R
egul
ar
Pape
rs
,
vol
.
57
,
no.
2
,
pp
.
506
–
5
17,
Feb
.
2010
,
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OI:
1
0.
1109/
TC
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0.
[10]
S.
H.
Yang,
J.
W.
L
iu,
and
C.
C.
Wa
ng
,
“A
single
-
ch
ip
60
-
V
bulk
cha
rg
er
for
serie
s
Li
-
ion
ba
tt
eries
with
smo
oth
cha
rge
-
mode
tr
a
nsiti
on,
”
IEEE
Tr
ans.
on
Circuit
s
&
Syst
ems
-
I
:
R
egul
ar
Pap
ers
,
vol
.
79,
no
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7,
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1588
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,
Jul
.
2
012,
DO
I: 10.1109/
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2177137.
[11]
T.
C
.
Huang
,
R
.
H.
Peng,
T.
W
.
Tsai
,
K.
H.
Che
n,
and
C.
L
.
W
e
y,
“Fast
Chargi
n
g
and
High
Eff
i
c
ie
ncy
Sw
it
chi
ng
-
Based
Ch
arg
er
Wi
th
Cont
inuou
s
Buil
t
-
In
R
esist
anc
e
De
te
c
ti
on
a
nd
Autom
at
i
c
E
ner
gy
De
li
ve
r
C
ontrol
for
Port
ab
le
El
e
ct
roni
cs
,
”
IE
EE
Journal
Of
S
oli
d
-
State
C
ircuits
,
vol
.
49
,
no
.
7
,
J
ul
.
2014
,
DO
I:
10.
1109/JS
SC
.
2014.
2312411.
[12]
P.
H.
V.
Quang,
T
.
T.
Ha
,
and
J
.
W
.
Lee,
“A
fully
integra
te
d
multim
ode
wir
el
ess
power
ch
arg
er
I
C
with
ad
apt
iv
e
supply
cont
rol
a
nd
buil
t
-
in
resist
anc
e
com
p
ensa
tion,”
I
EE
E
Tr
ansacti
ons
on
Indu
strial
Elec
troni
c
s
,
vol.
62
,
no
.
2,
pp.
1251
–
1261
,
2015,
DO
I:
10
.
1
109/T
IE
.
2014.
2
336618.
[13]
M.
Ourem
chi,
M.
El
Alaou
i,
F
.
Fara
h
,
K.
El
Khadir
i,
H
.
Qii
daa
,
A
.
La
khss
a
ss
i,
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e
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n
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r
for
Portab
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De
vic
e
Pow
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Man
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m
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,
”
2018
6th
In
te
rnationa
l
R
ene
wabl
e
and
Sustainabl
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Confe
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with
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Bu
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Boost
DC
–
DC
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a
Portabl
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Pow
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I
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A
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t
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i
abl
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cc
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