TELKOM
NIKA
, Vol.14, No
.1, March 2
0
1
6
, pp. 64~7
1
ISSN: 1693-6
930,
accredited
A
by DIKTI, De
cree No: 58/DIK
T
I/Kep/2013
DOI
:
10.12928/TELKOMNIKA.v14i1.2832
64
Re
cei
v
ed O
c
t
ober 1
2
, 201
4; Revi
se
d Febru
a
ry 16, 2
016; Accepte
d
February 2
7
, 2016
SPICE Engine Analysis and Circuit Simulation
Application Development
Bing Ch
en*
1
, Gang Lu
2
, Yuehai Wa
ng
3
1
Colle
ge of Ele
c
tronic Eng
i
ne
erin
g, Naval U
n
iv
ersit
y
of En
gin
eeri
ng,W
u
H
an,43
00
33, Chi
n
a
2
Equipm
ent De
partment of the
Nav
y
, Be
iji
ng,
100
05
5, Chin
a
3
School of el
ec
trical inform
atio
n eng
in
eeri
ng, North Ch
ina U
n
iversit
y
of T
e
chno
log
y
, Be
iji
n
g
, 1001
44, Ch
i
n
a
*Corres
p
o
ndi
n
g
author, e-ma
i
l
: chenb
in
g07
1
0
@1
26.com
A
b
st
r
a
ct
Electrical
d
e
si
gn
auto
m
ation
pl
ays a
n
i
m
p
o
rtant
ro
le
in
now
adays
e
l
ec
tronic i
n
d
u
stry. Vari
ous
commercia
l Si
mu
lati
on Pr
ogr
am w
i
th Integr
ated
Circu
it
E
m
p
has
is (SPIC
E
) pack
ages, s
u
ch
as pS
pic
e
Or
CAD, hav
e b
e
c
ome the
stan
dard c
o
mp
uter
progr
a
m
for e
l
ectrical s
i
mul
a
tion, w
i
th n
u
m
e
r
ous co
pies
in
use
w
o
rldw
ide. T
h
e
customi
z
e
d
s
i
mu
lati
on softw
are w
i
th
copyri
ght ne
ed the
u
ndersta
ndi
ng a
nd
usi
ng of
SPICE
eng
ine
w
h
ich
w
a
s ope
n-so
ur
ce sh
ortly
after its b
i
rth.
T
h
e
i
nner
w
o
rkin
gs
of SPICE, i
n
cl
udi
ng
al
gorith
m
s,
data structur
e
an
d co
de
structur
e
of SPICE w
e
re
ana
l
y
z
e
d, a
nd
a
eng
ine
p
a
ckag
e
a
nd
ap
plic
ati
o
n
deve
l
op
ment a
ppro
a
ch w
e
re prop
osed. T
he
exper
iments ve
rified its feasi
b
i
lity and acc
u
ra
cy.
Ke
y
w
ords
:
SPICE engi
ne a
n
a
lysis, Circu
it Simulati
on Ap
p
licatio
n, Si
mul
a
tion an
alysis
Copy
right
©
2016 Un
ive
r
sita
s Ah
mad
Dah
l
an
. All rig
h
t
s r
ese
rved
.
1. Introduc
tion
Knowle
dge
o
f
the behavio
r of ele
c
tri
c
al
circui
t
s
re
qui
res the
simult
aneo
us
sol
u
tion of a
numbe
r
of eq
uation
s
.The
model
creatio
n [1], ci
rcuit
si
mulation [
2
] a
nd te
sting [3],
and
ap
plication
of analo
g
circuit and VLSI
[4] requi
re th
e assi
ssta
n
ce
of simul
a
tion
tools. A
s
a
g
eneral-purpo
se
circuit-simul
a
tion p
r
og
ram t
hat solve
s
th
e network e
q
uation
s
for th
e nod
e voltag
e for
nonlin
e
a
r
DC,
nonlin
ea
r tra
n
si
ent, a
nd line
a
r AC analy
s
is, SP
ICE in its different ve
rsion
s
h
a
s
bee
n t
he
main comput
er-aide
d
anal
ysis p
r
og
ram
used i
n
anal
og de
sign, a
nd diag
no
sis
for re
sea
r
che
r
s,
printing
ci
rcui
t board an
d
electri
c
al
dev
ice m
anufa
c
t
u
re fo
r e
ngin
eerin
g a
nd in
universitie
s
and
colle
ge
s for
stude
nt edu
cation for
ove
r
40 ye
ars.
This wid
e
ly
u
s
ed spi
c
e
-
sof
t
ware
s,
su
ch
as
pSpice,
hSpi
ce, n
g
Spi
c
e,
sha
r
e
s
sam
e
engin
e
whi
c
h
wa
s re
-devel
oped
o
r
mo
di
fied on
the
b
a
se
of Berkel
ey's
kernel an
d to provide va
rio
u
s interfa
c
e
s
and fun
c
tion
s.
Ho
wever, thi
s
co
mme
rcial
softwa
r
e ca
nnot be u
s
e
d
to develop
custo
m
ized
softwa
r
e
free. In fa
ct, it is well
kno
w
n that SPICE
engin
e
i
s
op
en-sou
r
ce a
n
d
free
u
s
e by
re
sea
r
che
r
s
all
over the worl
d. To make cu
stomized
simulati
on
software, re
sea
r
che
r
s
had va
riou
s custom
er
modificatio
n
after analy
s
is of the simul
a
tion algo
ri
th
ms [5],data structu
r
e an
d
cod
e
structu
r
e. In
1980
s, SPICE with versio
n 2 h
ad
alre
a
d
y re
writed
in
C
cod
e
a
nd
ported
in P
C
[6]. The 19
90
s
sa
ws vario
u
s expan
sion
o
f
SPICE with
multim
edia
tech
nolo
g
y [7] and
networks [8, 9]
with i
t
s
appli
c
ation i
n
engin
e
e
r
an
d edu
catio
n
. In the late
r two de
cad
e
s, th
e sim
u
lation
algorith
m
s
were
contin
ou
sly modified to speed the con
v
ergen
ce [1
0
,
11] and improve the accura
cy [12]. In
the
new centery,
variou
s virtu
a
l ci
rcuit la
ba
roty [
13,
1
4
] and studi
es
[15-1
7
]
ha
d b
een build
by the
aid of these
custo
m
ized
spice-li
ke
si
mulation
s. To the autho
r's kno
w
led
g
e
,
there is lit
tle
informatio
n a
v
iable abo
ut the com
putat
ion pri
n
ci
ple
and its
simul
a
tions
of the SPICE engi
ne.
Furthe
r, the detail informa
t
ion
about the re-d
evelop
ment of the
simulatio
n
so
ftware with
spice
engin
e
and
C++ i
s
also hel
pful to prog
ra
mmers.
In this pa
pe
r, we
con
d
u
c
te
d this
study t
o
analy
z
e the
inner workin
gs of SPICE
engin
e
and
cu
stomi
z
ed si
mulatio
n
software
dev
elopme
n
t ba
sed on
the
spi
c
e
ke
rnel. T
h
e expe
riment
s
verified the feasibility and a
c
cura
cy of the prop
osed a
ppro
a
ch.
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
1693-6
9
30
SPICE Engine Analysis a
n
d
Circuit Simula
tion Appli
c
ation De
vel
o
p
m
ent (Bing Chen)
65
2. Inside of SPICE
2.1. Introduc
tion of SPICE
SPICE stand
s fo
r Simulati
on Program
with Integ
r
ate
d
Ci
rcuit Emp
hasi
s
. It was
born
a
s
a cl
ass proje
c
t at th
e
Univ
ersity
of California,
Berkel
ey du
ring
the
mid-197
0s a
nd first
rele
a
s
ed
in 1971. After its first prese
n
ted at a con
f
eren
ce
in 19
73, this invaluable p
r
og
ra
m soon evolv
e
d
to universally
used
softwa
r
e a
nd th
en
to be
come
the
worl
dwi
d
e
stan
dard int
egrate
d
circu
i
t
simulato
r in
1980
s. Now
SPICE is a
gene
ral
-
pu
rp
ose, o
pen
so
urce a
nalo
g
electroni
c
circuit
simulato
r used in integra
t
ed circuit and boa
rd-l
evel
desig
n
to check the integrity of circu
i
t
desi
g
n
s
, to predict ci
rcuit behavior, an
d even to
locat
e
the potentia
l erro
rs in
circuit board.
2.2.
SPICE Algorithm Ov
erv
i
e
w
Figure 1 ha
s
given a si
mpli
fied block di
a
g
ram
of the main SPICE
prog
ram flo
w
.
We
can
see fro
m
Fig
u
re 1, wh
en a circuit de
scription wa
s in
put to SPICE, its initial operating p
o
int wa
s
cal
c
ulate
d
first, and the line
a
r compa
n
ion
model
s wa
s
then create
d
for non
-
line
a
r device
s
. The
n
SPICE entered its first
kernel p
r
o
c
e
s
s--blo
ck 3
and 4, which stand fo
r Nodal An
al
ysis
accompli
sh
ed
by formulati
ng the
Nodal
Matrix
and
solving
the n
odal equ
atio
ns
fo
r
th
e circuit
voltages. SPICE finds the
solution for
Non
-
line
a
r ci
rcuits in the i
nner lo
op (2
-6). It may ta
ke
many iteratio
ns befo
r
e the
calcul
ation
s
conve
r
ge to
a solutio
n
. The outer lo
op
(7-9
), togeth
e
r
with the inner loop, performs a Tra
n
si
e
n
t Analys
is creating equiva
lent linear mo
dels for e
n
ergy-
stora
ge comp
onent
s for ca
pacito
r
s, ind
u
c
tors, etc. an
d sele
cting th
e best time p
o
ints.
Figure 1. The
Flowcha
r
t of SPICE Algorithm
2.2.1.
Nodal Anal
y
s
is
At the co
re
of the SPICE engin
e
i
s
a ba
si
c te
ch
nique
called
No
dal An
al
ysis th
at
cal
c
ulate
s
th
e voltage
at
any no
de
given all
re
si
st
a
n
ce
s (
c
on
du
c
t
ance
s
)
a
nd c
u
rr
ent
sou
r
ce
s
of
the circuit. When a ci
rcuit wa
s input, as sho
w
n in
Fig
u
re 2, the SPICE engine
calcul
ate the the
set of nodal e
quation
s
accordin
g Kircho
ff Law. Thes
e
set of equations
will be co
nveted to matrix
form usi
ng mathmatical analysi
s
and
numeri
c co
mputing. Th
e freque
ntly used meth
od i
s
Gau
ssi
an
Eli
m
ination and LU
F
a
cto
r
iz
ation. At last, the eq
uation i
s
solved fo
r t
h
e no
de volta
g
e
s
and this e
qua
tion is the ce
ntral me
cha
n
i
s
m of the SPICE algo
rithm.
2.2.2.
Non-Li
near DC An
a
l
y
s
is
SPICE can fi
nd the voltag
e at every no
de in
a
DC li
near
ci
rcuit by only executi
ng mod
e
3 and 4. If a
n
y non-li
nea
r comp
one
nts appe
ar in th
e circuit, SPICE will first tran
sformi
ng t
he
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 14, No. 1, March 2
016 : 64 – 71
66
non-li
nea
r
co
mpone
nts int
o
some
eq
uivalen
c
e
circuit
suitabl
e fo
r
Nodal An
alysi
s
, and t
hen
fin
d
a
solutio
n
a
s
if
it was a lin
ea
r ci
rcuit, but u
s
ing
a
little g
uessin
g
an
d
a lot mo
re tri
p
s. Thi
s
p
r
o
c
ess
covers
step 2
-
5, i.e. the inner loop.
As an
examp
l
e, the ci
rcuit sho
w
n i
n
Fi
gure
2 in
clud
es a ve
ry no
n-line
a
r
com
pone
nt, a
diode.
Figure 2. A Simple No
n-lin
ear Di
ode
Circuit and p
a
rt of its equivale
nt circuit
Diod
e's
cu
rre
nt versu
s
voltage rel
a
tion
ship is de
scrib
ed by:
e
x
p
1
(1)
Whe
r
e
IS
is the saturati
on cu
rrent and
V
t
is the thermal voltage. A diod
e can be
modele
d
u
s
in
g linea
r
com
p
onent
s -- a
p
a
rallel
combi
nation of
a condu
ctan
ce
G
eq
and a
current
sou
r
c
e
I
eq
, where
G
eq
is si
m
p
ly the slope
of t
he tangent
at the operati
ng point
V
do
.
ex
p
(2)
And
I
eq
is the
point wh
ere t
he tange
nt sli
c
e
s
throu
gh the y-axis.
(3)
After this equi
valent sub
s
tition, the nodal
equatio
ns
ca
n be develo
p
ed as:
1
2
(
4
)
The wh
ole so
lution loo
ks li
ke this:
1) Gue
s
s the
diode'
s initial
trial ope
rating
point.
2) Create lin
e
a
r co
mpa
n
ion
models.
3) Solve No
d
a
l Equation
s
.
4) Co
nvergen
ce?
|V
n
- V
n-
1
|<
V
lim
it
and |I
n
- I
n-1
| <
I
limit
?
5) No
--Use the cal
c
ulate
d
diode voltage
a
s
new trial operati
ng point for anoth
e
r
iteration. Start again at Step 2.
6) Yes
- Stop iteration
s
and
find the solut
i
on.
In SPICE, the
limits of voltage and
curre
n
tare a
c
tually
calculated by
[18].
V
limit
= V
n
*
R
E
L
L
O
T+
VN
TO
L
I
limit
= I
n
* RELLOT+
ABSTOL
By default, RELTOL i
s
set
to 0.001 o
r
0
.
1
percent. So if the expected voltage is 5
V
, the
V
li
m
i
t
should b
e
set to 5
mV
to reach a
solutio
n
. However, if the excepted volta
ge swing
s
ne
ar
zer
o
,
V
lim
i
t
would be ridi
cul
ous
small an
d hard to be
rea
c
he
d. Tha
t
's whe
r
e VNTOL ente
r
s t
h
e
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
1693-6
930
SPICE Engine Analysis a
n
d
Circuit Simula
tion Appli
c
ation De
vel
o
p
m
ent (Bing Chen)
67
picture. Th
e
default of V
N
TOL i
s
1
μ
V
to en
su
re
s th
at the limit d
o
e
sn't
get too
small if volta
ges
approa
ch 0
V
. RELTOL and ABSTOL
play a s
i
milar role for the
current
c
hange limits
,
and t
he
default for ABSTOL is
1
PA
.
2.2.3. Transi
ent Analy
s
is
SPICE execu
t
ed the outer loop fo
r the
linear
circuit
transi
ent ana
lysis. If there
is any
energy-stora
ge com
pon
en
t,
su
ch as
ca
pacito
r
and
in
ducto
r, SPICE first t
r
an
sfo
r
med
the
en
e
r
gy-
stora
ge co
m
pone
nts
i
n
to their
lin
ea
r compani
on m
odel
s, an
d u
s
ed
Nodal
Analysi
s
to fin
d
the
solution. For
example, for the
capacitors, SPICE
will use
backward-Euler(BE
)
to
predi
ct the next
approximate
value at a fut
u
re time
poin
t
t
n+1
. The ide
a
of EU i
s
predictin
g the n
e
xt voltage with
the slop
e at x
n+1
as the followin
g
equati
on:
(5)
Whe
r
e
∆
1
.
Grap
hically, it looks som
e
thing like Figu
re 3.
Figure 3. Nu
meri
c integration applie
d to
approxim
ate the next voltage
SPICE will first try to transform an energy-s
torage component
int
o
its equivalent linear
comp
one
nt. For exampl
e, a capa
citor i
s
tran
sform
ed u
s
ing a two ste
p
pro
c
e
ss:
The rel
a
tion
ships of a cap
a
citor's voltag
e-current
-cha
rge can be d
e
s
cribe
d
as:
(6)
Next, apply the BE formula to predi
ct the cap
a
cito
r'
s voltage at the next time point.
(
7
)
Finally, we ca
n get an equ
a
t
ion in te
rms
of voltages a
nd cu
rrents o
n
ly:
(8)
At this
time,
we can transform a c
a
pac
i
tor
circuit shown as Fi
g
u
re 4
with its Line
ar
comp
anio
n
m
odel, wh
ere
,
.
.
Figure 4. A Transi
ent Analysis
Circuit
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 14, No. 1, March 2
016 : 64 – 71
68
With this
equ
ivalent su
bsti
tution, SPICE
can
develo
p
the nod
al eq
uation
s
an
d find the
every n
ode
voltage
s fo
r
certain
time. T
hen, SPICE
woul
d fo
rwa
r
d a
time
step
and
repe
at the
same p
r
o
c
e
d
u
re to find the
voltages at that time, and so on till the last time.
SPICE can set timestepdy
namically to trade
offsi
m
ul
ation accu
ra
cy and spee
d. If
the
cha
nge
of
current o
r
volta
g
e
is ra
pid, SP
ICE wo
ul
d
re
duce its ste
p
to increa
se
th
e preci
s
e
of t
h
e
simulatio
n
, and vice versa
.
3. SPICE Code Strcture
The sim
p
lified block diag
ram of SPICE
engin
e
cod
e
stru
cture ca
n be sh
own in
Figure 5,
whe
r
e seven
Module
s
a
r
e i
n
clu
ded.
1)
Comm
and P
a
rsi
ng: The
kernel
of this
block is
co
m
n
stru
ctu
r
e, whi
c
h in
clud
e
s
the na
me o
f
the com
m
an
ds a
nd thei
r
corre
s
p
ondin
g
functio
n
s.
The p
r
og
ram
impleme
n
te
d an a
r
ray of
comn
stru
ctu
r
e th
at defin
e
s
the
comma
nds
which S
P
ICE ca
n p
a
r
se
a
nd it
s
correspon
ding
action
s. Whe
never a
co
m
m
and
wa
s in
put, SPICE
parses it a
nd f
i
nds it
s match from the
se
t
of comma
nd
s, and execute
s
the co
rresp
ondin
g
actio
n
.
2)
Circuit
De
scri
ption: The
m
o
st imp
o
rta
n
t data
st
ru
ct
u
r
e of
t
h
i
s
blo
c
k i
s
CK
T
cir
c
uit
st
ru
ct
u
r
e,
whe
r
e contai
ns the devi
c
e
type, simulation ty
pe, temperatu
r
e, and
node info
rmat
ion, etc.
3)
Sparse M
a
tri
x
: This bl
ock
define
s
SMP
element
stru
cture to
rep
r
e
s
ent the n
on-zero item
s
of
spa
r
se mat
r
ix whe
r
e th
e items
are
sto
r
ed with i
n
cre
a
sin
g
orde
r a
s
they ap
pea
r in the
ro
w o
r
c
o
lumn of The matrix.
4) Num
e
ri
cal
Computatio
n: This blo
c
k co
ntai
ns t
w
o typical n
u
meri
cal met
hod
s: Newt
on-
Rap
h
son ite
r
ation a
nd
nu
meri
cal i
n
tegration. In
SPICE, they
were us
ed to trans
f
orm the set
of differential equatio
ns int
o
a set of alg
ebrai
c eq
uati
ons.
Figure 5. Cod
e
Structu
r
e of
SPICE engine
6) Devi
ce Block co
ntain
s
two stru
ctures
, DEV mo
de land SPICE dev.DEV model lists
the
model
s of the device typ
e
s u
s
ed in g
i
ven circ
uit a
nd SPICE dev contain
s
the co
mplet
e
informatio
n of every comp
o
nent in the circuit.
7) Interfa
c
e:
this block is de
signe
d to
be a gene
ralized an
d open st
ru
cture, and use
d
to
comm
uni
cate
betwee
n
the Front an
d en
d of simulatio
n
system.
4. Applicatio
n Interface o
f
SPICE engine
SPICE engin
e
can be p
a
c
kage to a numbe
r of indepe
ndent code procedu
res
with
pre
s
crib
ed in
terface. In th
is way, a bl
ock c
an call
ce
rtain
pa
ckage
to comp
lete
given work
according to
the interfa
c
e.
In additi
on,
any block
ca
n be maintai
ned, upd
ated
，
even re
writt
en
indep
ende
ntly.
Basically, SPICE operates like this:
1) SPICE
rea
d
s in
a text circuit
de
script
ion file
(“.ci
r
” extensio
n) ca
lled
a netlist, and
the
n
set
s
th
e
c
o
rr
es
po
nd
in
g
Pa
ra
me
te
r
s
.
2) SPICE se
ts the simul
a
tion option
s
and per
fo
rmed ce
rtain
analysi
s
type as given (AC
,
Tran
sie
n
t, DC, Noi
s
e, etc.
) by calling
th
e interface of analysi
s
procedure.
Let's ta
ke tra
n
sie
n
t (time) analysi
s
for Linear
Circu
i
ts as an
example to inv
e
stigate.
SPICE wo
uld
call
fuctio
nDCTran fi
rst
wi
th the give
n
circuit
de
script
ion. Insi
de thi
s
fun
c
tion,
an
d
device i
n
formation
woul
d
be fou
nd
a
c
cordi
ng to
every devi
c
e
model. An
operating
poi
nt is
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SPICE Engine Analysis a
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d
Circuit Simula
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ation De
vel
o
p
m
ent (Bing Chen)
69
requi
re
d for the initial solut
i
on to a Tran
sient Anal
ysi
s
. After the initial operating
point wa
s fou
nd,
this functio
n
set the time
step an
d opt
ion param
ete
r
call the inn
e
r loop to
solve the Nod
a
l
equatio
n. Th
e re
sults i
s
a
c
qui
red from
the spa
r
se m
a
trix and st
ored in the
stru
cture
TRA
N
a
n
,
whe
r
e it can
be print o
r
draw by ".PRINT" or".PLOT" comm
and.
5. Experiments of u
s
ing SPICE Engine
SPICE engin
e
can inte
ra
ctive with
en
d u
s
er
by co
mmand
line
s
only. The
r
ef
ore, it'
s
conve
n
ient to
encap
sulate
the engin
e
to dynami
c
li
nk lib
ra
ries i
n
the integ
r
a
t
ed develop
ment
environ
ment like
vi
sual st
udio 2010. T
hese
lib
rari
es we
re th
en
p
a
ckag
e to b
e
a e
ngine
cl
a
ss
with expo
sin
g
app
rop
r
iate
interfa
c
e
s
to
the call
er. For ins
t
anc
e
, t
he interfac
e func
tion for the
transi
ent
ana
lysis
de
scrib
ed p
r
evio
usly
may lo
ok li
ke "B
OOL
tran
(char* file
name, i
n
t st
ep,
intend_t, intst
a
rt_t, intmaxstep)", where
the input
parameter ca
n b
e
the file
na
me an
d path
of
circuit d
e
scri
ption, timeste
p
, endtime,
starttime
(with
the defa
u
lt value
ze
ro),
a
nd max time
step
allowed. Thi
s
functio
n
retu
rns T
URE
when it
com
p
l
e
tes th
e a
nal
ysis
and
retu
rn FALSE
when
any error was found.
Then vari
ou
s application
s
about different circuit an
alysis a
nd fa
ult simulation
can be
develop
ed
wi
th the SPICE engin
e
tha
t
wa
s pa
cka
ged a
s
a
cl
ass. Here
we build
a
sin
g
le
document M
F
C a
ppli
c
atio
n that calls th
e SPICE en
gine. It rea
d
s
a
netlist file a
s
input, an
d
sets
analysi
s
type
, simulation
para
m
eters b
y
a dialogu
e. Then the
ap
plicatio
n call
s the engin
e
to
simulate th
e behavio
r of the inputting
circuit. The
si
mulation resu
lts we
re outp
u
tted as text file.
Figure 6 sho
w
s th
e appli
c
ation ru
nnin
g
interface. It
displ
a
ys a o
p
e
rato
r amplifi
ed ci
rcuit in the
wind
ow fra
m
e and re
ad
s u
s
er d
e
fined a
nalysi
s
para
m
eters.
Figure 6. Simulation Appli
c
ation Exampl
e
Figure 7. OP AMP circuit under te
sting
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93-6
930
TELKOM
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Vol. 14, No. 1, March 2
016 : 64 – 71
70
To verify the
feasibility of this a
pproa
ch
and inve
stiga
t
e the accu
ra
cy of SPICE engin
e
,
the sam
e
ci
rcuit was
build
and an
alyze
d
with t
he sam
e
paramete
r
s and an
alysi
s
type in OrCA
D
Captu
r
e, a fa
mous bu
sine
ss
softw
are. Figure 7 i
s
schem
atic
Of the testing
circuit in
orCA
D
Captu
r
e.
These two g
r
oup
s of sim
u
lation data
were expo
rte
d
to Matlab to investiga
t
e the
differen
c
e. Fi
g 8 is
re
sult g
i
ven by Matla
b
wh
er
e th
e solid line
rep
r
e
s
ent the
re
sul
t
s from O
r
CA
D
Captu
r
e, an
d
the dot line
rep
r
e
s
ent the
results from
the testing a
pplication. It is cl
ear th
at the
results
are in
acco
rd
with
each oth
e
r i
n
most
ca
se.
There a
r
e
also some
difference d
ue to t
h
e
possibl
e diffe
ren
c
e i
n
d
e
vice m
odel
s, a
nd mayb
e in
tegration
met
hod
s. The
m
o
st
signifi
can
t
differen
c
e lie
to the maximumValue
with
only 2.13% difference.
Figure 8. Experiment result
As the re
sult, our ap
proa
ch
of using SPICE
engin
e
turns out to be a
suitable for f
u
rthe
r
softwa
r
e dev
elopme
n
t.
6.
Conclusio
n
In this pape
r, the kern
el algorithm an
d co
d
e
stru
ctu
r
e of SPICE e
ngine were analyze
d
,
and an
soft
ware archite
c
ture th
at p
a
ckag
e
SPICE engi
ne
as
class a
n
d
calle
d by
other
appli
c
ation
s
is pro
p
o
s
ed.
The expe
rim
ent veri
fied the feasi
b
ility
and a
c
cura
cy
of the propo
sed
approa
ch. Th
is re
se
arch
can be u
s
e
d
to develop
me
nt cu
stomize
d
simul
a
tion
softwa
r
e
with
fully
simulatio
n
ty
pies an
d all
cu
stome
r
ed
para
m
eters
a
v
iable. Fu
rth
e
rmo
r
e, it
ca
n ea
sily u
s
e
d
to
develop
e the
fault simul
a
tion by
simply
repl
ace
the
function
mod
e
l of the d
e
vice
s a
s
a fa
ul
t-
injected model.
Furthe
r
wo
rks involve
s
t
w
o pa
rts.
One
is det
ail
s
of engi
ne,
su
ch a
s
it
s al
go
rithm, its
analysi
s
, its
para
m
eter se
tting. Theoth
e
r i
s
re
sult
d
a
ta p
r
o
c
essin
g
, su
ch
a
s
F
ourie
r t
r
an
sfo
r
m,
wavelet an
alysis a
nd featureextractio
n
.
Referen
ces
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ne M, A
h
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1693-6
930
SPICE Engine Analysis a
n
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Circuit Simula
tion Appli
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ation De
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m
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71
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