TELKOM
NIKA
, Vol.13, No
.3, Septembe
r 2015, pp. 8
06~812
ISSN: 1693-6
930,
accredited
A
by DIKTI, De
cree No: 58/DIK
T
I/Kep/2013
DOI
:
10.12928/TELKOMNIKA.v13i3.1972
806
Re
cei
v
ed Ap
ril 5, 2015; Re
vised June
2
1
, 2015; Acce
pted Jul
y
4, 2
015
A Real-time SAR Echo Simulator Based on FPGA and
Parallel Computing
Xu Yinhui*,
Zeng Dazhi,
Yan Tao, Xu Xiaoheng
Dep
a
rtment of Electron
ic Engi
neer
ing, Sc
h
o
o
l
of Information
and Electro
n
ic
s,
Beiji
ng Institute
of
T
e
chnolo
g
y
, Beijin
g 10
008
, China
*Corres
p
o
ndi
n
g
author, e-ma
i
l
: xu
yi
nh
ui7
7
7
@
16
3.com
A
b
st
r
a
ct
T
h
is pap
er des
igns a
nd i
m
p
l
e
m
e
n
ts a SAR (Synt
hetic Aper
ture Rad
a
r) re
al-ti
m
e ec
ho si
mu
lato
r
base
d
on
mul
t
i-F
P
GA parall
e
l co
mp
utin
g. T
he on
e-
di
mensi
ona
l freq
u
ency-d
o
m
ai
n
F
ourier tra
n
sfor
m
alg
o
rith
m
is us
ed
in th
e s
i
mul
a
tor, an
d th
e e
c
ho s
i
gn
al
mod
e
l
and
the
rap
i
d ca
lcul
atio
n a
l
gorith
m
of i
m
p
u
ls
e
respo
n
se funct
i
on ar
e intro
d
u
c
ed. T
he pi
pel
ine co
m
pute s
t
ructure, mu
ltic
han
nel
para
lle
l
computin
g an
d
proce
dure
flow
desi
g
n
are
the
key tech
no
log
i
es of th
e
si
mul
a
tor, w
h
ich
are
also
pres
ente
d
in
d
e
tails. A
n
d
finally,
the
val
i
d
ity a
n
d
correc
t
ness of
the
S
A
R ec
ho
si
mu
l
a
tor ar
e v
e
rifie
d
thro
ug
h th
e i
m
a
g
i
ng r
e
su
lts of
the poi
nt-array
target and
th
e nature sce
ne t
a
rget.
Ke
y
w
ords
:
SAR, real-ti
m
e s
i
mulat
o
r, DRF
M, parall
e
l co
mputin
g
Copy
right
©
2015 Un
ive
r
sita
s Ah
mad
Dah
l
an
. All rig
h
t
s r
ese
rved
.
1. Introduc
tion
SAR real-tim
e e
c
ho
si
mul
a
tor i
s
equi
p
m
ent for SA
R te
st a
nd
e
v
aluation, a
n
d
it h
a
s
arou
se
d more and more con
c
e
r
n from
sch
olars an
d engine
ers
nowaday
s [1-3]. SAR real-time
ech
o
sim
u
lat
o
r receive
s
transmitted
sig
nals d
u
ri
ng p
u
lse
rep
e
tition time (PRT
),
and it acquires
the echo
sig
nal thro
ugh
convoluti
on
of the tran
smitted si
gnal
an
d the target scen
e informa
t
ion
[4]. Because
of the wide coverage off
e
red by
the
antenn
a bea
m, the large
image resolu
tion
requi
re
d, and the long PRT, the demand
s on co
mputing p
o
w
er a
r
e st
ri
ct and re
al-t
ime
cap
abilities a
r
e limited [5, 6]. Wen Liang from t
he Beijing Institu
t
e of Technol
ogy prop
ose
d
a
multi-chip DS
P parallel
co
mputing SAR real-tim
e si
m
u
lator b
u
t the delay of the simulato
r is t
o
o
long [7]. Yi Yongju
n
et al
and Sa
chi
n
B. et al pro
p
o
se
d a FP
G
A
-ba
s
ed SA
R si
mulato
r,
but it
must pe
rform
two se
pa
rat
e
FPGA cal
c
ulation
s
, whi
c
h limits its co
mputing
cap
a
c
ity and cann
o
t
be used to pe
rform real-tim
e simulatio
n
s
[8, 9].
This p
ape
r d
e
scrib
e
s th
e desi
gn an
d impleme
n
tatio
n
of a SAR real-time e
c
h
o
simulato
r
based on multi-FPGA parall
e
l com
puting arch
it
ecture and
DRF
M (Di
g
ital
RF
M
e
m
o
ry)
techn
o
logy. This meth
od
can reali
z
e
real
-time
SAR echo de
pi
ction of natu
r
al scen
e targets.
First, the
si
g
nal mo
del
of
SAR e
c
ho
an
d on
e-di
men
s
ion
a
l fre
que
ncy-d
o
mai
n
Fouri
e
r t
r
an
sf
orm
algorith
m
a
r
e
introd
uced.
Then, the
sy
stem d
e
si
gn and key
te
ch
nologi
es of
the
real
-time SAR
ech
o
simulat
o
r
are
p
r
e
s
en
ted in S
e
ctio
n
3
and
Se
ctio
n 4. Fi
nally, the
simulato
r’
s p
e
rfo
r
ma
nce i
s
tested by the imaging
re
sul
t
s of points-array ta
rget an
d nature
scen
e target in Se
ction 5.
2. Signal Model
SAR gen
erall
y
use
s
LFM
sign
al a
s
the
transmitting
sign
al, whi
c
h
can
be
written a
s
follows
:
2
ex
p
r
pt
at
j
k
t
,
1,
0
0,
o
t
h
e
r
w
i
s
e
t
at
(1)
Her
e
, k
r
is th
e slop
e of LF
M sign
al, and
is the pulse width.Th
e e
c
ho of multipl
e
target
s ca
n
be expre
s
sed
as follows:
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
1693-6
930
A Real-tim
e SAR Echo Si
m
u
lator Base
d on FPGA a
nd Parall
el Com
puting (Xu
Yinhui)
807
1
0
2
42
,e
x
p
2
ex
p
K
kk
rk
k
k
r
Rn
Rn
st
n
j
a
t
c
Rn
jk
t
c
(2)
Her
e
,
t
is
the fas
t
time,
n
is
s
l
ow time,
is the
wavel
ength of the
electroma
gne
ti
c
wav
e
,
K
is the
numbe
r of th
e targ
et point
s in the
scen
e,
k
is the
RCS
of the targ
et
k
,
R
k
(
n
) i
s
the distan
ce
betwe
en the rada
r and th
e target
k
, and
4
ex
p
k
R
n
j
is called
Doppler
pha
se, whi
c
h
doe
s not ch
a
nge with the f
a
st time
t.
In the stop-g
o
-sto
p hypoth
e
si
s, the SAR tar
get
sce
n
e
is co
nsi
dered as a lin
ea
r system,
so th
e SA
R echo
can
b
e
dete
r
min
e
d
usi
n
g
the
convolution
of
the ta
rget
scen
e’s impul
se
respon
se fun
c
tion an
d the transmitted si
gnal.
1
2
0
42
,n
e
x
p
e
x
p
,
K
kk
rr
k
Rn
Rn
st
a
t
j
k
t
j
t
pt
h
t
n
(3)
The di
stan
ce
betwe
en
ra
dar
and ta
rg
et is
c
ontin
u
ously di
stri
bu
ted, so th
e i
m
pulse
respon
se
of the scen
e target
h
(
t
,
n
) i
s
n
o
t a discrete
function
whi
c
h is not suita
b
le for FPGA
to
comp
ute. Th
e equal rang
e ring’
s divisi
on ca
n indi
cate the impul
se re
sp
on
se
seq
uen
ce of
the
scene target R.
e
q
ua
l
ra
nge
r
i
n
g
X
Y
Rm
in
Rm
ax
ta
rg
e
t
s
c
ene
Ra
da
r
Figure 1. Ske
t
ch map of eq
ual ran
ge ri
ng
The minimu
m
distan
ce fro
m
the rada
r p
l
atform to the target scen
e is
R
min
, the maximum
distan
ce fro
m
the rada
r to the target poi
n
t
is
R
max
, and the interval of equal ra
nge
ring is
∆
sp
. So
the index of the point targ
e
t
can be calculated a
s
follows.
mi
n
()
RR
in
d
e
x
fix
s
p
,
1
*
s
pC
fs
(4)
To
elimi
nate the
Doppl
er pha
se erro
r brou
ght
on
b
y
the di
scret
e
R,
the
pha
se
of the
equivalent b
a
c
kscatterin
g
coefficient ne
e
d
s to be corre
c
ted a
s
sh
own belo
w
.
4
ex
p
r
j
,
rR
r
i
n
d
e
x
(5)
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 13, No. 3, September 20
15 : 806 – 812
808
Usi
ng the formula given
above, t
he impulse re
sp
onse of the
scene
h
(
t
,
n
) can b
e
determi
ned, by a convolut
ion with the acqui
red tra
n
smitted signal
p(n
)
, the rada
r ech
o
sign
al is
obtaine
d. Th
e cal
c
ulatio
n
pro
c
e
ss i
s
gene
rally
divided into two
parts: the i
m
pulse re
sp
onse
cal
c
ulatio
n an
d the convol
u
t
ion cal
c
ulatio
n.
3. Sy
stem Descriptio
n
The SAR rea
l
-time echo
si
mulator in thi
s
pap
er in
clu
des fou
r
mo
d
u
les: the p
a
rameter
cal
c
ulatio
n module, trig an
d clo
ck m
ana
gement mo
d
u
le, impulse respon
se fun
c
tion computi
n
g
module,
and
DRF
M p
r
o
c
e
s
s mo
dule. Al
l four mod
u
le
s a
r
e
T2FP
6
U
b
o
a
r
d
s
a
n
d
integ
r
ated
int
o
a
7U Compa
c
t PCI enclo
su
re. The functi
o
n
of each mo
dule is expl
ained bel
ow:
(1) P
a
ra
met
e
r
cal
c
ulatio
n mod
u
le: g
enerati
on
of SAR flight
path an
d target-sce
ne
before te
sting
and real
-time
calculation of
simulation p
a
ram
e
ters.
(2) Trig and clo
ck mana
g
e
ment
mo
dul
e:
re
ceip
t of
the syn
c
PRT trig an
d
clock fro
m
SAR to synch
r
oni
ze the rad
a
r and the
si
mulator.
(3) Im
pul
se
resp
on
se fun
c
tion co
mputin
g mod
u
le: receipt of the SA
R ima
g
ing
pa
ramete
r
from p
a
ra
met
e
r
cal
c
ulatio
n
modul
e a
nd
real-time
ca
lculation of
the impulse re
sp
onse
fun
c
tion
by
multi-FPGA parallel
com
p
uting [10].
(4)
DRFM p
r
oce
s
s mod
u
l
e
: receipt of the tran
smitte
d sig
nal from
rada
r, re
cei
p
t of the
impulse resp
onse fun
c
tio
n
from th
e i
m
pulse resp
onse fun
c
tio
n
co
mputing
modul
e, an
d the
convol
ution o
f
the two sign
als in freq
uen
cy domain.
The PCB bo
ard
s
of the four mo
dule
s
are
sho
w
n in
Figure
2 an
d the en
clo
s
ure of the
real
-time SAR echo sim
u
l
a
tor is
sho
w
n
in Figure 3.
(a) Pa
ramete
r cal
c
ulatio
n m
odule
(b) T
r
ig an
d clock mana
ge
ment modul
e
(c) Impul
se re
spo
n
se com
p
uting modul
e
(d)
DRF
M pro
c
e
ss m
odule
Figure 2. PCB Boards of t
he real
-time
SAR ech
o
si
mulator
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
1693-6
930
A Real-tim
e SAR Echo Si
m
u
lator Base
d on FPGA a
nd Parall
el Com
puting (Xu
Yinhui)
809
Figure 3. Enclosu
r
e of the real-time SAR echo
simulat
o
r
4. Ke
y
Technologies
4.1. Pipeline
Structure o
f
Single Impulse Re
spons
e Compu
t
ing
Chann
e
l
Impulse
re
sp
onse
comp
uting i
s
pe
rform
ed in
th
e
core mod
u
le
of the SAR
sim
u
l
a
tor a
n
d
con
s
titutes 9
0
pe
rcent of t
he
simulato
r’
s total
com
p
u
t
ation. So it is the g
r
eate
s
t
chall
enge
to t
he
real
-time e
c
h
o
simul
a
tion. This p
ape
r prese
n
ts a mul
t
ichan
nel pa
rallel co
mputi
ng metho
d
with
pipeline
d
stru
cture to
solve
the proble
m
.
Acco
rdi
ng to
FPGA’s
co
mputing a
r
chitec
ture an
d re
sou
r
ce
s [11], the calcul
ation
cha
nnel ha
s a
pipeli
ned st
ructu
r
e,
a
s
sh
own belo
w
. T
h
is
stru
cture
can
co
mplete
one ta
rget p
o
int
with one
cycl
e. The syste
m
clo
ck i
s
set
to 100 MH
z and the sy
ste
m
delay is se
t to 60 cycle
s
, so
the throug
hp
ut is 100M po
int/s and the l
a
tency is 6
0
0
n
s.
arg
(x
,
y
,
z
)
te
t
t
t
t
P
(x
,
y
,
z
)
s
ar
s
s
s
P
22
2
2
st
s
t
s
t
Rx
x
y
y
z
z
min
R
In
d
e
x
1
s
p
2
R
R
Ph
as
e
Co
r
r
ec
t
o
r
inde
x
R
'
2
R
Si
n
e
Lo
o
k
u
p
Ta
b
l
e
'
1
R
'
re
a
l
pa
r
t
ta
r
g
et
a
m
p
l
i
t
ude
Co
mp
l
e
x
Mu
l
t
i
p
l
y
Ac
c
u
m
u
l
a
t
i
o
n
Of
Im
p
u
l
s
e
Res
p
o
n
s
e
in
d
e
x
De
l
a
y
mi
n
1
()
inde
x
floor
R
R
s
p
inde
x
R
RR
2
Ca
l
c
u
l
a
t
i
o
n
2
R
Ta
yl
o
r
Ser
i
es
Ex
p
a
n
s
i
o
n
Ca
l
c
u
l
a
t
i
o
n
im
a
g
pa
r
t
re
a
l
pa
r
t
im
a
g
pa
r
t
(n
)
h
Figure 4. Pipeline of sin
g
le
-impul
se resp
onse com
puti
ng ch
ann
el
The ste
p
s of the cal
c
ul
ation
process a
r
e
explained b
e
l
o
w:
Step 1: After
R
2
is cal
c
ul
ated usi
ng the rad
a
r’
s p
o
sition (x
s
, y
s
, z
s
) and the
target’s
positio
n (x
t
, y
t
, z
t
),
R
R
can be
approxim
ate obtaine
d by a f
our-o
rde
r
Ta
ylor se
rie
s
expan
sion.
Step 2: Using
R
multiplied with the input
param
eter
1
s
p
, t
h
e
i
ndex
index
parameter i
s
obtaine
d, and
it can be use
d
to prev
ent d
i
vision op
erati
ons in FPGA.
Step 3: By the ope
ration
of
∆
R
,
and the target phase
θ
, the corre
c
ted
Do
pple
r
equivalent p
h
a
se
θ′
can b
e
determin
ed.
Step 4: Equi
valent pha
se
wa
s calculat
ed by
u
s
ing
referen
c
e l
o
o
k
-up tabl
es to
get the
real pa
rt and
the imagina
ry
part of final reflection
s coe
fficient.
Step 5: T
he
cal
c
ulate
d
a
n
d
real
and
im
agina
ry
pa
rts of the
refle
c
t
i
on
coeffici
en
t of the
equivalent, was ad
ded to the impul
se re
spo
n
se store
d
in the RAM.
After every t
a
rget
point i
n
the rada
r a
n
tenna
bea
m
und
erg
o
e
s
t
he five ste
p
s
given above,
the seq
uen
ce in the ra
m is the im
pul
se re
spo
n
se seque
nce of the wh
ole target
scene.
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 13, No. 3, September 20
15 : 806 – 812
810
4.2. Multichannel Parallel Comput
ing
and Mas
s
Da
ta Ga
thering
The pa
rallel
computin
g of impulse
resp
on
se
is divided
into two-stage co
mputing:
multicha
nnel
parall
e
l comp
uting in
singl
e FPGA an
d
multi-FPGA p
a
rallel
co
mpu
t
ing. An impul
se
respon
se
co
mputing
mod
u
le in
clu
d
e
s
four
FPGA
s (Xilinx Vi
rte
x
6 sx31
5t),
and
12
impu
lse
respon
se
co
mputing
ch
an
nels
ca
n b
e
i
n
tegrate
d
int
o
one
sx3
15t
FPGA. Each
ch
annel
ha
s
one
input ram a
n
d
one outp
u
t ram. The ta
rg
et sce
ne
whi
c
h ne
ed to b
e
pro
c
e
s
sed i
s
divided into
12
small pie
c
e
s
and ea
ch inp
u
t ram of the impulse
respon
se sto
r
e
s
the piece of the scene to be
comp
uted i
n
the n
e
xt PRT. Th
e o
u
tput-RAM
st
ores th
e imp
u
l
s
e
re
spo
n
se
se
que
nce o
f
the
cha
nnel. T
h
e
impul
se
re
spon
se
se
que
nce
s
of 12
chann
els are
adde
d tog
e
th
er to
produ
ce
the
impulse re
sp
onse se
que
n
c
e of the wh
o
l
e target scen
e.
In
p
u
t
Ra
m
Ou
t
p
u
t
Ra
m
IR
Co
m
p
u
t
e
Ch
1
In
p
u
t
Ra
m
Ou
t
p
u
t
Ra
m
IR
Co
m
p
u
t
e
Ch
2
In
p
u
t
Ra
m
Ou
t
p
u
t
Ra
m
IR
Co
m
p
u
t
e
Ch
12
Sc
e
n
e
Da
t
a
Di
s
t
r
i
b
u
ti
o
n
DDR
3
Ou
t
p
u
t
Ra
m
SR
I
O
FP
G
A
Figure 5. Multicha
nnel pa
ra
llel comp
uting
in single FP
GA
The throug
hp
ut of 12 chan
nels
per
FPG
A
is 1.
2G/
s
, so the total p
r
oce
s
sing
ca
p
a
city of
the sim
u
lator is 9.6
G
/s. In
ord
e
r to
pro
duce mu
lti-ch
ip interco
nne
ction
s
bet
we
en the
8 FP
GAs,
the simul
a
tor use
s
RapidI
O proto
c
ol f
o
r data tran
smissi
on.
All impulse re
sp
onses
obtain
e
d
throug
h impu
lse re
sp
on
se
comp
uting F
P
GA are sen
t
to the DRF
M pro
c
e
ss F
P
GA, to prod
uce
the final impu
lse re
sp
on
se
scene.
4.3. Procedu
r
e and Asse
ssment o
f
Timeliness
The re
al-time
SAR ech
o
si
mulator i
s
a
HIL (h
ard
w
a
r
e-in
-loo
p) te
st equipme
n
t. It must
synchro
n
ize the clo
c
k an
d
PRT with th
e rad
a
r u
nde
r test. After receivin
g the tran
smitted ra
dar
sign
al, the
HIL equi
pme
n
t has to
ge
nerate the e
c
h
o
sign
al with
th
e co
rrect f
r
eq
uen
cy at the
right
time. In the go-sto
p
-go a
s
sumption, this
time scale
of simulation is
PRT. This indicates that the
impulse re
sp
onse com
puti
ng and
convo
l
uti
on com
put
ing com
p
lete
every PRT.
The p
r
o
c
ed
ure flow
of the
simulato
r i
s
a
s
sho
w
n in
F
i
gure.
6. The
simul
a
tor
ne
eds to
compl
e
te imp
u
lse
re
spo
n
se cal
c
ul
ation
of 4M
(2
048x
2048
) target
points,
the th
roug
hput of t
he
entire
simulat
o
r’s im
pul
se
comp
uting
ca
n rea
c
h 9.6
G
/s, and the p
r
oce
s
sing time
is abo
ut 410
μ
s.
The first-level
parallel
com
puting
conve
r
gen
ce i
s
pe
rf
orme
d in FP
GA, and the
transfe
r time
is
approximatel
y 10
μ
s.
The se
con
d
-level parall
e
l
comp
uti
ng multi-ch
ip FPGA con
v
erge
s throu
g
h
Rapi
dIO, and
the tran
smi
ssi
on del
ay is large, ab
o
u
t 100
μ
s. Fo
r these reasons, the tim
e
of
singl
e-im
pulse re
sp
on
se
calcul
ation i
s
a
bout 52
0
μ
s.
Gene
rally the
PRF of SA
R is u
nde
r 2
0
kHz,
so the si
mula
tor can m
eet the dema
nd of
real-time g
e
n
e
ration.
FPGAs g
ene
rally calculat
e the
convol
ution on
the f
r
equ
en
cy do
main by F
FT. The first
advantag
e
of su
ch co
nvolut
ion
i
s
com
put
ationally
effici
ent, and
the
seco
nd
advant
age i
s
suita
b
l
e
for FPGA im
plementatio
n. Ho
weve
r, th
e
no
rmal FF
T
process re
quire
s at
lea
s
t
10
μ
s, which is
longe
r tha
n
norm
a
l PRT. So this pa
p
e
r
cho
o
ses the pip
e
line
d
strea
m
ing
I/O mod
e
FF
T
co
re
use
d
he
re
ha
s a th
ro
ugh
p
u
t of the
req
u
ired
inp
u
t seque
nce cy
cl
e. In this
way
,
it is po
ssibl
e
to
meet the nee
ds of PRT.
The procedu
re of the simul
a
tor is a
s
follows in Figu
re
6.
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
1693-6
930
A Real-tim
e SAR Echo Si
m
u
lator Base
d on FPGA a
nd Parall
el Com
puting (Xu
Yinhui)
811
IR
Co
m
p
u
t
e
Im
pu
l
s
e
Re
s
p
o
n
s
e
Co
m
p
u
t
i
n
g
FP
GA
FI
DC
SR
I
O
Tx
DR
F
M
Pr
o
c
e
s
s
FP
G
A
FO
DC
SR
I
O
Rx
PR
T
1P
R
T
2P
R
T
3P
R
T
4P
R
T
4
Be
g
i
nn
i
n
g
of
Co
n
v
o
l
u
t
i
o
n
DA
Ou
t
p
u
t
B
e
g
i
nni
n
g
of
C
o
nv
o
l
ut
i
o
n
B
e
g
i
nni
ng
of
C
o
nv
ol
ut
i
o
n
C
o
nv
ol
ut
i
o
n
Co
m
p
l
e
t
e
IR
Co
m
p
u
t
e
IR
C
o
m
put
e
IR
C
o
m
put
e
IR
C
o
m
put
e
SR
I
O
Tx
SR
I
O
Rx
SR
I
O
Tx
SR
I
O
Rx
SR
I
O
Tx
SR
I
O
Rx
SR
I
O
Tx
SR
I
O
Rx
FI
DC
FO
DC
FI
DC
FO
DC
FI
DC
FO
DC
FI
DC
FO
DC
DA
Ou
t
p
u
t
1
T
2
T
3
T
4
T
Co
n
v
o
l
u
t
i
o
n
Co
m
p
l
e
t
e
Co
n
v
o
l
u
t
i
o
n
Co
m
p
l
e
t
e
Figure 6. The pro
c
ed
ure of the simulat
o
r
5. Process E
xample
In this sectio
n, the preci
s
i
on of the simu
lator is me
a
s
ured by the image re
sult
s of the 9-
point-a
rray ta
rget, a
nd th
e
effectivene
ss a
nd
real
fe
ature
of the
simulato
r
are
tested
by th
e
image results of the nature
sce
ne targ
et. The SAR system param
eters a
r
e li
sted
in Table 1.
Table 1. SAR system pa
ra
meters
Parameter Value
Parameter
Value
Wavelength(m)
0.03
Resolution(m)
10
Pulse w
i
dth(us)
5
PRF(Hz)
1336
Signal band
w
i
dth
(
MHz)
60
Radar H
e
ight (k
m)
750
Sample frequenc
y(MHz)
100
Radar Velocit
y
(m
/s)
7500
5.1. Imaging Resul
t
s of P
o
ints-Arr
a
y
Targe
t
The
echo
dat
a of th
e 9
-
po
int-array ta
rg
et
gen
erated
by the
si
mul
a
tor i
s
acquired a
n
d
store
d
. Th
en,
imagi
ng i
s
proce
s
sed
by
CS algo
rithm
u
s
ing
the
com
p
lex floating
point e
c
h
o
d
a
ta
.
Evaluation re
sult is sho
w
n
belo
w
:
(a) ima
ge of 9-poi
nt-a
rray target
Az
i
m
u
t
h
Ran
g
e
Tw
o
‐
di
m
e
ns
i
o
n
a
l
co
nt
o
u
r
li
n
e
s
(b) p
e
rfo
r
man
c
e evalu
a
tion
map
Figure 7. Image re
sult of 9-point target a
rray
By the SAR image qu
ality evaluation software,
we can me
asure
the main lobe width,
PSLR and ISLR of the SAR image of th
e 9-poi
nt-a
rra
y
target.
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 13, No. 3, September 20
15 : 806 – 812
812
Table 2. Evaluation re
sult
of SAR image quality
Parameter
Range
Azimuth
PSLR(dB)
17.91
12.41
ISLR(dB)
12.78
7.02
Main lobe w
i
dth
(
m
)
8.42
6.52
5.2. Image Results o
f
Na
ture Scene T
a
rget
Similar to poi
nts-a
r
ray targ
et’s simul
a
ti
o
n
, the echo
data of 2400
x1320 pixel
s
nature
scene i
s
gen
erated
by our simulato
r, a
nd the imag
e
result is sho
w
n in Fig
u
re
8, which proves
that the reli
a
b
ility and re
al feature
of
the si
m
u
lat
o
r
can m
eet
the dem
and
of the re
al-t
ime
s
i
mulation.
Figure 8. Imaging re
sult of nature
scene
target
6. Conclusio
n
This p
ape
r d
e
sig
n
s a
nd i
m
pleme
n
t a SAR real
-tim
e ech
o
sim
u
l
a
tor ba
se
d o
n
FPGA
parall
e
l
co
mp
uting and
DRFM technol
ogy. The si
gnal mod
e
l, hard
w
a
r
e system and
key
techn
o
logy
a
r
e m
ention
e
d
above.
Final
ly the a
c
cura
cy an
d
real
-time featu
r
e
a
r
e ve
rified
an
d
validated by t
he ima
g
ing
re
sults
of the p
o
ints-arr
ay ta
rget a
nd n
a
tu
re
scene ta
rg
et, which p
r
o
v
es
that the SAR real
-time ech
o
simul
a
tor in th
is p
aper h
a
s g
r
eat pra
c
tical
significa
nce
and
engin
eeri
ng value to the de
velopment an
d test of SAR.
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ces
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S Cimmino, G F
r
anceschetti,
A Lodice. Efficient S
potl
i
ght
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w
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ang, Ha
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a
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h
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eme
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e
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ong.
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on b
a
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eng
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e
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het
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