TELKOM
NIKA
, Vol.12, No
.4, Dece
mbe
r
2014, pp. 77
9~7
8
6
ISSN: 1693-6
930,
accredited
A
by DIKTI, De
cree No: 58/DIK
T
I/Kep/2013
DOI
:
10.12928/TELKOMNIKA.v12i4.506
779
Re
cei
v
ed Se
ptem
ber 22, 2014; Revi
se
d No
vem
ber
10, 2014; Accepted Novem
ber 22, 20
14
Non-Pla
n
ar MOSFET Modeling with Analytical
Approa
ch
Muna
w
a
r A
Riy
a
di
1
*,
Da
r
j
a
t
2
, Teguh Prakoso
3
, Jatmiko E. Sus
e
no
4
1,2,
3
Dept. of El
ectrical En
gin
e
e
rin
g
, Dipo
n
e
g
o
ro
Un
iversit
y
, Semara
ng, Ind
ones
ia 5
027
5
4
Dept. of Ph
y
s
i
cs, Dipon
eg
oro
Universit
y
, Se
maran
g
, Indon
esia 5
0
2
7
5
*Corres
p
o
ndi
n
g
author, e-ma
i
l
: muna
w
a
r@u
ndi
p.ac.id
A
b
st
r
a
ct
Non-
pla
nar
str
u
ctures
h
a
ve b
een ide
n
tifie
d
as
pro
m
isin
g s
t
ructure for n
e
x
t device
ge
ne
ration
in
the nan
oe
lectr
onic er
a. How
e
ver,
the conti
nuo
us devic
e di
me
nsio
n sca
l
i
ng int
o
nan
o regi
me eventu
a
lly
requ
ires
more
soph
isticate
d
mo
de
l d
ue to
the l
i
m
itat
i
on
of the ex
istin
g
mo
de
ls. A
mo
del f
o
r n
on-p
l
a
n
a
r
MOSF
ET
structure w
a
s ela
b
o
r
ated i
n
this p
a
per, esp
e
cia
lly
for devic
e w
i
th pill
ar structure,
usin
g an
alytic
al
appr
oach. T
h
e
concer
n of ch
a
nne
l sh
ape
an
d structure w
e
r
e
disc
usse
d as
w
e
ll. T
he res
u
lt show
s the sh
ift
in su
bthres
hol
d ch
aracteristi
c
in th
e ch
an
nel w
i
th
r
e
ces
s
ed c
han
ne
l
mo
de
l. T
he c
harg
e
sh
arin
g
i
s
suspecte
d as o
ne of the key p
a
ra
meter i
n
the
shift of performa
n
ce i
n
the recesse
d regi
on
.
Ke
y
w
ords
: non-planar
MOSF
ET
, nanoscale,
analytical
model,
surface potential,
short channel
effect
1. Introduc
tion
The
rapi
d d
e
v
elopment
of
MOSFET h
a
ve sho
w
n
a tre
m
endo
us p
r
o
g
re
ss in
do
wnscalin
g
the dimen
s
io
n and
stru
ct
ure a
s
well i
n
to nan
os
cal
e
. The conti
nuou
s
scalin
g of the dev
ice
dimen
s
ion
h
a
s n
o
w re
ached ten
s
of nano
meter
size e
s
pe
cial
ly for the
ch
annel l
ength
of
transi
s
to
rs.
With the sm
aller d
e
vice
dimen
s
ion,
it is getting impo
ssi
ble
to maintain
the
conve
n
tional
bulk st
ru
cture leg
a
cy,
as sho
w
n b
y
Internation
a
l Tech
nolo
g
y Roadma
p
for
Semico
ndu
ct
or (ITRS
)
[1]. Several future devic
es
wi
th non-conve
n
tional struct
ure have b
e
en
prop
osed to overcome th
e conventio
n
a
l MOSFET st
ru
cture limitations, as ex
ample in [2]-[8].
The non
-pla
n
a
r MOSFET is expecte
d to expand the
Moore’s la
w. Several structures
coul
d shift
the do
wn
sizi
ng off the lith
ogra
phy a
nd
obtain
self
-ali
gned
multi g
a
te which is
hard
to p
r
od
uce
with co
nventi
onal on
e.
On the othe
r hand, seve
ral fabrication
me
thods p
r
odu
ce
s vario
u
s chan
nel
sha
p
e
s
,
Some metho
d
s result in straight chann
el betwe
en source an
d drain, wh
ile
so
me others create
su
ch a
ben
di
ng chan
nel,
a co
mbinatio
n of vertic
al
and recesse
d
hori
z
ontal
di
rectio
n of
current.
For exam
ple,
several ge
om
etries
may be
found
in n
o
n
-
plan
ar d
oubl
e gate MOSF
ET. Figure
1(a)
reveal
s the re
ce
ssed chan
nel with L
-
sh
aped g
eomet
ry
due to the
pre
s
en
ce of
corne
r
that diverts
the di
re
ction
of cu
rrent fro
m
dr
ain
to
so
urce. Th
e
se
cond
geo
metry, sho
w
n
in
F
i
gure
1
(
b
)
, offers
the possibility of di
rect flux. Thi
s
body-tied geometry
ha
ve its channel connec
ted to
the substrate
potential. The
floating bo
dy cha
nnel
(Fig
ure 1
(
c)
)
rev
eals simpl
e
d
ouble gate structu
r
e but
with
its cha
nnel p
o
tential isol
ated ele
c
trically from the sub
s
trate.
Several m
o
d
e
ls that
simul
a
te the p
h
ysi
cs
of the ve
rtical d
e
vice
s
have be
en p
ublishe
d
recently. Ho
wever, many
authors focu
sed on
the i
deal non
-do
p
ed doubl
e-g
a
t
e/surrou
nd g
a
te
MOSFET stru
cture [9]-[1
1]. Others mo
de
led t
he highly
doped MOS
F
ET with the help of regio
n
a
l
model [12],[13] or depletion char
ge [14]
as well as
with confor
mal
mapping [15]. However, the
analytical mo
del for no
n-id
eal jun
c
tion structu
r
e, as
well as recessed ch
ann
el, has not b
een
wel
l
articul
a
ted i
n
previo
us
pu
blicatio
ns. In
the
co
nventio
nal MOSFET
, the re
ce
sse
d
gate i
s
kno
w
n
for its ability to prevent sh
ort cha
nnel e
ffect, but
in the vertical ge
ometry, the rece
ssed cha
nnel
is some
what
different
with that of co
nventional
. T
he sim
u
lation
of re
ce
ssed
gate in ve
rtica
l
MOSFET ge
ometry ha
s
been p
r
e
s
en
ted in [16], but
it is mainly con
c
ent
rated for vert
ical
surro
und g
a
te, and no an
a
l
ytical model
wa
s offered.
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 12, No. 4, Dece
mb
er 201
4: 779
– 786
780
Figure 1. The
variation of chann
el geom
etry in
non-pl
anar
DG MO
SFET: (a) re
cessed, L-sh
a
pe
cha
nnel, (b
) b
ody-tied chan
nel
, and (c) fl
oating-body chann
el
Therefore, in
orde
r to explain the be
havi
our of chann
el with
different sh
a
pe and
potential
prof
ile, it is i
m
p
o
rtant to
de
ri
ve the
a
p
p
r
o
p
riate
mod
e
l. In ad
dition,
the continu
o
u
s
scaling
of d
e
v
ice
requi
re
s appli
c
a
b
le
m
odel i
n
n
ano
scale. T
h
is p
aper ela
b
o
r
at
es th
e a
nalytical
model of no
n
-
plan
ar M
O
SFET whi
c
h e
m
ploy the re
cessed
cha
n
n
e
l geom
etry in the bottom
part.
The
co
rne
r
ef
fect is elab
orated exten
s
ively, with
the
h
e
lp of a
p
p
r
oa
ch th
at ha
s b
een p
r
ovid
ed
for
conve
n
tional
model [17]. In addition, the pre
c
e
edin
g
repo
rts o
n
this model
have also be
en
repo
rted i
n
[18]. This
extende
d re
po
rt provide
s
m
o
re evalu
a
tion
on the
sho
r
t
cha
nnel
effects
whi
c
h are cru
c
ial in the na
no regi
me.
2. Analy
t
ical
Model
The st
ru
cture
of recesse
d
cha
nnel in
no
n-pla
n
a
r
MO
SFET can
be
see
n
in Fig
u
re 2. This
typical
stru
ct
ure
is an
ide
a
l form
of th
e
fabri
c
at
e
d
d
e
vice
s. Th
e
straight
ch
ann
el pote
n
tial m
odel
is de
rived fro
m
Poisson e
quation u
s
in
g
gene
ric
app
roach as
note
d
in seve
ral
referen
c
e
s
, e.
g.
[10],[19]-[22]:
,
,
(1)
More
over, th
e presen
ce
of co
rne
r
regi
o
n
in th
e botto
m is
arguably
difficult to
sol
v
e usi
n
g
two-di
men
s
io
nal
Poi
s
son equatio
n
in Cartesi
an sy
st
em. The
r
efore, we
divide
the ch
ann
el i
n
to
two re
gion
s: first is th
e stra
ight and latte
r is the
corner
regio
n
. We
si
mplify the corner
regio
n
a
s
a
quarte
r
circle
, an app
roa
c
h ado
pted from Zha
ng et
al [17] for g
r
ooved
gate
in co
nvention
a
l
MOSFET. Ho
wever, Z
han
g
’
s mod
e
l u
s
e
d
trape
ziu
m
-shape
app
roa
c
h, while o
u
r
model e
m
plo
y
s
quarte
r-ci
rcl
e
approa
ch whi
c
h is m
o
re
re
alistic.
The unifo
rme
d
depletio
n wi
dth
is cal
c
ula
t
ed usin
g the followin
g
formula:
(2)
is the total
depletio
n reg
i
on area a
s
in
[23], as simplification o
f
depletion width
towards all a
r
ea mainly du
e to the gate influen
ce.
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
1693-6
930
Non
-
Plan
ar
MOSFET Mo
deling
with Analyti
c
al App
r
oach (Mu
n
a
w
ar A. Riya
di)
781
Figure 2. The
stru
cture of rece
ssed
cha
nnel in
vertical geomet
ry (a), and its ap
proa
ch u
s
in
g
two-regi
on so
lution (b
)
The pote
n
tial
of chan
nel f
o
r ea
ch
regi
o
n
is
follo
wing
the two dim
ensi
onal
se
cond-order
para
boli
c
ap
p
r
oa
ch
of gra
d
ed chan
nel a
pproxim
at
ion
(G
CA) that o
r
igina
lly propo
sed
by Youn
g
[24]. However, for
co
rne
r
area, the
para
boli
c
ap
proximatio
n i
s
ad
opted t
o
the cylin
drical
coo
r
din
a
te sy
stem as
wa
s used in [17]. The potentia
l for both cartesian a
nd p
o
lar coo
r
dina
te
sy
st
em
s ar
e:
ψ
,
(3)
ψ
,
(4)
The notatio
n
“
st”
stands fo
r “straight”, to
differentiate
with “
cr
” for
“corne
r”. In
sol
v
ing the
differential Po
isson equ
atio
n usin
g gene
ral para
boli
c
a
ppro
a
ch, sev
e
ral bo
und
ary
condition
s a
r
e
set, whi
c
h a
r
e applie
d to both re
gion
s
(for pol
ar
coo
r
dinate,
x
an
d
y
should
b
e
repla
c
e
d
wi
th
and r, re
sp
ect
i
vely):
The ele
c
tri
c
field in the sili
con-oxid
e in
terface is a
c
cording to Gau
s
s’ law [23]:
(5)
(i)
The p
o
tential
at depl
etion
layer i
s
eq
ual
to
the sub
s
trate potential,
for bo
dy-tied
cha
nnel t
o
the
V
sub
:
,
(6)
(ii)
The ele
c
tri
c
field in the dep
letion layer is:
0
(7)
All paramete
r
s are p
u
t and
later the pote
n
tial equatio
n
is rewritten a
s
:
,
1
(8)
Similarly for
the co
rn
er
a
r
ea,
with inn
e
r radiu
s
, depletio
n d
epth
and cap
a
cita
nce of
cylind
r
ical
tub
e
/
ln
1
⁄
as
derived i
n
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 12, No. 4, Dece
mb
er 201
4: 779
– 786
782
[25], by borrowin
g
qua
rter circle ap
pro
a
c
h of
groove
d
cha
nnel, so
lving all boun
dary conditio
n
s
for c
o
rner area’s
potential res
u
lt in [17]:
ψ
,
V
∗
(9)
whe
r
e:
1/Ln
1
⁄
(10)
Eq. 9 sho
w
s that the potential equ
ation th
ro
ugh
ou
t the corner
are d
epe
nde
nt of
,
whi
c
h re
pre
s
ent the lengt
h of rece
ssive part of
the cha
nnel. By sub
s
tituting p
o
tential equat
ion
,
of Eq. 8 ba
ck into Poisson’s eq
uation
,
a
differentia
l equation of
potential in
straig
ht
cha
nnel i
s
ob
tained:
′′
(11)
Similarly for corne
r
are
a
,
the surface potential
of Eq. 9 is s
ubstituted int
o
Poisson’
s eq
uation for pol
ar co
ordinate
[17]:
ψ
ψ
(12)
whi
c
h re
sult i
n
[17]
′′
(13)
It is note
w
o
r
t
h
y that Poi
s
son e
quatio
n
of both
re
gio
n
s
as exp
r
e
s
sed
in Eq
s.
1
0
an
d 1
2
can
be
re
arra
nged
in th
e g
eneri
c
se
co
n
d
-o
rde
r
diffe
rential e
quatio
n form
ula [2
6
]
whi
c
h
ha
s t
h
e
comm
on form
of:
′′
λ
,f
o
r
s
t
r
a
i
g
h
t
(14)
′′
,
f
orcorner
(15)
The re
sp
ectiv
e
boun
dary condition
s for
both regi
on
s can b
e
define
d
as:
(i)
ψ
0,0
0
(ii)
ψ
,0
0
(iii)
(iv
)
(16)
Thre
sh
old vo
ltage
V
T
is d
e
termin
ed when the valu
e of
minimu
m su
rface p
o
tential is
twice the F
e
rmi potential
,
2
. Thus, the lo
cation of the
minimum pot
ential alon
g the
surfa
c
e in the
chan
nel ob
e
y
s the expre
s
sion:
0
(17)
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
1693-6
930
Non
-
Plan
ar
MOSFET Mo
deling
with Analyti
c
al App
r
oach (Mu
n
a
w
ar A. Riya
di)
783
By solving the boun
dary condition
s an
d
calculat
ing th
e locatio
n
of minimum pot
ential in
each regi
on
s, the threshold
voltage can
be deter
mine
d from the mi
nima of both region
s.
3. Results a
nd Analy
s
is
The structu
r
e
of straight
chann
el with
no co
rn
er eff
e
ct wa
s
simu
lated as
well
as the
recesse
d
stru
cture.
The
su
rface
pote
n
tia
l
of
re
ce
ssed
and
non
-recessed
chann
el are
sho
w
n
in
Figure 3
a
s
a
functio
n
of chann
el
le
ngth
for
a fixed
re
ce
ssed l
engt
h,
L
rec
=1
0 n
m
. For the
bod
y-
tied st
ru
cture,
the b
ody of
chann
el o
u
tsid
e the
depl
etio
n region
i
s
a
s
sume
d to
hav
e the
potentia
l
of substrate,
. Meanwhil
e
, Figure 4 sho
w
s the su
rface
potential with the recessed cha
nnel is
limited to aro
und 1
5
% of
the total ch
a
nnel le
ngth
L
. It is notabl
e that the mi
nimum
surfa
c
e
potential is lo
cated in the
straight re
gion
for
L
rec
< 40%
L
.
Figure 3. The
surfa
c
e pote
n
tial for re
ce
ssed a
nd no
n-recesse
d
ch
a
nnel. the leng
th rece
ssed
part are con
s
tant (10 nm
),
V
ds
=
0
.1 V.
t
ox
= 3 nm,
V
gs
=0.
1
V
Figure 4. The
surfa
c
e pote
n
tial as a fun
c
tion of
norm
a
lize
d
ch
ann
el length, with
the recessed
regio
n
length
are 15% of L.
V
ds
=
0
.1 V. t
ox
= 3 nm, V
gs
=0.
1
V
0
0.
2
0.
4
0.
6
0.
8
1
0.
35
0.
4
0.
45
0.
5
0.
55
0.
6
0.
65
0.
7
n
o
r
m
a
l
i
z
e
d
c
h
an
nel
l
e
ng
t
h
L
s
u
r
f
a
c
e pot
ent
i
a
l
s
(V
)
n
on-
r
e
c
e
s
s
e
d c
h
a
nne
l
r
e
ce
ss
e
d
c
h
a
n
n
e
l
b
o
r
d
e
r
be
t
w
ee
n r
e
gi
o
n
s
s,
m
i
n
n
o
n
-
r
e
ce
ss
e
d
s,
m
i
n
rec
e
s
s
ed
cu
r
v
e
d
reg
i
on
s
t
rai
g
h
t
re
gi
on
L
=
100
,
80
,
6
0
,
40
n
m
0
0.
2
0.
4
0.
6
0.
8
1
0.
3
5
0.
4
0.
4
5
0.
5
0.
5
5
0.
6
0.
6
5
0.
7
no
rm
al
i
z
e
d
c
h
a
nne
l
l
e
ngt
h
L
s
u
rf
a
c
e pot
ent
i
a
l
s
(V
)
no
n-rec
e
s
s
e
d c
h
a
nne
l
rec
e
s
s
ed c
h
ann
el
bo
rder be
t
w
een
r
e
gi
ons
s,
m
i
n
non
-
r
e
c
es
s
e
d
s,
m
i
n
rec
e
s
s
ed
L=
10
0
,
8
0
,
60,
40
n
m
cu
r
v
e
d
regi
on
s
t
rai
g
ht
regi
on
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 12, No. 4, Dece
mb
er 201
4: 779
– 786
784
Figure 5
reve
als the
extra
c
ted thre
sh
old
voltage fo
r b
o
th structu
r
e
s
with
L
rec
= 1
5
%
L
,
V
ds
=0.
1
V
,
N
A
= 10
18
cm
-3
,
t
ox
=2 nm. The
thresh
old vol
t
age sh
ows the tende
ncy
of decrea
s
ing
in
sho
r
ter
cha
n
nel, as is ex
pecte
d due t
o
sho
r
t cha
n
nel effect. In addition, the
straight cha
nnel
obtain
s
lo
wer V
T
tha
n
the
rece
ssed
ch
a
nnel. In a
n
y a
pplication
with the u
s
a
ge
of low
V
DD
whic
h
is
comm
only
found
in l
o
w-p
o
wer na
n
o
IC, lo
we
r t
h
re
shol
d volt
age i
s
re
quired fo
r a
bett
e
r
swit
chin
g
op
e
r
ation, which can maintain
the
lo
wer
dra
i
n voltage a
s
well. Fu
rthe
rmore, lo
we
r
V
T
may prod
uce highe
r cu
rren
t drive for ope
ration
s with hi
gh po
wer.
Physically, the curve
d
ch
a
nnel structu
r
e la
cked the
gate co
ntrol i
n
the corner
regio
n
.
The similar phenom
enon is also f
ound
in grooved channel in planar MOSFET
, as in [27],[2
8].
The
l
a
ck of gate cont
rol prod
uces
de
cre
a
sed pote
n
tial
in
th
e corne
r
are
a
compa
r
ed
to
t
he
straig
ht cha
n
nel. It also prevents
the qu
ick
conve
r
si
o
n
into inversi
on in the cha
nnel ben
eath
the
oxide layer,
with the charge sl
o
w
ly re
spond to the
gate voltage.
As a re
sult, highe
r thre
sh
old
voltage is ne
eded in the re
ce
ssed chan
nel.
Figure 5. The
thresh
old vol
t
age due to short ch
ann
el effect
Figure 6. The
drain
-
ind
u
ce
d barrier lo
we
ring
for
recessed a
nd no
n-recesse
d
ch
a
nnel, at V
ds
=0.
1
and 1.0 V
40
60
80
100
120
140
160
180
200
0.
5
0.
55
0.
6
0.
65
0.
7
0.
75
L (
n
m
)
V
T
(V
)
non-
r
e
c
e
s
s
ed c
h
annel
r
e
c
e
s
s
ed c
hannel
40
60
80
10
0
120
140
160
18
0
200
20
40
60
80
100
120
140
160
180
L (
n
m
)
D
I
BL
(
m
V/
V
)
non-
r
e
c
e
s
s
e
d c
han
nel
r
e
c
e
s
s
ed c
h
annel
Evaluation Warning : The document was created with Spire.PDF for Python.
TELKOM
NIKA
ISSN:
1693-6
930
Non
-
Plan
ar
MOSFET Mo
deling
with Analyti
c
al App
r
oach (Mu
n
a
w
ar A. Riya
di)
785
In the presen
ce of hi
ghe
r
drain volta
ge,
the
co
ntrol
o
f
cha
r
ge inve
rsio
n is
affect
ed. The
value of DIB
L
is sho
w
n a
t
Figure 6,
calcul
ated for
at
V
ds
=0.1 an
d 1.0 V. The cu
rved
cha
nnel
suffers from h
i
gher DIBL i
n
sho
r
t chan
nel
com
par
ed to
the straight
o
ne. The
curve
d
chann
el h
a
s
a hig
h
e
r
p
o
te
ntial ba
rri
er a
t
the d
r
ain
e
nd, but
the i
n
crea
se
of d
r
ain p
o
tential
sup
p
re
sse
s
t
h
is
barrier
heig
h
t more tha
n
i
n
the straigh
t
counte
r
pa
rt. With the be
nefit of lowe
r DIBL at sh
o
r
t
cha
nnel, an
d
more a
c
cep
t
able thre
sho
l
d value in n
ano
scale dev
ice op
eratio
n
,
the option of
straig
ht ch
an
nel is mo
re
prefe
r
abl
e than that
su
ppressed cha
n
n
e
l
cou
n
te
rpart. Therefore, the
ORI-ba
sed vertical M
O
SF
ET offers adv
antage
s in th
e sho
r
t cha
n
n
e
l regim
e
.
4. Conclusio
n
The
non
-pla
nar MOSFE
T
st
ru
cture
with
re
ce
sse
d
chan
nel
has be
en
modele
d
analytically
u
s
ing pa
raboli
c
ap
proa
ch. Two dist
i
c
t region
rep
r
e
s
enting diffe
re
nt cha
nnel
shape
were ap
plied
for the e
a
se
of model. Th
e simul
a
tion
based o
n
the
develop
ed
model
sho
w
s the
shift of thresh
old voltage d
ue to the pre
s
en
ce of
the recesse
d
part
in the corn
er. In addition, the
DIBL reveal
s the tenden
cy of incre
a
si
n
g
in the lo
we
r ch
ann
el len
g
th, as a ma
nifestation of
the
sho
r
t ch
ann
el
effect. While
the straight
cha
nnel
o
ffers lo
wer th
re
shold voltag
e, the high
er
DIBL
is foun
d for rece
ssed
ch
a
nnel. Th
e result reveal
s th
e impli
c
ation
of the u
s
ag
e
of pillar fo
r n
on-
plana
r
stru
ct
ure,
whi
c
h
requires mo
re careful
de
sign
in th
e
future fo
r th
reshold
-
sen
s
i
t
ive
appli
c
ation .
Referen
ces
[1] I
T
RS.
Internationa
l T
e
chn
o
lo
gy Roa
d
m
ap for Se
mi
cond
uctors (IT
R
S)
. 2013.
Availa
ble:
http://
w
w
w
.
itrs.net/reports.htm
l
[2] T
.
Endoh
,
et al. Sub-1
0
n
m
Multi-Na
no-
Pillar T
y
p
e
Vertical MOSFET.
IEICE T
r
ansacti
ons
o
n
Electron
ics.
20
10; E93-C: 5
5
7
-
562.
[3] A.
Sugimura
,
e
t
al. Propos
al
of Vertical-
C
ha
nne
l Metal O
x
i
de Sem
i
con
d
u
c
tor F
i
eld-Effec
t
T
r
ansisto
r
w
i
t
h
Entire
l
y
O
x
i
d
ize
d
Sil
i
con
Beam Isolati
o
n
.
Japanes
e Jou
r
nal of App
l
i
ed
Physics.
200
9; 48.
[4] MA.
Riy
a
di
,
et
al
.
Vertica
l
D
o
ubl
e Gate MO
SF
ET
F
o
r Nan
o
scal
e
D
e
vice
W
i
th F
u
lly D
e
p
l
eted F
e
ature.
AIP Conferenc
e Procee
di
ngs.
2009;1
1
3
6
: 24
8-25
2.
[5]
J. Pan. T
h
e
Gate-Co
n
troll
ed
Dio
de,
Hi
gh-F
r
eq
uenc
y,
an
d Qu
asi-
Static C-V T
e
chn
i
qu
es fo
r
Char
acterizi
ng
Advanc
ed V
e
rtical T
r
ench
ed Po
w
e
r M
O
SF
ET
s.
IEEE Transactions on Electron
Devices.
2
009;
56: 135
1-13
54
.
[6] M.
Masahara
,
et al. Vertical Ultrathi
n
-ch
ann
el Mult
i-gate
MOSFE
T
s
(MuGFE
T
s): T
e
chnological
Chal
le
nges
an
d F
u
ture Dev
e
l
opme
n
ts.
IEEJ T
r
ansactio
n
s on El
ectrical
a
nd El
ectronic
Engi
neer
in
g.
200
9; 4: 386-3
91.
[7] L.
T
a
n
,
et al.
T
he i
n
flue
nce
of juncti
on d
epth
on sh
ort
channel
effects in v
e
rt
ical side
w
a
ll MOSFE
T
s.
Soli
d-State Ele
c
tronics.
200
8; 52: 100
2-1
007.
[8]
J. Moers.
T
u
rning the
w
o
rld v
e
rtical: MOSF
ET
s
w
i
th curr
e
n
t flo
w
per
pen
dicul
a
r to the
w
a
f
e
r surface
.
Appl
ied P
h
ysic
s
A: Materials Scienc
e & Processin
g
.
200
7; 87: 531-
53
7.
[9] Y.
T
aur
,
et al.
"A contin
uo
us, anal
ytic dr
ai
n-
current mod
e
l
for DG MOSFET
s.
IEEE Ele
c
tron Devic
e
Letters.
200
4; 25: 107-
10
9.
[10]
Y.
T
aur. An anal
y
t
ical s
o
luti
o
n
to
a dou
bl
e-gate MOSF
ET
w
i
t
h
un
do
ped
bod
y.
IEEE Electron Dev
i
c
e
Letters.
200
0; 21: 245-
24
7.
[11]
XP. Lia
ng,
Y. T
aur.
A 2-D a
nal
ytic
al s
o
luti
on for
SCEs
i
n
DG MOSF
ET
s.
IEEE Transactions
on
Electron D
e
vic
e
s.
2004; 5
1
: 1385-
139
1.
[12] J.
He
,
et al. A continu
ous
ana
l
y
t
i
c cha
n
n
e
l pote
n
tia
l
so
lutio
n
to dop
e
d
s
y
mmetric
dou
ble-
gate
MOSF
ET
s
from the accumul
a
tion to
the strong-
invers
ion r
egi
on.
Chines
e Physics B,
2011; 20.
[13] K.
Cha
ndras
e
k
aran
,
et
al.
Co
mp
act mod
e
lin
g
of do
pe
d sy
mmetric
DG MOSF
ET
s w
i
th reg
i
on
a
l
appr
oach
. i
n
W
o
rksho
p
on C
o
mpact Mode
lin
g, NST
I
-Nanot
ech, MA, USA. 2006: 7
92 - 79
5.
[14] D.
Muntea
nu
,
et al. Com
pact
mode
l of the
qua
ntum sh
or
t-chan
nel thr
e
s
hol
d volta
ge
in
s
y
mmetric
Dou
b
le-Gate M
O
SFET
.
Molecular Simulation.
2005; 31: 83
1
-
837.
[15]
S. Kolb
erg, T
A
. F
j
eldl
y.
2D
M
ode
lin
g of
na
n
o
scal
e
DG SO
I MOSF
ET
s in and
ne
ar th
e s
ubthres
hol
d
regime.
Jo
urna
l of Computati
o
nal El
ectronics,
2006; 5: 21
7-2
22.
[16]
B. Subrahma
n
y
am, MJ. Kumar. Recesse
d source
co
nce
p
t
in nanosc
a
l
e
vertical surro
und
ing g
a
te
(VSG) MOSFET
s for controlli
ng
short-ch
ann
el
effects.
Physic
a
E-Low-Dimensional System
s
&
Nanostructures
.
2009; 41: 67
1
-
676.
[17] XJ.
Z
han
g
,
et al. Anal
y
t
ical a
n
a
l
y
sis of surf
ac
e potenti
a
l for groov
ed-g
a
te MOSF
ET
.
Chinese Physics.
200
6; 15: 631-
635.
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 16
93-6
930
TELKOM
NIKA
Vol. 12, No. 4, Dece
mb
er 201
4: 779
– 786
786
[18] MA.
Ri
yad
i
,
et al.
Study
on th
e Ana
l
ytical
M
ode
l of n
on-
pla
nar MOSF
ET
.
in Proc
ee
din
g
of the 2
0
1
4
Internatio
na
l C
onfere
n
ce o
n
Electrical E
ngi
neer
ing
Comp
uter Scienc
e a
nd Informatics
(EECSI201
4).
Yog
y
ak
arta, Indon
esia. 2
014:
245-2
48.
[19]
Z
.
Ghoggali,
F
.
Djeffal. Anal
y
t
ical
ana
l
y
si
s
of nanosca
l
e
full
y
de
plete
d
Dou
b
le-Gate
MOSF
ET
s
inclu
d
i
ng the h
o
t-carrier d
egr
adati
on effects.
Internation
a
l J
ourn
a
l of Electr
onics.
20
10; 97
: 119-12
7.
[20] F.
Djeffal
,
et al
.
Anal
ytica
l
an
al
ysis of na
no
scale multi
p
l
e
gate MOSF
ET
s inclu
d
in
g effects of hot-
carrier in
duc
ed
interface char
ges.
Microelect
ronics Reliabilit
y.
2009; 49: 37
7-38
1.
[21]
H. Lu, Y.
T
aur. An anal
yt
ic
potenti
a
l mo
de
l for s
y
mmetri
c
and as
ymm
e
tric DG MOSF
ET
s.
IEEE
T
r
ansactio
n
s o
n
Electron D
e
vi
ces.
2006; 5
3
: 116
1-11
68.
[22] B.
Yu
,
et al. Exp
licit C
onti
n
u
ous Mo
dels fo
r
Dou
b
le-Gate
and S
u
rrou
n
d
i
ng-Gate MOS
F
ET
s.
IEEE
T
r
ansactio
n
s o
n
Electron D
e
vi
ces.
2007; 5
4
: 271
5-27
22.
[23]
V. Venkataram
an, S.
Na
w
a
l.
Mode
lin
g a
nd
Simulati
on
of Straine
d
Sil
i
co
n MOSF
ET
s for Na
nosca
l
e
Appl
icatio
ns.
Bache
l
or of T
e
chn
o
lo
gy dis
s
ertation.
De
p
a
rtment of Electric
al En
gin
eeri
ng, Indi
a
n
Institute of
T
e
chno
log
y
D
e
l
h
i, Delh
i. 200
6.
[24]
KK. Youn
g. Short-cha
n
n
e
l e
ffe
ct in full
y
d
epl
eted SOI M
O
SF
ET
s.
IEEE Transactions on Electron
Devices.
1
989;
36: 399-4
02.
[25] X.
Z
h
ang
,
et al
. An An
al
ytica
l
Mode
l for T
h
re
shol
d Vo
ltag
e
of Groove
d
-Ga
t
e MO
SF
ET
'
s
[i
n Ch
in
ese].
Chin
ese Jo
urn
a
l of Se
mico
nd
uctors.
2004; 4
:
441-44
5.
[26] E.
Kre
y
szi
g.
Advanc
ed e
ngi
n
eeri
ng
math
ematics
, 9th ed. W
ile
y
.
2
0
0
6
.
[27] B.
Doris
,
et al.
Extreme sc
al
in
g w
i
th ultra-thi
n
Si ch
ann
el M
O
SF
ET
s
. Electron D
e
vices M
eetin
g,20
0
2
IEDM'02. Digest. International
.
2002: 2
67-2
7
0
.
[28] J.
T
anaka
,
et al.
A sub-0.1
mm groove
d
gate
MOSF
ET
w
i
th
hig
h
immun
i
ty to short-cha
n
n
e
l
effects.
in
Electron Devic
e
s Meeting, 1993.
IEDM '93. T
e
chnical Digest.,
International. 1993: 537-
540.
Evaluation Warning : The document was created with Spire.PDF for Python.