Indonesi
an
Journa
l
of El
ect
ri
cal Engineer
ing
an
d
Comp
ut
er
Scie
nce
Vol
.
12
,
No.
3
,
Decem
ber
201
8
, p
p.
1358
~
1365
IS
S
N: 25
02
-
4752, DO
I: 10
.11
591/ijeecs
.v1
2
.i
3
.pp
1358
-
1365
1358
Journ
al h
om
e
page
:
http:
//
ia
es
core.c
om/j
ourn
als/i
ndex.
ph
p/ij
eecs
30
nm
D
G
-
Fin
FE
T 3D Co
nstructi
on
Impact Towa
rd
s Short
Channel
Effects
Ameer F
. Ro
slan
,
F.
S
alehud
din
,
A.
S
.M. Z
ain, K.E.
K
aha
rudin
, H. H
az
ura,
A.R
. Ha
nim,
S.K. Idris,
B.
Z
.
Z
arina
, A
fifa
h
Ma
h
era
n
A.
H
MiNE,
Ce
TRI,
Fakult
i
Kejur
u
te
r
a
an
E
le
ktron
ik
d
a
n
Kejur
ut
eraan K
om
pute
r,
Univ
ersit
i
Te
kn
ika
l
Malay
s
ia Mel
ak
a
,
Jala
n
Hang
Tu
ah
Ja
y
a, 76100
Duria
n
Tungga
l
,
M
el
ak
a
,
Malay
si
a
Art
ic
le
In
f
o
ABSTR
A
CT
Art
ic
le
history:
Re
cei
ved
A
ug
2
8
, 201
8
Re
vised
Oct
15
, 2
018
Accepte
d
Oct
29
, 201
8
Thi
s
pape
r
pr
ese
nts
an
inv
esti
g
at
ion
on
prop
erties
of
Double
G
at
e
FinF
E
T
(DG
-
FinF
ET
)
a
nd
impac
t
of
p
h
y
sic
al
prope
r
ties
of
FinF
ET
t
owards
short
cha
nne
l
eff
e
ct
s
(
SC
Es)
for
30
nm
dev
ice,
for
whic
h
th
e
depleti
on
-
l
a
y
er
widths
of
the
source
-
d
ra
in
relate
s
to
the
c
hanne
l
le
ngth
asi
de
from
consta
nt
fin
hei
gh
t
(H
F
I
N
)
and
the
fin
thickness
(T
F
I
N
).
Virtua
l
fab
ri
cation
pr
oce
ss
of
3
-
dimensional
(3D
)
design
is
appl
i
e
d
throughout
th
e
ana
l
y
sis.
Further
to
that,
its
el
e
ct
ri
ca
l
ch
arac
te
ri
za
t
ion
is
emplo
y
ed
and
th
e
r
at
io
of
driv
e
cur
ren
t
aga
inst
the
l
ea
kag
e
cur
re
nt
(I
ON
/I
OF
F
rat
io)
of
the
FinF
ET
design
on
the
o
th
er
hand
h
as
show
ca
sed
subs
ta
ntial
diff
ere
n
ce
at
563138
.
35
c
om
par
ed
to
th
e
pre
diction
m
ade
b
y
th
e
Int
e
rna
ti
on
al
Te
chn
o
log
y
Roadmap
S
e
m
ic
onduct
or
(I
TRS)
2013.
Concl
usively
,
th
e
in
cre
m
ental
in
ratio
h
as
fulfill
ed
th
e
ant
i
ci
pa
ted
inc
r
ement
on
the
dr
ive
cur
r
ent
(I
ON
)
as
we
ll
as
red
uc
ti
ons
of
the
le
ak
age
cur
r
ent
(I
OF
F
).
Thre
shold
vo
lt
ag
e
(V
TH
)
m
ea
nwh
il
e
h
as
a
lso
a
chieve
d
the
nom
inal
pre
d
ic
t
i
on
tha
t
is
obli
g
ed
b
y
the
In
te
rn
at
i
onal
T
ec
hno
log
y
Ro
admap
Se
m
ic
onduct
or
(IT
RS
)
2013
for
which
is
at
0
.
67
6±12.7%
V.
Th
e
I
ON
,
I
OF
F
and
V
TH
obtained
from
the
device
has
ev
ide
nt
l
y
m
et
the
m
ini
m
um
condi
ti
on
b
y
IT
RS
2013
fo
r
low
power
Mult
i
-
Gate
technolog
y
.
Ke
yw
or
d
s
:
Dou
ble
-
gate fi
nf
et
Mosfet
Mult
i gate
Shor
t c
ha
nn
el
eff
ect
s
Copyright
©
201
8
Instit
ut
e
o
f Ad
vanc
ed
Engi
n
ee
r
ing
and
S
cienc
e
.
Al
l
rights re
serv
ed
.
Corres
pond
in
g
Aut
h
or
:
Am
eer F.
Ro
sla
n
,
Mi
NE,
CeTR
I
,
Fakult
i Ke
j
ur
ut
eraan
Ele
ktr
onik d
a
n
Ke
j
ur
uteraan K
om
pu
te
r,
Un
i
ver
sit
i Te
knikal M
al
ay
sia
Mel
aka
,
Jal
an Han
g
T
ua
h
Jay
a,
76
100 D
ur
ia
n
T
ungg
al
, Mel
aka
, Ma
la
ysi
a
.
Em
a
il
:
m
02
1710023@st
ude
nt
.u
te
m
.ed
u.
m
y
1.
INTROD
U
CTION
Moore’s
la
w
has
se
rv
e
d
as
gu
i
deline
f
or
MOSFE
T
m
i
niaturizat
io
n
f
or
over
a
dec
ade.
Yet,
the
ci
rcu
m
sta
nces
in
the
re
scal
in
g
of
the
M
OSFET
is
due
t
o
the
gate
c
on
t
rol
la
bili
ty
decr
eased
ov
e
r
the
c
hannel
cause
d
by
hi
gh
el
ect
ric
fiel
d
[
1,
2]
.
Be
si
de
s,
s
hr
i
nk
i
ng
th
e
co
nventio
nal
MOS
FET
nee
ds
im
pr
ovem
e
nts
to
bypass
t
he
barriers
that
a
re
du
e
to
the
f
undam
ental
ph
ysi
cs
[3]
.
C
on
ti
nuous
scal
i
ng
of
bulk
-
Si
MO
SF
E
T
te
chnolo
gy
ha
ve
al
so
bee
n
m
a
ssively
chall
en
ged
by
t
he
i
ncre
m
ent
in
le
aka
ge
c
urren
t
an
d
al
so
the
pe
rfo
r
m
ance
var
ia
bili
ty
of
transist
or
[4,
5]
.
This
in
dicat
e
s
that
the
sho
rt
channel
ef
fect
s
(S
CEs
)
ha
ve
con
ti
nual
ly
be
en
the
key
issues
w
he
n
the
rescali
ng
is
i
m
ple
m
ented.
That
bein
g
sai
d,
a
n
al
te
rn
at
i
ve
way
to
a
naly
se
and
proce
ss
m
ul
ti
-
gate
tra
ns
ist
or
li
ke
do
ub
le
-
gat
e
Fin
FET
(
D
G
-
FinF
ET)
hav
e
bee
n
do
ne
i
n
order
to
ac
hiev
e
the
pe
rf
e
ct
s
witc
h
for
t
ran
sist
or,
a
long w
it
h
to
m
ini
m
iz
e
the
SC
Es. S
CEs
occ
urre
d
due
to
the
ch
ar
ge
sha
r
in
g effect
in
the
s
horte
n
dev
ic
es
c
hann
el
,
asi
de
from
the
reason
that
the
ch
an
nel
de
pleti
on
re
gion
an
d
in
ver
si
on
la
ye
r
cha
nnel
charge
con
t
ro
l
ha
s
bee
n
co
nteste
d
by
bo
t
h
gate
an
d
s
ource/d
rain
r
eg
ion
s
.
In
a
ddit
ion
t
o
t
hat,
the
e
xtrem
e
increm
ent
i
n
the s
ub
t
h
res
hold leaka
ge c
urre
nt h
a
s
beco
m
e con
ce
r
ning
on
c
e it
ap
pr
oach
e
s
the
nanom
et
er r
e
gim
e
[6]
.
The
el
ect
r
os
ta
ti
cs
of
t
he
c
hannel
has
be
en
e
ff
ect
ively
i
m
pacted
by
the
dr
ai
n
pote
ntial
and,
conseq
ue
ntly
,
channel
has
be
en
unable
t
o
be
co
ntr
olled
by
the
gate
as
these
a
re
m
ai
nly
due
to
the
c
hanne
l
le
ng
th
s
that
a
r
e
thin
ned
in
de
eply
scal
ed
MOSFET
.
C
onse
qu
e
ntly
,
th
e
gate
is
i
ncapable
to
f
ully
cl
os
e
the
Evaluation Warning : The document was created with Spire.PDF for Python.
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci
IS
S
N:
25
02
-
4752
3D Do
ub
le
G
at
e FinFET
Co
nst
ru
ct
ion of
30
nm Tec
hnology
No
de
I
m
pa
ct
To
wa
rd
s…
(Ameer F
. R
os
la
n
)
1359
channel
in
the
off
-
m
od
e
ope
rati
on,
w
hich
directs
to
t
he
rise
of
I
OFF
be
tw
een
t
he
drai
n
an
d
th
e
s
ource.
Me
anwhil
e,
t
he
al
te
rn
at
i
ve
t
o
t
he
existi
ng
plana
r
M
OS
F
ET,
that
is
the
m
ulti
ple
-
gate
fiel
d
-
e
ff
ect
tra
ns
ist
ors
(MGFE
Ts)
,
ha
s
showca
sed
a
bette
r
scr
eeni
ng
of
the
dr
ai
n
po
te
ntial
from
the
cha
nnel
and
t
his
is
due
to
th
e
pro
xim
it
y
o
f
t
he
s
upplem
entary
gate(s
)
to
the
channel
(i.e.
,
hi
gh
e
r
gate
-
cha
nnel
ca
pacit
ance
)
[7,
8]
.
T
his
m
ak
es
the
sho
rt
cha
nn
el
perform
ance
m
e
tric
s,
su
c
h
a
s
subth
res
ho
l
d
slop
e
(
),
drai
n
-
i
nduce
d
ba
r
rier
lo
wer
i
ng
(
DIB
L),
and
th
res
ho
l
d
vo
lt
age
(
TH
)
ro
ll
-
off
bette
r
in
M
GF
ETs
c
om
par
ed
to
th
e
ort
ho
dox
pla
nar
MO
SFET
.
T
hese
m
et
rices
i
m
pr
ovem
ents
w
ou
l
d
m
eans
reduc
ed
i
n
de
gr
a
dation
in
the
tra
nsi
stor’
s
V
TH
with
c
onti
nuous
s
cal
ing
and
t
hus
bri
ng
ing
le
ss
de
gr
a
dation
as
well
to
the
le
a
kage
curre
nt
(I
OFF
)
[
9]
.
D
IBL
e
f
fect
is
evide
nt
as
the
sh
ri
nk
a
ge
of
the
de
vice
occ
urred
du
e
t
o
s
ub
sta
ntial
fiel
d
pe
netrati
on
from
dr
ai
n
to
so
urce
f
or
wh
i
ch
t
he
aforem
entione
d
source
a
nd
drai
n
de
pleti
on
reg
i
on
s
ca
n
inf
rin
ge
t
he
c
ha
nnel
with
ou
t
bia
s
du
e
to
sm
al
ler
ga
ps
betwee
n
t
hese
j
unct
io
ns
i
n
short
c
ha
nn
el
de
vice.
T
he
V
TH
ro
ll
off
i
n
t
he
m
eantim
e
is
cause
d
by
re
duct
ion
i
n
V
TH
du
e
to
dec
rem
ent
in
gate
le
ng
th
as
the
c
hannel
le
ngth
is
unacce
ptable
wh
e
n
the
off
-
st
at
e
I
OFF
has
be
com
e
too
great
[
10
]
.
Se
ver
al
ex
pe
r
i
m
ents
of
desi
gn
i
ng
a
3D
Fi
nF
ET
Dou
ble
-
Gate
de
vice
is
do
ne
after
the
init
ia
l
fabrica
ti
on
sim
ula
ti
on
by
r
evisin
g
se
ver
al
physi
cal
pa
ra
m
et
ers.
D
G
-
FinFET
ha
s
bee
n
c
on
te
m
plate
d
in
the
pr
ese
nt
wor
k
because
of
it
s
bette
r
gate
con
t
ro
l
over
t
he
c
hannel
w
hi
ch
al
l
ow
s
a
n
e
nh
a
nce
d
de
vice
perform
ance
[11]
.
Fi
gure
1
sh
ows
t
he
superi
or
s
hort
-
c
hannel
pe
rfo
r
m
ance
of
DG
-
FinF
ETs
ov
e
r
plana
r
MOSFET
s
with the
sam
e chan
nel le
ng
t
h
[12
]
.
Figure
1
.
D
IB
L and s
ubth
res
ho
l
d
s
wing
(
) vers
us
e
ff
ect
i
ve
c
hannel le
ngth
f
or
double
-
g
at
e (
D
G)
a
nd
bu
l
k
-
sil
ic
on
nF
ETs
DG
-
Fin
FETs
e
m
erg
e
s
uperi
or
to
plana
r
MOSFET
s
by
overc
om
ing
a
m
ajo
r
s
ourc
e
of
process
var
ia
ti
on
[3]
.
T
he
Fi
nF
ET
str
uc
ture
al
s
o
util
iz
es
a
fin
-
sh
a
pe
d
body
that
is
pe
rp
e
ndic
ular
to
t
he
waf
e
r
s
urfac
e
to
carry
the
c
urre
nt
f
or
w
hich
it
is
encase
d
by
t
wo
of
the
fro
nt
an
d
bac
k
ga
te
s
that
are
de
velop
e
d
t
hin
ly
in
orde
r
to
re
duce
t
he
S
CEs.
DG
-
Fin
F
ETs
do
s
uffer
f
ro
m
oth
e
r
proc
ess
va
riat
ions.
Du
e
to
their
s
m
al
l
di
m
ension
s
a
nd
li
tho
grap
hic
li
m
it
a
ti
on
s,
D
G
-
FinF
ETs
are
su
bject
e
d
t
o
s
ever
al
im
po
rtant
ph
ysi
cal
fluctuati
ons,
s
uc
h
as
var
ia
ti
o
ns
i
n g
at
e leng
t
h,
fin
-
thick
ness, gate
-
ox
i
de
thic
knes
s,
a
nd g
at
e
unde
rlap
[13]
.
Gen
e
rall
y,
a
m
ajor
am
ou
nt
of
work
on
t
he
pr
oj
ect
io
n
of
le
a
kag
e
c
urre
nt
a
nd
le
a
ka
ge
pow
er
predict
io
n
has
bee
n
iss
ue
d
by
va
rio
us
re
searche
rs
[11
]
,
[
14
–
23]
.
Bhatt
acharya
an
d
J
ha
re
porte
d
t
hat
the
t
hr
ee
-
dim
e
ns
io
na
l
(3D)
process
s
i
m
ulati
on
s
an
d
dev
ic
e
sim
ula
ti
on
s
we
re
car
r
ie
d
out
so
that
the
fabrica
ti
on
proce
ssed
a
nd
the
dev
ic
e
cha
racteri
sti
cs
of
22nm
DG
-
Fin
FET
s
is
opti
m
iz
ed
[3]
.
Param
et
ers
stu
died
has
m
assivel
y
en
ha
nc
ed
th
e
resp
ect
ive
V
TH
,
I
ON
,
I
OFF
value
s
f
or
w
hich
is
c
entre
d
on
the
m
ini
m
u
m
requir
e
m
ent
sta
nd
a
rdi
zed
by
I
ntern
a
ti
on
al
Tech
no
l
og
y
R
oad
m
ap
Sem
ico
nd
ucto
r
(
ITR
S)
2
013
predic
ti
on
f
or
l
ow
po
wer
(LP)
m
ulti
-
gate
te
ch
nolo
gy
f
or
the yea
r 2
020.
2.
METHO
D
S
A
ND M
ATERI
ALS
2
.
1.
Virtu
al
Fab
ri
c
at
io
n P
rocess
In
t
his
stu
dy,
t
he
DG
-
Fin
FET
fabrica
ti
on
pr
oc
edure
is
done
thr
ough
D
EV
E
DI
T
an
d
ATL
AS
m
odules
from
Sil
vaco
I
nter
national.
B
oth
A
TL
AS
an
d
DEVED
IT
c
on
t
rasts
in
it
s fun
ct
io
nalit
y
w
her
e
by
the
AT
LAS
a
s
well
as
DEVE
DI
T
pr
ov
i
des
dev
ic
e
sim
ulati
on
s
MO
SFET
dev
ic
e.
T
he
ge
ner
al
process
f
low
of
a
DG
-
F
inFET
especial
ly
in
obta
inin
g
it
s
el
ect
rical
prop
e
rtie
s
is
co
ntained
in
the
ATL
AS
m
od
ule
i
n
Sil
vaco
TCA
D
to
ol
a
nd
the pr
ocess
si
m
ula
ti
on
m
et
ho
ds i
s s
umm
ari
zed as
in Fi
gur
e 2
.
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2502
-
4752
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci,
Vo
l.
12
, N
o.
3
,
Dece
m
ber
2
01
8
:
1358
–
1365
1360
Figure
2. Ba
sic
DG
-
Fi
nF
E
Ts
Pr
oc
ess Si
m
ulati
on
Since
Fin
FET h
ave
a size
able
ou
tc
om
e
towar
ds
t
he
de
vice’
s
I
OFF
,
V
TH
an
d
I
ON
,
the
dim
ension
s o
f
t
he
fi
n
has
bee
n
de
fine
d
be
foreha
nd
i
n
orde
r
t
o
est
ablis
h
desir
ed
ef
fecti
ve
c
ha
nn
el
le
ngth
a
nd
al
s
o
gate
w
idth
of
the
de
vice
[
24
]
.
The
i
ncr
em
ental
towa
r
ds
th
e
sp
ee
d
of
the
t
ran
sist
or
s
witc
hing
can
be
done,
s
houl
d
it
ha
ve
a
high
I
ON
an
d
a
low
V
TH
.
Ba
se
d
on
the
co
ns
t
ant
fi
n
heig
ht
(
H
FIN
)
a
nd
the
f
in
thic
kn
es
s
(
T
FIN
),
co
ns
trai
n
of
the
width can
b
e
obtai
ned as:
W
=
2H
FIN
+ T
FIN
(1)
Leaka
ge
pe
rfo
r
m
ance
can
al
s
o
be
in
flue
nce
d
by
the
fi
n
s
hape
and
it
s
dim
ension
w
her
e
by
na
rrow
e
r
fi
n
encou
rag
es
lo
wer
le
aka
ge
cu
rr
e
nt
to
be
obta
in.
The
value
s
of
ge
om
et
ric
al
pa
ram
et
ers
are
i
den
ti
fie
d
as
s
ho
w
n
in Ta
ble 1.
Table
1.
Value
of the
g
e
om
et
rical
par
am
et
ers
set
for Y
-
Z
pl
ane, X
-
Y
p
la
ne
and
X
-
Z
p
la
ne
Y
-
Z
Plan
e
X
-
Y Pl
an
e
X
-
Z
Plan
e
Para
m
eters
Valu
e
(n
m
)
Para
m
eters
Valu
e
(n
m
)
Para
m
eters
Valu
e
(n
m
)
Gate Len
g
th
,
L
G
3
0
.00
SiO
2
W
id
th
,
W
O
X
X
-
Y
3
0
.0
SiO
2
Leng
th
,
L
O
X
X
-
Z
1
0
0
.0
SiO
2
Leng
th
,
L
OX
1
0
0
.0
SiO
2
Thick
n
ess
,
T
OX
X
-
Y
3
0
.0
SiO
2
W
id
th
,
W
O
X
X
-
Z
3
0
.0
SiO
2
Thick
n
ess
,
T
OX
3
0
.00
Metal
Gate S
iO
2
W
id
th
,
W
OX
X
-
Y
1
6
.0
Metal
Gate S
iO
2
L
en
g
th
,
L
OX
X
-
Z
8
0
.0
Metal
Gate S
iO
2
L
en
g
th
,
L
OX
8
0
.00
Metal
Gate S
iO
2
T
h
ick
n
ess
,
T
OX
X
-
Y
1
8
.1
Metal
Gate S
iO
2
W
id
th
,
W
OX
X
-
Z
2
.98
Metal
Gate S
iO
2
Thick
n
ess
,
T
OX
2
.98
Alu
m
in
iu
m
W
id
th
,
W
AL
X
-
Y
1
0
.0
Alu
m
in
iu
m
Leng
th
,
W
AL
X
-
Z
1
0
.0
Alu
m
in
iu
m
Leng
th
,
L
AL
1
0
.00
Alu
m
in
iu
m
Thick
n
ess
,
T
AL
X
-
Y
1
5
.0
Alu
m
in
iu
m
W
id
th
,
W
AL
X
-
Z
1
0
.0
Alu
m
in
iu
m
Thick
n
ess
,
T
AL
1
5
.00
Po
ly
silico
n
T
h
ick
n
ess
,
T
DM
X
-
Y
2
5
.0
Po
ly
silico
n
L
en
g
th
,
L
DM
X
-
Z
3
0
.0
Po
ly
silico
n
T
h
ick
n
ess
,
T
DM
7
.10
Po
ly
silico
n
W
id
th
,
W
DM
X
-
Y
3
0
.0
Po
ly
silico
n
W
id
th
,
W
DM
X
-
Z
7
.0
Silico
n
T
h
ick
n
ess
,
T
S
1
5
.00
Silico
n
T
h
ick
n
ess
,
T
S X
-
Y
1
5
.0
Silico
n
L
en
g
th
,
L
S
X
-
Z
8
0
.0
Silico
n
W
id
th
,
W
S
X
-
Y
1
5
.0
Silico
n
W
id
th
,
W
S
X
-
Z
1
0
.0
P
-
T
y
pe
S
u
bs
tr
ate
E
t
c
hi
ng
S
i
l
i
c
o
n
to
F
o
r
m
S
i
l
i
c
o
n
R
i
dg
e
/
P
i
l
l
a
r
G
a
te
O
x
i
dati
on
T
h
r
e
s
ho
l
d
V
o
l
ta
g
e
A
d
jus
tm
e
nt
I
m
p
l
an
t
P
o
l
y
s
i
l
i
c
o
n
D
e
po
s
i
ti
o
n
P
o
l
y
s
i
l
i
c
o
n
E
tchi
ng
P
o
l
y
s
i
i
c
o
n
O
x
i
da
ti
o
n
P
ol
y
s
i
l
i
c
on
D
o
pi
ng
H
a
l
o
I
m
pl
ant
ati
on
S
pac
e
r
O
x
i
d
e
D
e
pos
i
t
i
on
E
t
c
hi
ng
S
pa
c
e
r
O
x
i
de
S
o
ur
c
e
/
D
r
a
i
n
I
m
pl
a
n
t
O
pe
n
C
o
nt
a
c
t
W
i
nd
o
w
(
S
our
c
e
)
E
t
c
h
O
x
i
de
L
e
f
t
O
pe
n
C
o
nt
a
c
t
W
i
nd
o
w
(
D
r
a
i
n
)
E
t
c
h
O
x
i
de
R
i
g
ht
C
o
m
pe
n
s
a
ti
o
n
I
m
pl
a
n
t
S
i
l
i
c
i
d
e
F
or
m
at
i
on
A
l
um
i
n
um
D
e
p
o
s
i
ti
o
n
A
l
um
i
n
um
E
tchi
n
g
Mi
r
r
o
r
i
ng
th
e
S
tr
uctur
e
E
l
e
c
tr
ode
s
F
or
m
a
ti
on
Evaluation Warning : The document was created with Spire.PDF for Python.
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci
IS
S
N:
25
02
-
4752
3D Do
ub
le
G
at
e FinFET
Co
nst
ru
ct
ion of
30
nm Tec
hnology
No
de
I
m
pa
ct
To
wa
rd
s…
(Ameer F
. R
os
la
n
)
1361
Six
co
ns
trai
ne
d
m
esh
re
gion
s
wer
e
set
co
m
pr
ise
s
of
sil
i
con
as
t
he
m
ain
substrat
e,
t
w
o
re
gions
of
sil
ic
on
oxide
(
SiO
2
),
poly
sil
i
con,
an
d
tw
o
reg
i
on
s
of
Al
um
iniu
m
based
bu
l
k
bott
om
el
ect
ro
des
.
Me
sh
in
g
par
am
et
ers
we
re
the
n
set
with
it
s
heig
ht
a
nd
widt
h
set
at
10
nm
and
5
nm
resp
ect
ively
wh
e
re
by
the
m
axim
u
m
ang
le
al
lo
wed
within
it
s
tria
ngle
is
con
t
ro
ll
e
d.
T
he
m
axi
m
u
m
slop
e
is
bounde
d
at
28
o
wit
h
m
axi
m
u
m
ra
ti
o
of
300.
Im
pu
riti
es
m
ini
m
u
m
sp
aci
ng
was
ap
pl
ie
d
at
20
nm
wh
en
X
-
directi
on
is
eq
uiv
al
ent
to
0.
T
he
fa
bri
cat
ion
si
m
ulate
d
us
in
g
geo
m
et
rical
par
am
et
ers
tha
t
fo
ll
ows
Ta
bl
e
1
is
obta
ined
an
d
a
naly
sed
from
Y
-
Z
plan
e
as
in
Figure
3(A).
T
her
e
fore,
t
he
c
al
ibrati
on
proc
ess
was
us
e
d
with
sta
ndar
d
fluid
(G
ly
ceri
n)
w
hich
was
al
read
y
bro
ught
with
de
vices.
T
o
vali
date
the
data
e
rror
of
the
rea
ding
from
the
m
easur
em
ent
m
us
t
le
ss
than
0.0
1.
Me
anwhil
e,
t
he
cr
os
s
sect
io
n
of
D
G
-
Fin
FET
f
ro
m
X
-
Y
pla
ne
at
el
evati
on
=
-
1
sli
ces
the
de
vice
that
s
howcases
the
Alum
inium
reg
ion
a
nd
SiO
2
for
w
hi
ch
obey
s
t
he
geo
m
et
rical
pa
ram
et
ers
in
Table
1
as
s
how
n
in
Figure
3(
B
).
The
str
uctu
re
at
X
-
Y
plane
at
el
evati
on
=
0
m
eanwhil
e
e
xh
i
bits
tw
o
SiO
2
re
gions,
Sil
ic
on
an
d
Po
ly
sil
ic
on
f
or
w
hich
f
ollo
ws
the
p
a
ram
et
ers
set
as
in
Ta
ble
1
as
sho
wn
in
Figure
3(C).
I
n
the
m
eantim
e,
tw
o
cro
ss
sect
io
ns
of
X
-
Z
plane
d
DG
-
Fin
FET
sim
ula
te
d
is
pr
es
ented
ens
uri
ng
al
l
reg
io
ns
are
viewe
d
i
n
eac
h
pla
ne.
Thro
ugh
ge
ome
tric
al
par
am
eter
s
est
a
blishe
d
in
Ta
ble
1,
t
he
structu
re
from
el
evati
on
=
0.5
in
Fig
ure
3(D)
sh
ow
s
the
SiO
2
reg
i
on
that
ov
e
rlo
oks
Sil
ic
on,
m
etal
gate
SiO
2
,
a
nd
Al
um
iniu
m
-
base
d
el
ect
r
od
e
reg
i
ons
co
ntr
ary
to
the cr
os
s
secti
on in
for w
he
n
t
he plane ele
vat
ion
=
0,
for wh
ic
h
veile
d
the
SiO
2
re
gion.
Figure
3. (
A)
Cr
os
s
secti
on
of DG
-
Fin
FET
on Y
-
Z
Plane,
(B)
C
ro
ss
secti
on of
DG
-
Fi
nFET o
n X
-
Y
Pla
ne
at
el
evati
on =
-
1,
(C)
C
ro
ss
secti
on of
DG
-
Fi
nFET o
n X
-
Y
Pla
ne
at
ele
vation
= 0
,
and
(
D)
C
ro
ss
secti
on
of
DG
-
FinFET
on
X
-
Z Plane
at El
ev
at
ion
=
0.5
2
.
2.
Proces
s
D
esi
gn
F
ab
ri
c
ati
on
Fo
r
t
he
i
ntent
of
I
-
V
c
urves
s
i
m
ulati
on
of
th
e
de
vices,
the
Sil
vaco
TCA
D
ha
s
em
plo
ye
d
the
e
nsuin
g
set
of
physi
cal
m
od
el
s:
1)
dri
ft
diffusio
n
(
D
D)
m
od
el
with
sim
plifie
d
Bol
tzm
ann
ca
rr
ie
r
sta
ti
sti
cs;
2)
F
erm
i
-
Dirac
m
od
el
a
s
a
sta
ti
sti
cal
appr
oach
im
ple
m
ented
in
or
de
r
to
re
duce
t
he
co
nce
ntrati
ons
of
a
hea
vily
dope
d
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2502
-
4752
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci,
Vo
l.
12
, N
o.
3
,
Dece
m
ber
2
01
8
:
1358
–
1365
1362
carrier
re
gions
.
Crit
ic
al
el
ectr
ic
al
char
act
e
risti
cs
li
ke
thres
ho
l
d
vo
lt
age
,
ON
-
sta
te
cu
rr
e
nt,
O
FF
-
sta
te
curren
t
and s
ub
t
hr
es
ho
ld sw
i
ng c
ou
l
d be e
xtracted
fr
om
the I
D
vs.
V
G
cha
racteri
st
ic
.
The
c
oeffici
ent
of
V
DS
,
AL
PHA
is
set
at
1.
4
1/V
al
on
gs
ide
the
sta
ti
c
feed
ba
ck
pa
ram
et
er,
GA
M
M
A
at
0.3
t
hro
ugh
the
a
pp
li
cat
ion
of
the
ATL
AS
too
l
with
w
or
k
functi
on
of
4.8
5
e
V.
The
c
oncent
rati
on
of
p
-
ty
pe
sil
ic
on
a
s
t
he
a
forem
entioned
m
ai
n
substrat
e
is
set
at
1x10
18
at
om
/cm
3
w
hilst
is
1x10
21
at
om
/cm
3
us
ed
f
or
the
n
-
ty
pe su
bs
trat
e for wh
e
n Y
MIN
=0,
Y
MAX
=0.
015, a
nd
t
he
c
ha
racteri
sti
c lengt
h
of lat
erial
in
Z
-
directi
on is
set
at
0.004
at
Z
MIN
=0.01,
Z
MAX
=0.023
3
a
nd
Z
MIN
=0.076
7
a
nd
Z
MAX
=0.
091.
Alte
rn
at
ively
,
t
he
param
et
ers
for
th
e
band
-
ed
ge
al
ig
nm
ent
is
def
i
na
ble
as
ei
ther
el
ect
ro
n
af
finit
y
or
ed
ge
al
ig
nm
ent
wh
e
reby
in
this
desi
gn
th
e
el
ect
ro
n af
finit
y i
s in
vo
l
ved.
The si
li
con ene
rg
y
ga
p
at
300K is
set at
1.1245 e
V fo
ll
owe
d wit
h 4.0
5
e
V
for t
he
m
at
erial
aff
init
y
at
per
m
itti
vit
y,
ε=11.9
.
T
he
tem
per
at
ur
e
of
the
band
gap
energy
eq
uatio
n
as
well
as
de
fau
lt
values
appli
ed fo
r
eac
h
e
nerg
y band
gap p
a
ra
m
et
ers
is as f
ol
lowing
i
n
Ta
bl
e 2
[
25
]
:
(
2)
Table
2.
Def
a
ul
t par
am
et
ers
f
or ene
rg
y
ba
ndgap
[
26]
Para
m
eters
Valu
e
Energy gap
at
30
0
K,
E
G3
0
0
1
.08
eV
Alp
h
a Co
ef
f
icien
t,
E
G
AL
P
H
A
4
.73
x
1
0
-
4
eV/K
Beta Co
ef
f
icien
t,
EG
B
E
T
A
6
3
6
K
Co
n
d
u
ctio
n
ban
d
d
en
sity,
NC3
0
0
2
.8x
1
0
19
cm
-
3
Valence b
an
d
den
sity,
NV3
0
0
2
.8x
1
0
19
cm
-
3
Me
anwhil
e,
num
ber
of
tim
es
the
tra
p
proce
dure
is
set
to
s
ix
s
o
t
hat
it
co
uld
be
re
peate
d
i
n
case
of
discre
pan
cy
w
i
th the
num
ber
of init
ia
l bloc
k
it
erati
on
set
at
45. T
he
b
l
ock i
te
rati
on wou
l
d serv
e
as
an i
te
r
at
i
on
m
et
ho
d
al
on
gs
ide
Ne
wton
w
he
n
c
onve
r
gen
c
e
is
unat
ta
inabl
e
th
rou
gh
Gu
m
m
el
schem
e
as
the
Gu
m
m
el
it
e
rati
on
is
capa
ble
t
o
re
fine
init
ia
l
co
nver
ge
nce
guess
f
r
om
New
t
on
m
et
ho
d.
The
Fe
rm
i
-
Dirac
m
od
el
is
th
en
i
m
ple
m
ented
that
ad
her
es
t
he
el
ect
rons
with
a
sem
ico
n
duct
or
la
tt
ices
in
su
c
h
th
erm
al
equ
il
ibriu
m
a
t
tem
per
at
ur
e
T
L
. T
he
a
vaila
bili
ty
elec
tron
stat
e is el
ect
ron
-
oc
cup
ie
d
e
nergy
ε can be
obta
in
thro
ugh
[26]
:
(
3)
The
Ferm
i
le
vel
ene
rg
y
i
n
E
qu
at
io
n
(
3)
is
represe
nted
by
E
F
fo
ll
owe
d
with
k
w
hich
denotes
t
he
Bolt
z
m
ann
c
onsta
nt.
T
her
e
for
e,
8.0
5
e
V
is u
sed
for
wh
e
n
t
he
ox
i
de
e
nerg
y
gap
is
at
30
0K, w
it
h
2.8x1
0
19
cm
-
3
of
c
onduct
io
n
band
de
ns
it
y
im
ple
m
ented
w
hile
the
m
at
eri
al
aff
init
y
an
d
i
ts
per
m
it
t
ivit
y,
ε
is
set
at
1
e
V
an
d
3.9
resp
ect
ively
.
T
he
poly
sil
ic
on
at
per
m
itti
vity
of
11.9
m
eanwhil
e
requires
1.124
5
eV
of
e
ne
rg
y
ga
p
at
30
0K,
4.05
eV
of
a
ff
i
nity
,
an
d
2.8x1
0
19
cm
-
3
of
c
ondu
ct
ion
band
de
ns
it
y,
in
a
ddit
ion
to
t
he
valence
band
de
nsi
ty
of
1.04x
10
19
cm
-
3
.
Since
non
-
lo
cal
ef
fects
is
aband
on
e
d
in
conve
ntion
al
dri
ft
-
diffusio
n
m
od
el
of
the
charge
trans
port,
t
he
e
nergy
ba
la
nce
m
od
el
is
enab
l
ed
in
this
m
odel
by
co
ns
id
eri
ng
the
el
ect
r
on
tem
per
at
ur
e
s
i
n
the
Ferm
i
-
Dirac
sta
ti
sti
cal
m
et
ho
d.
The
pa
rall
el
el
ect
ric
fiel
d
de
pende
nce
m
od
el
f
or
this
des
ign
is
us
e
d
as
it
cal
ls
on
th
e
fiel
d
-
de
pende
nt
m
ob
il
it
y.
The
m
axi
m
um
m
agn
it
ud
e
of
possi
ble
c
orrecti
on
is
set
to
1.0
to
dam
p
th
e
Gu
m
m
el
i
te
ratio
ns.
In
the
m
eantim
e,
the
ext
racti
on
of
the
drai
n
c
urren
t
agai
ns
t
gate
vo
lt
age
(
I
D
-
V
G
)
an
d
V
TH
pro
per
ti
es
is
acqu
i
red
by
a
pply
ing
Ne
wton
m
e
tho
d
w
hen
div
e
rg
e
nce
occ
urred
in
a
s
olu
t
ion
process
w
he
reb
y
decr
em
ental
of
m
ul
ti
plica
ti
on
factor
is
ca
rr
ie
d
out
f
ro
m
the
i
niti
al
appr
ox
im
at
ion
of
the
el
e
ct
rode
bias
ste
p.
I
n
t
his
re
ga
r
d,
dri
ft
-
diffusi
on calc
ul
at
ion
s ar
e
m
anag
ed
in
t
he.
A
TLAS usi
ng th
e N
e
wton it
era
ti
on
.
3.
RESU
LT
S
AND DI
SC
US
S
ION
Ba
sed
on
the
2D
str
uctu
re
of
t
he
DG
-
Fi
nF
ET
pro
duced
w
hi
ch
is
t
he
c
ross
sect
ion
s
of
t
he
dev
ic
e,
th
e
3D str
uctu
re is
al
so
ob
ta
i
ned a
s s
hown in
Fi
gure
4. C
om
par
ed
t
o
t
he 2D c
r
os
s
sec
ti
ons
obta
ined, it
is
ob
s
erv
e
d
that
the
3D
str
uc
ture
pro
duced
com
pr
ise
s
the
a
forem
entioned
X
-
Y
plane
,
X
-
Z
pla
ne,
a
nd
Y
-
Z
pla
ne.
T
he
sil
ic
on
reg
i
on
is
ob
se
r
ved
t
o
be
c
onc
eal
ed
away
as
i
n
Fig
ur
e
4
du
e
to
the
fact
that
it
is
wr
ap
ped
a
nd
s
urr
ounded
by
the
Evaluation Warning : The document was created with Spire.PDF for Python.
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci
IS
S
N:
25
02
-
4752
3D Do
ub
le
G
at
e FinFET
Co
nst
ru
ct
ion of
30
nm Tec
hnology
No
de
I
m
pa
ct
To
wa
rd
s…
(Ameer F
. R
os
la
n
)
1363
m
et
a
l
gate
SiO
2
a
nd
poly
sil
ic
on
as
pr
e
sente
d
in
Fi
gure
3(C)
in
f
or
m
ing
a
no
ti
on
al
D
G
-
Fin
FET
str
uct
ur
e
as
this
has
e
nsure
d
th
e
fin
s
ha
pe
m
i
nim
iz
es
the
I
O
FF
,
subseq
ue
ntly
restrict
ing
S
CEs
from
ta
kin
g
it
s
place
on
the
structu
re
perform
ance.
The
va
riat
ion
on
gat
e
le
ng
th
,
cha
nnel
dopi
ng
a
nd
S/D
do
ping
c
on
ce
ntrati
on
ha
s
bee
n
i
m
ple
m
ented
to
a
naly
ze
the
dev
ic
e
pe
rform
ances
of
V
TH
,
I
OFF
,
I
ON
a
nd
SS
a
nd
r
at
io
of
I
ON
/I
OFF
for
wh
ic
h
a
curve
of
Dr
ai
n
Cu
rr
e
nt
(A),
I
D
again
st
Gate
Vo
lt
age
(V),
V
GS
is
ge
ner
at
e
d
by
AT
LA
S
m
odule
as
in
Fi
gure
5.
Thro
ugh
com
pa
risons
m
ade
betwee
n
rea
d
value
obta
ine
d
th
rou
gh
sim
ulati
on
s,
a
gainst
pr
e
dicte
d
val
ue
f
ro
m
ITRS
2013,
V
TH
ob
ta
ine
d
is
sli
gh
tl
y
higher
than
predict
ed
value
m
ade
by
the
ITRS
20
13
w
hich
is
0.
699
V
com
par
ed
t
o
0.676
±12.7%
V
al
beit m
ini
m
al
in d
i
ff
e
ren
ces
.
Figure
4. 3D st
ru
ct
ur
e
of
DG
-
FinFET
Nev
e
rtheless
,
the
I
ON
a
nd
I
OFF
bo
t
h
ha
ve
ac
hieve
d
desire
d
values
w
hen
a
ssessed
with
t
he
pre
dicte
d
on
e
s
wh
e
re
by
the
I
ON
obta
in
ed
higher
tha
n
48
5
µ
A/µm
a
t
1243.
86
µ
A/µ
m
as
the
I
OFF
at
ta
ined
subst
antia
l
diff
e
re
nce
i
n
0.002
2
pA
/µ
m
as
com
par
e
d t
o
20
pA/µ
m
pr
e
di
ct
ed,
br
in
gi
ng
the
I
ON
/I
OFF
rati
o t
o
be si
gn
i
ficantl
y
higher
.
P
ref
e
ra
bly,
the
de
vice
with
a
gr
eat
er
I
ON
/I
OFF
rati
o
m
eans
that
th
e
dev
ic
e
has
m
et
an
exce
ptio
nal
value
du
e
t
o
increm
ental
of
I
ON
versus
the
decr
ea
s
ing
I
OFF
,
that
i
s
consi
ste
nt
to
the
ex
pectat
ion
m
ade
by
the
ITRS
2013
a
nd
he
nc
e,
th
rou
gh
Tab
le
3
it
is
e
valua
te
d
that
the
Fin
FET
str
uctu
re h
as b
ri
ng
the ra
ti
o
m
uch
supe
rior
i
n
con
t
rast to t
he i
deal rati
o o
f 2
4.5 aim
ed.
Table
3.
C
om
par
iso
ns
i
n valu
e of elec
tric
al
c
har
act
erist
ic
s
ba
sed o
n
rea
d v
al
ue
an
d ITRS
2013
value
Para
m
eters
IT
RS
Valu
e
Read
Value
V
TH
(V)
0
.67
6
±1
2
.7%
0
.69
9
I
ON
(µ
A/µ
m
)
> 48
5
1
2
4
3
.8
6
I
OFF
(pA/µ
m
)
< 20
0
.00
2
2
I
ON
/I
O
FF
Ratio
2
4
.5
5
6
3
1
3
8
.35
SS (
m
V/
d
ec
)
7
0
~
9
0
7
1
.40
GIDL
-
0
Evaluation Warning : The document was created with Spire.PDF for Python.
IS
S
N
:
2502
-
4752
Ind
on
esi
a
n
J
E
le
c Eng &
Co
m
p
Sci,
Vo
l.
12
, N
o.
3
,
Dece
m
ber
2
01
8
:
1358
–
1365
1364
Figure
5. D
rain
Curre
nt (A), I
D
against
Gate
Vo
lt
age
(V)
, V
GS
curve
of DG
-
FinF
ET
from
A
TL
AS
m
odule
4.
CONCL
US
I
O
N
In
t
his
stu
dy,
a
3D
double
ga
te
FinFET
is
desig
ne
d
wit
h
fo
c
us
of
m
ini
m
iz
ing
the
im
pact
of
s
hort
channel
e
ff
ect
s
(S
CE
s)
that
c
on
s
eq
ue
ntly
co
ntribute
s
t
o
t
he
increm
ent
in
le
akag
e
c
urren
t
(
I
OFF
)
a
nd
re
duct
io
n
in
the
dr
ive
cu
rr
e
nt
(I
ON
)
due
to
the
ef
fects
c
ause
by
the
s
hri
nk
a
ge
of
the
s
tructu
re
in
t
o
th
e
nanom
et
er
reg
im
e
that
have
re
duces
the
cha
nne
l
le
ng
th.
At
th
e
end,
it
is
obs
erv
e
d
that
DG
FinFET
has
ful
fill
ed
good
el
ect
rical
pro
per
ti
es
with
hi
gh
I
ON
,
a
nd
l
ow
I
OFF
base
d
on
the
el
ect
rica
l
cha
racteri
sti
cs
a
naly
sed.
H
oweve
r,
c
om
par
at
ively
,
the
VT
H
d
oes
no
t
m
et
the
nom
inal
value
de
sired
w
hich
is
diff
e
re
d
by
3.3
304%
highe
r
t
han,
wh
il
e
sti
ll
within
the
ra
ng
es
of
0.676
±12.7%
V
pre
dicte
d
by
the
ITRS
2013.
I
deall
y,
th
e
dev
ic
e
with
su
bst
antia
l
dif
f
eren
ce
towa
rd
s
t
he
in
crem
ent
of
the
I
ON
/I
OFF
rati
o
m
eans
tha
t
the
dev
ic
e
has
m
et
a
su
pe
rlat
iv
e
value
t
hat
is
du
e
to
increm
ent
in
I
ON
and
l
ow
e
r
I
OF
F
is
ob
ta
ine
d.
I
n
cu
rr
e
nt
a
naly
sis,
the
m
ajo
r
di
ff
ere
nce
betw
een
D
G
-
Fin
FE
T
with
conve
ntion
al
pl
anar
MOS
FE
T
is
i
n
te
rm
s
of
le
aka
ge
cu
rr
e
nt
value
as
it
e
xc
eeded
th
e
m
inim
u
m
value
pr
e
dicte
d
wh
ic
h
is 2
0pA
as
sp
eci
fied
by
the I
TRS
20
13.
Be
si
des,
the
d
evice
cha
ract
erist
ic
s
ha
ve
m
et
the
r
eq
uirem
ent
of
low p
ow
e
r (LP
)
m
ulti
gate (MG)
tec
hnol
og
y
pr
e
dicte
d by th
e ITRS
20
13.
ACKN
OWLE
DGE
MENTS
The
a
uthor
s
w
ou
l
d
li
ke
t
o
tha
nk
the
Mi
nis
tr
y
of
H
ig
he
r
E
ducat
ion
(M
OHE)
f
or
s
ponsori
ng
this w
or
k
unde
r
proj
ect
(
FRGS/1/
2017/
TK
04
/F
KE
KK
-
Ce
TRI/F
0033
5)
an
d
Mi
N
E,
Ce
TRI,
Fac
ult
y
of
Ele
ct
ronic
s
an
d
Com
pu
te
r
En
gi
neer
in
g
(FKE
KK),
U
niv
er
sit
i
Tekn
ik
al
Ma
la
ysi
a
Me
la
ka
(UTeM
)
for
the
m
or
al
suppo
rt
thr
oughou
t t
he
pro
j
ect
.
REFERE
NCE
S
[1]
Subrahm
an
y
am
B
and
Jag
ade
sh
Kum
ar
M.
R
ece
ss
ed
source
con
ce
pt
in
n
anosc
ale
v
ert
i
cal
surrou
nding
g
at
e
(VS
G)
MO
S
FETs
for
c
ontrol
li
ng
short
-
cha
nne
l
eff
e
ct
s
Phy
s.
E
Low
-
Di
mensional
S
yst.
Nanostr
uct
ures
.
2009;
41(4)
;
67
1
–
676.
[2]
W
u
M,
Jin
X
,
Kw
on
H
I
,
Chua
i
R,
Li
u
X,
and
L
ee
J
H
.
The
op
tim
al
design
of
ju
nct
ionless
tr
ansi
stors
with
doubl
e
-
gat
e
struct
ur
e
fo
r
red
uc
ing the
ef
fec
t
of
b
and
-
to
-
b
and
tunn
el
ing
J
.
Semic
ond.
Tech
nol.
S
ci.
2013;
1
3(3):
245
–
251.
[3]
Bhat
tacha
r
y
a
D
and
Jha
N
K.
FinF
ET
s:
From
devi
ce
s
to
arc
hi
tec
ture
s.
Digi
t.
A
na
log
Anal
og
.
Dig
it
.
IC
Des.
2015
;
2014:
21
–
55.
[4]
Gupta
K
A,
An
veka
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