Indonesian J
ournal of Ele
c
trical Engin
eering and
Computer Sci
e
nce
Vol. 1, No. 3,
March 20
16, pp. 501 ~ 5
1
1
DOI: 10.115
9
1
/ijeecs.v1.i3.pp50
1-5
1
1
501
Re
cei
v
ed
No
vem
ber 2
7
, 2015; Re
vi
sed
Febr
uary 14,
2016; Accept
ed Feb
r
ua
ry
24, 2016
Analysis of AC-AC Converter Based Dynamic V
o
ltage
Restorer for Maintaining Power Quality in the
Transmission L
i
ne
Tamilv
anan G*, Mahendr
an S
Dep
a
rtment of EEE, K.S. Rangasam
y
C
o
ll
eg
e of
T
e
chnol
og
y
,
T
i
rucheng
od
e -637
21
5,
T
a
mil Nadu, India
e-mail: vrgtami
l
v
ana
n@gm
ail.
com
A
b
st
r
a
ct
In the pow
er s
ystem th
e maj
o
r issu
e is to
mainta
in
the
pow
er qu
ality. T
he
term of p
o
w
e
r
qua
lity is
to ma
inta
in the
disturb
ance
le
ss voltag
e to the p
o
w
e
r system. The v
o
lta
g
e
distur
banc
e
ma
inly c
aus
ed
by
voltag
e sag, vo
ltage sw
ell a
n
d
harmonics pr
e
s
ented i
n
t
he system. If the s
ystem volta
ge i
s
goin
g
bel
ow
to
the no
mina
l vol
t
age, then
it is
calle
d
as v
o
lta
ge sa
g. T
hese
pow
er qu
ality
(
P
Q) events typ
i
cally
last for le
ss
than
one
sec
o
nd. If the syst
em volta
g
e
is
goi
ng
ab
ove th
e n
o
min
a
l v
o
lt
age, th
ere
it is
call
ed
as v
o
lt
age
sw
ell. T
he AC
-AC converter
base
d
DVR i
s
propos
ed.
It can pro
perly
compe
n
sate fo
r unli
m
ited ti
m
e
durati
on, b
a
la
n
c
ed, an
d as
w
e
ll
as u
nba
la
n
c
ed vo
ltag
e sa
g by o
b
serv
ing
the p
o
w
e
r from th
e gri
d
. T
h
e
puls
e
w
i
dth modu
latio
n
tech
niq
ue is use
d
to triggerin
g the sw
itches. Only by the si
mp
le Bi
directi
o
nal
sw
itches w
e
re used for ge
ner
ate the co
mp
e
n
satio
n
volta
g
e
.
Ke
y
w
ords
:
vol
t
age sag, vo
lta
ge sw
ell, AC-A
C converters
1. Introduc
tion
Powe
r quality
is an issu
e that is be
comi
ng gr
adu
ally importa
nt to electri
c
ity con
s
umers
at entire
leve
ls of
usage.
Powe
r el
ectronic equi
pme
n
t and
non
-li
near loa
d
s are very
sen
s
iti
v
e
and the
s
e
a
r
e wi
dely u
s
ed in in
du
strial, comm
ercial and
dom
estic
appli
c
at
ions l
eadi
ng
to
distortio
n
in
voltage a
n
d
cu
rrent
wa
veforms.
In
mode
rn fully
automate
d
electri
c
al
po
wer
system
s, ele
c
tri
c
ity is pro
duced at ge
neratin
g stati
ons, tran
smit
ted throug
h a high voltage
station, and fi
nally it can di
stri
bute
d
to consume
r
s. Th
e rapidly in
creasi
ng po
we
r demand i
s
al
so
lead
s incre
a
s
e the el
ectric po
we
r sy
stem
s.
It has develo
ped
extensively durin
g the
20th
centu
r
y.Since
voltage sag
can h
app
en
even due to
a re
mote faul
t in a system, it is more often
than an i
n
terruption a
nd
ca
n occu
r 2
0–e
ach i
n
an i
n
d
u
stry [17]. 30
times p
e
r ye
ar
with a typi
cal
co
st of U.S.$
50 0
00 T
h
e
r
efore,
voltag
e sa
g i
s
a
seriou
s
po
wer-quality (P
Q) pro
b
lem to
be
addresse
d. Voltage di
stur
b
ances li
ke vol
t
age sa
g and
swell ar
e the most commo
n power q
uali
t
y
(PQ) proble
m
in i
ndu
stri
al di
st
ributio
n
syste
m
s an
d ha
rmo
n
ics,
unb
alan
ce
s,
and
flicke
rs [11]
also the maj
o
r consi
d
e
r
at
ion whil
e ma
intaining the
powe
r
Quali
t
y. These di
sturb
a
n
c
e
s
can
cau
s
e
the breakdo
wn of voltage-se
n
s
i
t
ive load
s in
factorie
s,
buil
d
ing
s
, an
d h
o
spital
s [6]
a
n
d
sever p
r
o
c
e
s
s di
sruption
s
resulting i
n
consi
der
able
commercial
an
d/or d
a
ta lo
sse
s
[7]. Volta
ge
sag i
s
a tempora
r
y decre
ase in the RMS AC voltage (1p
u–9
pu of the nomin
al voltage) at
the
power frequ
e
n
cy of du
rati
on from
0.5
cycle
s
to a f
e
w
se
con
d
s
[8]. The INF
L
UX of digit
a
l
electroni
cs fo
r cal
c
ul
ating
and control Applicat
io
ns
has p
r
e
pared
quality power an in
evitable
requi
rem
ent. A major
data
centre repo
rts that
a inte
rruption
can
co
st abo
ut U.S.$ 600
000 [1
7].
No
w a day
s
the voltage
maintaine
d
b
y
using by
t
he axillary e
nergy
sup
port conn
ecte
d with
power el
ect
r
o
n
ics switche
s
the device a
r
e n
a
med
as Dynami
c
Vol
t
age Resto
r
e
r
(DVR) Th
e
A
dynamic volt
age re
storer
(DV
R
) is
con
necte
d wi
th the sires to the cu
stom p
o
we
r device to
mitigate voltage sa
gs. Th
e injecte
d
voltage is ge
ne
rated eithe
r
by a voltage-sou
r
ce invert
er
su
staine
d by
energy sto
r
ag
e or conventi
onally by a
n
AC-DC-AC
converte
r. The
re
sent ye
ars
the
mitigation of voltage level can a
r
chived
by dire
ct co
n
v
erter it can
eliminating th
e set of dc li
nk.
Energy
stora
ge ma
ke
s the
DVR
unit
lar
ger i
n
si
ze
an
d v
e
ry
c
o
st
lie
r.
A
l
so,
t
he
d
c
lin
k imp
o
s
e
s a
limit on co
mpen
sation
cap
ability of the DV
R i
n
terms of
magnitude
and duration of
comp
en
satio
n
(4) Prelimi
nary
re
sea
r
ch on
the
ne
w family of
DV
Rs that
elimi
nates the
dc
link
dates b
a
ck to
1996 [9]. On
ly sparse d
e
velopme
n
ts
in
the topology
are r
epo
rted i
n
the literatu
r
e
[10]–[12], until prog
resse
s
i
n
semi
con
d
u
c
tor technol
o
g
y. The growt
h
of bidire
ctio
nal switche
s
, in
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 25
02-4
752
IJEECS
Vol.
1, No. 3, March 20
16 : 501 – 511
502
turn, augm
en
ted the gro
w
th of a new ra
nge of dire
ct
conve
r
ters, such a
s
matrix
converte
rs a
nd
Z-source
co
nverters.
T
h
e
matrix co
n
v
erter ha
s p
a
rticul
arly fo
und
appli
c
ati
ons in th
e
DVR
topologi
es [1
3]. In [13], a
co
mbinatio
n
of a
matrix
co
nverte
r a
nd a
flywhe
e
l
to formi
ng
the
energy
stora
ge, is a
c
tive t
o
mitigate
sa
g with
bidi
re
ctional p
o
wer flow, b
u
t the
i
n
cid
e
n
c
e
of t
h
e
flywheel a
gai
n limits the
compen
satio
n
cap
ability.
Vector ba
sed switchi
ng conv
erters (VeSCs)
[14], based
o
n
matrix
switching, a
r
e
u
s
e
d
to inj
e
ct
the
re
quired
po
si
tive- an
d n
e
g
a
tive-se
que
n
c
e
comp
one
nts
to com
pen
sa
te for b
a
lan
c
ed an
d u
nba
lanced voltag
e sags.
Tho
ugh the
cont
rol
looks ea
sy, it includ
es 1
0
tran
sform
e
rs
and 18 bi
dire
ctional swit
ch
es.in
[15-20] the AC cho
p
per
is used to p
r
odu
ce the
co
ntrolled A
C
voltage an
d
it is agai
n in
cre
a
se
d by tran
sformer th
en t
hat
voltage is ad
ded with
syst
em voltage for the s
ag co
mpen
sation. Whe
n
com
p
a
r
ing
conventi
onal
DVR with A
C
-AC converte
r based DV
R
it require
s le
ss com
pon
ent
s for getting voltage from t
h
e
sag. The
con
v
entional DV
R requi
re
s
th
ree
sta
ges
of
co
nversion
li
ke A
C
-DC-A
C
so th
at the
s
e
type of DVR requi
re
s both
rectifie
r a
nd inverter
set a
nd it also ne
ed a DC link,
and in AC-A
C
conve
r
ter b
a
sed com
pen
sa
tor can
elim
in
ate the all ab
ove the probl
ems.
1.1. Po
w
e
r
Q
u
alit
y
Distur
bance
s
There i
s
a
wide vari
ety of po
wer qu
ality distu
r
ban
ce
s
com
pen
sat
e
d
whic
h affec
t
the
perfo
rman
ce
of cu
stome
r
equipm
ent. T
he mo
st co
m
m
on of the
s
e
are b
r
iefly d
e
scrib
ed in t
h
is
se
ction of the
chapte
r
.
1.1.1. Voltage Sag
A
voltage sag
or
voltage di
p is a sh
ort d
u
ration
red
u
ction in RMS
voltage
which can b
e
prod
uced by a sho
r
t circuit
,
overload o
r
starti
ng of ele
c
tri
c
motors. A
voltage sag
happe
ns
wh
en
the RMS
volt
age
re
du
ce
s
betwe
en
10 a
nd 9
0
pe
rcen
t of ratted vol
t
age
for o
n
e
-
half cy
cle to
one
minute.
1.1.2. Interru
ption
Interru
ption i
s
defin
ed a
s
a red
u
ctio
n o
f
0.9 pu in v
o
ltage ma
gnit
ude for a pe
riod le
ss
than o
n
e
min
u
te. An inte
rruption i
s
co
n
s
ide
r
ed
by th
e du
ratio
n
a
s
the m
agnitu
d
e
is mo
re
o
r
l
e
ss
con
s
tant. An i
n
terruption mi
ght follow volt
age
sag if
the
sag i
s
p
r
od
u
c
ed
by a fault on the
sou
r
ce
system. Du
ri
ng the time required for the prote
c
tion
system to operate, the system see
s
the
effect of the
fault as
sa
g. Follo
wing
ci
rcuit
brea
ker ope
ration, t
he
system
g
e
ts i
s
olated
and
interruption o
c
curs.
1.1.3
.
Transi
ent ov
er Voltages, S
w
e
lls
Overvoltage
i
s
a
n
incre
a
se
of
Root
Mean
S
quare
(RMS
)
voltage
mag
n
itude
fo
r
l
o
n
ger
than one min
u
te. Typically the voltage magnitud
e
is
1-1.2 pu a
n
d
is cau
s
e
d
by switching off
a
large
load
fro
m
the sy
ste
m
, energizi
ng
a capa
ci
tor
ban
k, poo
r ta
p setting
s
on
the tran
sfo
r
mer
and inad
equ
a
t
e voltage re
gulation. Ove
r
voltages
ca
n cau
s
e eq
ui
pment ha
rm Powe
r Qualit
y
A
swell is typi
cally of a mag
n
itude b
e
twe
en 1.1 a
nd 1.
8 pu a
nd i
s
u
s
ually a
s
so
ci
ated with
sin
g
le
line to grou
nd
faults whe
r
e
voltages of n
on-faulte
d ph
ase
s
ri
se.
1.1.4. Voltage Imbalance
This type
of power
quali
t
y disturb
a
n
c
e is
cau
s
e
d
by uneq
ual
distri
bution
of load
s
among
st th
e
three
ph
ase
s
. At three
-
ph
ase
di
stribut
i
on level,
un
symmetrical
lo
ads at in
du
strial
units and tra
n
sp
osed line
s
ca
n re
sult in volt
age imbalan
ce. Voltage imbal
an
ce is of extreme
importa
nce for thre
e-p
h
a
s
e equipm
ent su
ch a
s
tran
sformers, mot
o
rs a
nd rectif
iers, for
whi
c
h it
results i
n
ove
r
heatin
g du
e
to a high
ne
g
a
tive seq
uen
ce
cu
rre
nt flo
w
ing i
n
to the
equipm
ent. T
h
e
asymmet
r
y can al
so
have
an
adverse
effect on
the
perfo
rman
ce
of co
nverte
rs, as it
re
sult
s in
the prod
uctio
n
of harmo
nic.
1.1.5. Cause
s
of Voltage
Sag and Voltage S
w
e
ll
Voltage sa
g is ca
used by swit
ch on the
higher ratting of loads an
d it also cau
s
ed by
whe
n
the
sh
ort ci
rcuit fau
l
t accru
e
s i
n
the syst
e
m
. On that
situa
t
ion the ta
ke
n from th
e p
o
we
r
system i
s
three or mo
re ti
mes of no
rm
al cu
rre
nt. So that the corresp
ondi
ng vo
ltage will be g
o
ing
to drop at sm
all interval of time this term
is
calle
d as v
o
ltage sag or
voltage dip. T
he voltage sa
g
is one of the
signifi
cant problem
s in po
wer
sy
stem.
Voltage swell
s
and ove
r
voltage
s are
most
often ca
used
by a sudd
e
n
de
crea
se i
n
load
on a
circuit
with a
poo
r or a d
a
mage
d voltage
Evaluation Warning : The document was created with Spire.PDF for Python.
IJEECS
ISSN:
2502-4
752
Analysis of A
C
-A
C Co
nverter Base
d Dynam
ic Voltag
e Re
store
r
for …
(Tam
ilva
n
an G)
503
regul
ator, tho
ugh they may
also
be a
re
sult of
a dama
ged o
r
a lo
ose neutral con
nectio
n
. It leads
to unne
ce
ssa
r
y power l
o
sses, lo
weri
ng
of the po
wer
f
a
ctor of the
supply an
d re
d
u
cin
g
efficie
n
cy.
More
over, these flu
c
tuatio
ns may sig
n
ificantly impa
ct the powe
r
q
uality as well
as the reli
abil
i
ty
of voltage co
ntrolling d
e
vices.
1.1.6. Effec
t
s
of Voltage S
a
g and S
w
e
l
l
Due to voltag
e sa
g and
swell, variou
s e
x
pensiv
e el
ectrical e
quipm
ent is in
sufferable to
su
ch flu
c
tuati
ons
may get
sub
s
tantially
dama
ged.
A
t
the dist
ribu
tion level, th
e voltage
sa
gs
occur when
a
sh
ort
circuit f
ault takes pla
c
e
on
a p
a
ral
l
el feed
er
an
d swell
is o
c
cur
whe
n
swit
ch
on the
ca
pa
ci
tive load. In a
ddition,
the
sag de
pth d
e
p
end
s on
the d
i
stan
ce from t
he fault lo
cati
on
and im
ped
an
ce
profile
of t
he
system
,
A
m
ong th
ese, two
po
wer qu
ality probl
em
s
su
ch
as voltage
sag
and volt
age
swell ha
ve been id
en
tified a major con
c
e
r
n to t
he custom
ers. The voltag
e
sag/
swell h
a
s majo
r influ
e
n
c
e
on th
e p
e
rforman
c
e
of t
he mi
croprocessor ba
se
d l
oad
s a
s
well
as
the sen
s
itive load
s. So that faults sho
u
ld
be av
oid to maintainin
g the po
wer q
u
a
lity. The dynamic
voltage re
storer is on
e of most relia
ble d
e
vi
ce to co
ntrol the probl
e
m
of voltage sag.
1.1.7. D
y
namic Voltage Restor
er
The Dynami
c
Voltage Re
st
ore
r
s
(DVR) and Un
i
n
terru
p
ted Po
we
r S
upply
system
s
(UPS)
have be
en
d
e
velope
d du
ring la
st two
decade
s a
n
d
they are
ca
pable to
com
pen
sate volta
g
e
harm
oni
cs, sags and swells
mai
n
taini
ng
a clea
n
regulate
d
voltage at
criti
c
al load
s d
u
ri
ng
enou
gh pe
rio
d
of time. N
e
verthele
s
s, they
depend
on device
s
to store en
ergy, like large
cap
a
cito
rs o
r
batterie
s
ban
k. Th
e
rated
power ope
rati
on i
s
a fun
c
ti
on of
the
si
ze
and
capa
city
of
these devi
c
es; if the
power i
s
in
creased, the
si
ze
of these de
vices will
increase. The
dynamic
voltage resto
r
er i
s
used t
o
co
mpe
n
sate voltage
i
n
the tra
n
smi
s
si
on line. T
he
DVR i
s
u
s
e
d
to
sup
p
ly or su
p
p
re
ss voltag
e
to transmi
ssi
on line for co
mpen
sation.
DVRs can b
e
cla
ssifie
d
into two majo
r gro
u
p
s
with
respe
c
t to the so
urce of
energy
employed
for com
pen
sati
on. The
con
v
entional
DV
R
with AC/
DC/AC conv
erter or DC/
A
C
conve
r
ter, wh
ich re
quires
energy stora
ge eleme
n
ts
,
such a
s
batt
e
ry or ca
pa
ci
tor ban
ks. Th
ese
DVRs
suffer
from di
sa
dva
n
tage
s, such
as limited
time of
com
p
e
n
satio
n
, hig
h
co
st, an
d l
a
rge
energy stora
ge devices.
The second
grou
p of DV
Rs i
s
re
alize
d
without a
DC lin
k u
s
ing
dire
ct
AC/AC
conve
r
ters. In a
direct
conve
r
ter-based
DV
R
with a
boo
sti
ng tra
n
sfo
r
m
e
r
ratio
of 1:1
wa
s
pre
s
ente
d
in whi
c
h, five bidire
ctional
switch
e
s
are u
s
ed alon
g with
the serie
s
tra
n
sformer.
2.
Proposed AC-AC
Conv
erter Bas
e
d Ne
w
DVR
To
polog
y
Figure 1. Block di
agram of
AC-AC
conv
erter b
a
sed DVR
In the new p
r
opo
se
d DV
R topology
mainly co
n
s
i
s
ts of dire
ct conve
r
ter
co
upled with
cente
r
tapp
e
d
tran
sform
e
r. The cente
r-t
appe
d se
rie
s
transfo
rme
r
i
s
co
nne
cted betwe
en
the grid
and A
C
-A
C
converte
r (Fig
ure
1). T
he tu
rns ratio of
ce
nter-ta
ppe
d transfo
rme
r
i
s
1:1. So that t
he
indu
ced
volta
ge at th
e
se
con
dary
exa
c
tly equ
al to
prim
ary. L
C
filter i
s
u
s
e
d
to
red
u
ce
the
harm
oni
cs to
the sy
stem. T
he di
re
ct con
v
erter ta
ke
s t
he p
o
wer
re
q
u
ired
for com
pen
sation
fro
m
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ISSN: 25
02-4
752
IJEECS
Vol.
1, No. 3, March 20
16 : 501 – 511
504
the gri
d
. The
switchin
g p
u
l
se
s of the
converte
r a
r
e
given by o
r
di
nary p
u
lse wi
dth mod
u
lati
on
techni
que
s. Each o
ne of th
e pha
se is h
a
v
e three AC–
A
C co
nverte
rs and that A
C
-A
C co
nvert
e
r
formed by th
e bidire
ction
a
l
switche
s
. The se
co
nda
ry of +serie
s
transfo
rme
r
p
r
odu
ce the t
w
o
different level
s
of voltages
3. Sag and Sw
e
ll Compe
n
sation
The left si
de
end
windi
ng
output voltag
e will b
e
in
p
hase with th
e
grid volta
ge
and the
right en
d win
d
ing outp
u
t voltage will
be
out of pha
se
with the gri
d
voltage for t
he re
ason of
get
prop
er inje
cti
ng voltage to the sou
r
ce. In the pr
opo
se
d topology, Sa1 is the switch conne
cted
in
one termi
nal
of the cente
r
-tapped
seri
es transfo
rme
r
for pha
se ‘
R
’. Whe
n
switch
Sa1 is clo
s
e
d
,
the output vo
ltage of the
center
ta
ppe
d
seri
es tran
sfo
r
mer will
be i
n
pha
se
with
the ph
ase ‘
R
’
voltage. Sa2
is the switch conn
ecte
d in the
oth
e
r termi
nal
of the cente
r-tap
ped
se
ri
es
trans
former.
Hen
c
e,
whe
n
the switch S
a2 is
clo
s
e
d
, the
output v
o
ltage of the
cente
r-ta
ppe
d se
rie
s
Tran
sfo
r
mer
will be out of pha
se with th
e pha
se
‘R’ voltage. Sa3 is the
switch co
nne
cted
a
c
ro
ss
the center-ta
pped
serie
s
t
r
an
sform
e
r.
Whe
n
the
ph
ase
‘R’ volta
g
e
is at the
ba
lanced
con
d
ition,
swit
ch Sa3 i
s
in clo
s
ed
co
ndition to sho
r
ten the p
r
im
ary sid
e
of th
e se
rie
s
tran
sformer. If pha
se
‘R’ ha
s
sag,
then the
switch
es S
a1’
and Sg
3
a
r
e alternatively switched t
o
gen
erate
the
comp
en
satin
g
voltage till t
he voltag
e ge
tting bala
n
ce
whi
c
h i
s
in
ph
ase
with
the
grid volta
ge,
as
sho
w
n in Fig
u
re
s 2 and 3.
Figure 2. Sag compe
n
satio
n
Figure 3. Dire
ct conve
r
ter
model
(1)
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IJEECS
ISSN:
2502-4
752
Analysis of A
C
-A
C Co
nverter Base
d Dynam
ic Voltag
e Re
store
r
for …
(Tam
ilva
n
an G)
505
In equation
(1, 2, 3), l, g, and con
sub
s
cripts
are u
s
ed fo
r the load, grid, and
comp
en
satin
g
mea
s
ures,
respe
c
tively. The se
con
d
sub
s
cri
p
t refers to the
corre
s
po
ndi
ng
pha
se
s. Assuming
sinu
so
idal waveforms a
nd
con
s
iderin
g on
p
hase ‘a’, the
voltages
ca
n be
expre
s
sed a
s
follows:
ѡ
ѡ
and
ѡ
Ø
(2)
In the equatio
ns the p
e
a
k
value
s
of load,
grid,
an
d inje
cted voltag
es are give
n, the value of
Ø
is
0 for sa
g com
pen
sation.
If swell i
s
fo
und, then
switche
s
Sa2 a
nd S
a3
a
r
e alternatively swit
che
d
to balan
cing
voltage i
s
a
d
ded
or re
du
ced to
the
grid
thro
ugh
the
cente
r
ta
ppe
d seri
es tran
sformer a
c
cording
to the voltage
oscillation p
r
odu
ced in th
e
transmi
ssio
n
line by the di
fferent type o
f
miss b
ehavi
o
r
in the line.
The ea
ch
of the co
nvert
e
r ha
s
singl
e
MOSFET a
nd four
diod
es. Th
e switche
s
a
r
e
controlled
by
a pul
se
wi
dth mod
u
lation
(PWM
) te
ch
nique.
Con
s
i
derin
g Fig
u
re
1, the follo
wing
equatio
n ca
n be obtain
ed:
vr
=
vG r
+
vGr
comp
vy =
vGy+
vGy c
o
mp
vb =
vGb +
Vb c
o
mp
(3)
In the three e
quation, Vr, Vy, Vb are the out
put load v
o
ltage
s for th
e three p
h
a
s
es VGr,
VGy, VGb are the g
r
id volt
age of
ea
ch
pha
se
s an
d
Vr co
mp, Vy comp, Vb
co
mp compe
n
sating
quantitie
s. All the voltages are only refe
rred a
s
a sin
u
s
oid
a
l quantiti
e
s. So the ab
ove equation
is
written like be
low; pea
k val
ue of the Loa
d voltages ex
pre
s
sed a
s
;
vr
=
v r
s
i
n(
ω
t)
vy =
vy
s
i
n(
ω
t)
vb =
vb s
i
n(
ω
t)
(4)
The pea
k val
ue of the grid
voltage ca
n b
e
expre
s
sed
as
v
L
r = VLr
sin(
ω
t)
vLy =
VLy s
i
n(
ω
t)
vLb = VLb sin
(
ω
t)
(5)
And the pea
k value of the comp
en
satin
g
voltage ca
n
be expre
s
se
d as
v
r
comp
= V
r
comp
sin
(
ω
t +
∅
)
vy c
o
mp =
vy c
o
mp
s
i
n(
ω
t +
∅
)
V
b
comp
= v
y
comp
sin
(
ω
t +
∅
)
(6)
∅
is the pha
se angle of th
e injecte
d
voltage and
∅
i
s
minimum value for sa
g an
d the maximu
m
value for swel
l.
4. Contr
o
l Procedur
e
Single-pha
se
d-q theo
ry is used to qu
a
n
tify
the volta
ge sa
g and
swell in ea
ch
pha
se.
The g
r
id volt
age i
s
me
asured
by u
s
in
g a p
o
tential
transfo
rme
r
.
This m
e
a
s
u
r
ed g
r
id volta
ge is
given a
s
inp
u
t
to the analo
g
to digital
co
nverte
r
(ADC) of the mi
cro
c
ontrolle
r. Th
e ADC
output
is
expre
s
sed i
n
two form
s. O
ne form
is th
e
true o
u
tput
a
s
in
normal. T
he othe
r o
u
tp
ut is d
e
layed
by
5ms (or 90
°),
as sho
w
n in
Figure 4.
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ISSN: 25
02-4
752
IJEECS
Vol.
1, No. 3, March 20
16 : 501 – 511
506
Figure 4. Firing circuit
4.1. Voltage Sag and S
w
ell Mitigation
In orde
r to mitigate the voltage sa
g, it is ne
ce
ssary to inject volta
ge in pha
se
with the
grid voltage.
The two diff
erent p
o
larity
volt
ages a
r
e taken from
cente
r- tap
p
ed tran
sform
e
r
.
Such that one will
be in phas
e and the other end
out
put of the transformer
will
be out of
phase
with the
gri
d
voltage. The
r
efore, th
e
swi
t
che
s
t
hat
co
rrespon
d to
sy
nthesi
s
volta
g
e
in
pha
se
wi
th
the g
r
id volta
ge a
r
e
cho
s
e
n
. He
nce, if
voltage
sa
g
occurre
d
in
p
hase ‘a’
then
the bi
directi
onal
swit
che
s
Saa’
and Sga will
be altern
at
ively modulated
to mitigate the sag.
A detailed blo
ck dia
g
ram for swit
chin
g pu
lse
gen
eratio
n to mitigate
voltage sag i
s
shown
in Figu
re. Th
e pea
k val
u
e
of grid
volta
ge Ug
max i
s
alre
ady com
puted from
si
ngle-pha
se
d
-
q
transfo
rm.
U
referen
c
e i
s
the pe
ak val
u
e of the ra
ted
voltage, whi
c
h is a
user
sp
ecified
co
nst
ant
value set in
the micro
c
o
n
trolle
r p
r
og
ram. The
differen
c
e
between the
refe
ren
c
e voltag
e U
referen
c
e a
n
d
pea
k valu
e
of the gri
d
vol
t
age Ugma
x
provide
s
the
amount
of voltage sag o
r
swell
in the grid.
5. Simulation of Propose
d
AC –
AC
Conv
erter Bas
e
d DVR
The MATLAB
/SIMULINK software
wa
s use
d
for sim
u
lation. Thre
e pha
se RL l
oad were
con
n
e
c
ted to
the line
s
. Th
e
de
sire
d termi
nal voltage
was
set at
70
V rms (1
p.u
)
, 50
Hz.
The
L
C
filter is u
s
ed
redu
ce
ha
rmo
n
ics p
r
o
d
u
c
e
d
in
t
he
syste
m
. The
L val
u
e is fixed
at 1
.
732 mil
e
He
nry
and th
e
cap
a
c
itor value
is
fixed as 15
mile Fa
rad.
T
he a
b
ility of the
DVR to m
i
tigate bal
an
ced
voltage
sag
of 50% i
n
all
the
pha
se
s.
It ca
n al
so
comp
en
sate
the
voltage
swell at
u
n
limi
t
e
d
quantity.
5.1. Unbalan
ced Voltag
e (Voltag
e
Sag
)
and th
eir Corresp
ondin
g
Curre
nt
The u
nbala
n
ced voltage
sa
g and th
eir
co
rre
sp
ondi
ng
current
is sh
o
w
n
in Figu
re 5.
From
the ab
ove fig
u
re th
e
sag
i
s
p
r
od
uced f
r
om 0.1
se
c. and
th
e corre
s
po
ndin
g
current
al
so sh
o
w
n.
In the X axis
the time is
n
o
ted an
d in t
he axis
volta
ge an
d curre
n
t is n
o
ted. T
he voltage
sa
g is
prod
uced du
e to any kind
of short ci
rcuit or
switchi
ng on the m
o
tor load
s. In
above figure
the
voltage level is red
u
ci
ng int
o
0.8 pu valu
e of the norm
a
l system volt
age.
Evaluation Warning : The document was created with Spire.PDF for Python.
IJEECS
ISSN:
2502-4
752
Analysis of A
C
-A
C Co
nverter Base
d Dynam
ic Voltag
e Re
store
r
for …
(Tam
ilva
n
an G)
507
Figure 5. Unb
a
lan
c
ed volta
ges (volta
ge
sag
)
and thei
r corre
s
po
ndin
g
curre
n
t
5.2. Compen
sating Volta
g
e of DV
R While Producing Sag
The figure 6 sho
w
s the DVR inje
cting vo
ltage
while the
prod
uci
ng sag in the
transmissio
n
line. In th
e ti
me of volta
g
e
sag
the vol
t
age
red
u
ced
from
the
no
minal voltag
e
.
So
the voltage in
jected fro
m
the DVR is in
p
hase with the
system volta
ge.
Figure 6. Co
mpen
sating v
o
ltage of DV
R whil
e pro
d
u
c
ing
sag
At normal tim
e
he inje
cting
voltage of the DV
R i
s
zero at faulted condition the
AC-AC
conve
r
ter is t
r
igge
re
d by the cont
rol ci
rcuit
then it is going to co
ndu
ct until the voltage gets
comp
en
sat
e
d
.
Compen
sati
ng voltage of DVR while p
r
odu
cing
sag i
s
sh
own in Figure 6.
5.3. Compen
sate
d
Voltag
e
The co
mpe
n
s
ated voltag
e
,
after produ
cing sa
g is sh
own in Fig
u
re 7. After the time o
f
0.1se
c
comp
ensating voltage is p
r
od
uced by the
DVR. Then that in pha
se voltage is add
ed
with
uncompe
nsated voltage so that the vo
ltage level
ca
n get regulat
ed. The reg
u
l
ated voltage
is
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ISSN: 25
02-4
752
IJEECS
Vol.
1, No. 3, March 20
16 : 501 – 511
508
contin
uou
sly prod
uced unt
il the compe
n
sate
d leve
l is rea
c
h
ed. F
r
om the prop
ose
d
DVR
can
mitigate the 50% of swell.
Figure 7. Co
mpen
sated v
o
ltage
s
5.4. Compari
s
on of Balan
ced and
Unb
a
lanced Voltages
The com
p
a
r
i
s
on of un
co
mpen
sated v
o
ltage wi
th th
e comp
en
sat
ed voltage is shown in
Figure 8. F
r
om that figu
re the in
put side t
he
sa
g i
s
ap
pea
re
d
until 0.1
se
c and th
e sa
g is
contin
ued a
s
unlimited time perio
d. The
next wa
veform sh
ows the comp
en
sat
ed voltage. The
sag
can b
e
el
iminated com
p
letely from 0
.
12 se
c.
Figure 8. Co
mpari
s
o
n
s of
bal
an
ce
d and
unbala
n
ced
voltages
5.5. Unbalan
ced Voltag
e (Voltag
e
S
w
ell) and their
Corres
pond
ing Curren
t
The
figu
re 9 sho
w
s
the un
balan
ce
d
voltage sou
r
ce. The
voltag
e swell
is prod
uce
d
du
e
to any ki
nd of
sud
den
op
en
circuit a
nd
al
so d
ue to
discon
ne
ct the h
i
gher ratted
l
oad
s. Fro
m
t
h
e
Evaluation Warning : The document was created with Spire.PDF for Python.
IJEECS
ISSN:
2502-4
752
Analysis of A
C
-A
C Co
nverter Base
d Dynam
ic Voltag
e Re
store
r
for …
(Tam
ilva
n
an G)
509
above figu
re
the sa
g i
s
p
r
odu
ced f
r
om
0.1 se
c.
a
nd
the co
rrespo
nding
cu
rrent
also
sho
w
n.
In
the X axis the time is note
d
and in Y th
e axis
voltag
e and
current
is noted. Th
e voltage swell is
prod
uced
du
e to di
scon
ne
ct the
load
su
ddenly
or swi
t
ching
on
the
cap
a
cito
r b
a
n
ks.
The
volta
g
e
level is rai
s
in
g into 1.2 pu value of the normal
system
voltage is sh
own in Fig
u
re
6.5.
Figure 9. Unb
a
lan
c
ed volta
ge (voltage
swell) a
nd corresp
ondi
ng cu
rre
nt
5.6 Compen
sating Volta
g
e of DV
R While Producing S
w
ell
The
Comp
en
sating volta
g
e
of DV
R
whi
l
e the time
of prod
uci
ng swell
is sh
own
i
n
Figu
re
10. That time
the DVR p
r
o
duces the vol
t
age in
the o
u
t of phase to the system
voltage. It will be
subtracte
d
to
the sou
r
ce voltage. The
DVR p
r
od
uces compe
n
sa
ting voltage until the swel
l is
comp
en
sated
.
At normal ti
me the inj
e
cti
ng voltage
of
the DV
R i
s
zero at faulte
d co
ndition t
he
AC-AC conv
erter is trigg
e
r
ed
by the
co
ntrol
circui
t t
hen it i
s
g
o
in
g to
con
duct
until the volta
ge
gets compe
n
s
ated.
Figure 10. Co
mpen
sating v
o
ltage of
DV
R whil
e pro
d
u
c
ing
swell
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ISSN: 25
02-4
752
IJEECS
Vol.
1, No. 3, March 20
16 : 501 – 511
510
5.7. Compen
sate
d
Voltag
e
The com
pen
sated
voltag
e,
after pro
d
u
c
i
ng swe
lls is shown in
Figu
re 1
1
. After t
he time
of 0.1se
c
co
mpen
sating v
o
ltage is p
r
od
uce
d
by the DVR.
Figure 11. Co
mpen
sated v
o
ltage
s
Then that ph
ase
shifted voltage is a
d
d
ed wi
th un
co
mpen
sated v
o
ltage, so th
at the
voltage level
can get re
gulated. Th
e
regulat
ed
voltage is
co
ntinuou
sly produ
ced u
n
til the
comp
en
sated
level is re
ached. Fro
m
th
e pro
p
o
s
ed
DVR
can miti
gate the unli
m
ited qua
ntity of
swell. The re
gulated volta
ge is continu
ously pr
odu
ced until the compen
sate
d level is rea
c
h
ed.
From the p
r
o
posed DV
R can mitigate
the unlimited q
uantity of swe
ll.
5.8. Compari
s
on of Balan
ced and
Unb
a
lanced Voltages
The
com
pari
s
on
of u
n
co
mpen
sated
voltage
with th
e compe
n
sated voltag
e i
s
sh
own in
Figure 12. From the propo
sed
DV
R the
input sid
e
th
e swell is a
p
peared fro
m
0.1 se
c an
d the
swell is
cont
inued a
s
u
n
l
i
mited time perio
d. The
next waveform sho
w
s th
e com
pen
sat
ed
voltage.
Figure 12. Co
mpari
s
o
n
s of
bal
an
ce
d and
unbala
n
ced
voltages
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