Indonesian J
ournal of Ele
c
trical Engin
eering and
Computer Sci
e
nce
Vol. 2, No. 2,
May 2016, pp
. 305 ~ 314
DOI: 10.115
9
1
/ijeecs.v2.i2.pp30
5-3
1
4
305
Re
cei
v
ed Ma
rch 2, 2
016;
Re
vised Ap
ril
25, 2016; Accepte
d
May 1
,
2016
Power Sharing for Inverters Based on
Virtual
Synchronous Generator Control
Am
ar H
a
m
z
a
*
1
, Hashim Hasabelr
asul*
2
, Omar Busati
3
, Xiang
w
u Yan
4
Univers
i
t
y
of Kordofa
n
, State Ke
y
Lab
orator
y of Alternate El
ectrical Po
w
e
r
S
y
stem
w
i
th R
ene
w
a
b
l
e En
er
g
y
Sources (N
orth
Chin
a Electric
Po
w
e
r U
n
ivers
i
t
y
), Cha
ngp
in
g District, Beijin
g
1022
06, Ch
ina
*Corres
p
o
ndi
n
g
authors, e-m
a
il: amar
hamz
a20
10@
hotma
i
l
.com
1
, hashim
h10
@
y
ah
oo.co
m
2
,
omarbusati@gmail.com
3
, xi
an
g
w
u
y
@
hotma
il
.com
4
A
b
st
r
a
ct
Pow
e
r shari
ng
is the
most i
m
portant ch
all
e
n
g
in
g to
d
a
y, es
peci
a
lly for
par
alle
l o
perati
on
i
n
verters.
Rece
ntly to fixed this pro
b
l
e
m the virtu
a
l s
y
nchro
nous
ge
nerator co
ntrol
stra
tegy has bee
n use
d
. T
h
is
pap
er
intro
duc
ed
the para
lle
l oper
ation of
three-p
hase
multil
evel i
n
verters
w
i
th different capac
ities to sh
a
r
e
loa
d
pow
er
by
used
a new
ly
strategy na
med VSG w
i
th
d
r
oop
method c
ontrol
l
er. T
he
control strate
g
y
is
used
to
mak
e
the
i
n
verter
s to e
m
ul
ate
the tr
ansi
ent
an
d
dyna
mic
char
ateristics
of co
nve
n
tio
nal
synchro
nous
g
ener
ator an
d to gives
accur
a
te loa
d
shar
in
g a
m
o
ng the
i
n
verters in
pro
portio
nal to th
eir
ratings. T
o
ver
i
fy the perfor
m
ance of the pr
opos
ed
tech
ni
que MAT
L
AB/
Simuli
nk pack
age for si
mu
la
tion
exper
iment is e
s
tablis
hed.
Ke
y
w
ords
:
p
a
rall
el
oper
ati
on; three
ph
a
s
e multil
eve
l
i
n
verter; dro
o
p
controll
er; vir
t
ual sync
h
ron
ous
gen
erator co
ntrol; loa
d
shari
n
g
Copy
right
©
2016 In
stitu
t
e o
f
Ad
van
ced
En
g
i
n
eerin
g and
Scien
ce. All
rig
h
t
s reser
ve
d
.
1. Introduc
tion
For the environmental eff
e
cts,
the dist
ributed g
ene
rators
(DG) b
a
se
d on ren
e
wa
ble
energy sources
con
n
e
c
tin
g
to t
he p
o
wer
system via
power
ele
c
tronic i
n
verte
r
are
gro
w
in
g [1].
This type of i
n
verters can
operat
e a
s
co
nventional
synch
r
on
ou
s ge
nerato
r
. Altho
ugh, the 2-l
e
vel
inverter
offers fast an
d a
c
curate
co
ntrol
of
the output
power, it re
qu
ires a
DC volt
age hi
ghe
r th
an
the pea
k AC voltage whi
c
h is not alwa
ys dire
ctly
available, high f
r
equ
en
cie
s
a
bout (3 kHz-
10
kHz)
and A
C
filters to obt
ain high
quali
t
y output
voltage an
d current.Thu
s, it has limited
used
mainly due
to switchin
g losse
s
, switchi
ng dev
ice voltage
rating
con
s
trains, a
nd h
i
gh
elec
tromagnetic
interferenc
e
(EMI) [2]. On the ot
he
r si
de, multil
evel po
we
r i
n
verters
spe
c
ially
cascaded
H-bridge m
u
ltilevel in
verte
r
prese
n
t the
advanta
g
e
s
of p
r
od
uci
n
g bette
r q
u
a
lity
waveform (low total harmonic di
stortion) at the poi
nt
of connection to the grid
and facilitating the
large
scale in
tegration of DG due to their modula
r
ity [3-7].
Gene
rally, the DG
can
op
erate in i
s
la
n
d
mode
or g
r
i
d
co
nne
cted
mode. In case of islan
d
mode, ho
w to sha
r
e a
c
tive and re
activ
e
powe
r
amo
ng parallel conne
cted inv
e
rter b
e
come
a
chall
engin
g
[
1
]. Und
e
r isl
a
nding
mod
e
,
voltage ma
gn
itude a
nd f
r
e
quen
cy a
r
e
d
r
ift at the
poi
nt of
comm
on
cou
p
ling (P
CC)
therefo
r
e i
s
la
nding
prote
c
t
i
on is im
po
rtant issue
s
.
The Isl
andin
g
Dete
ction Me
thods (I
DM
s) have been
use
d
, which cl
a
ssifie
d
in to three type: passive, active,
and
rem
o
te
method
s. Pa
ssive
IDM
s
relay on
the
d
e
tection
of th
e di
sturban
ce
in th
e voltag
e at
PCC, which are effective
i
n
prev
enting i
s
lan
d
ing i
n
system with l
a
rge
power i
m
balan
ce
s. Act
i
ve
IDMs
use av
ariety of meth
ods i
n
a
n
atte
mpt to cau
s
e
an ab
no
rmal
con
d
ition
(di
s
turban
ce
) in
the
PCC voltage’
s magnitu
de
and freq
uen
cy [6].
There is va
ri
ous
cont
rol m
e
thod
s for di
stri
bution g
ene
rators h
a
ve b
een devel
ope
d. One
of them used
curre
n
t so
urce
s inverte
r
(CSI) c
ontrol,
but the drawb
a
ck
of this
m
e
thod me
ntio
ned
before i
s
that the CSIs as
DG
s are n
o
t able to wo
rk i
n
an islan
d
m
ode, and al
so
in case of la
ck
of inertia
can
not take a
ma
jor p
r
opo
rtion
in the network
[8-10].
To
solve this p
r
ob
lem the volta
ge
sou
r
ces i
n
verters
cont
rol
method
s a
r
e
use
d
in
stea
d of CSIs. T
here
are several m
e
thod
s like
droo
p
co
ntrol
is a
well
ap
p
lied fo
r VSI
control,
wh
i
c
h
is u
s
e
d
to
sol
v
e the
pro
b
le
ms
as isl
andi
ng
mode o
p
e
r
ati
on an
d po
we
r sha
r
ing. But
DG
s eq
uipp
e
d
with d
r
oo
p
control a
r
e ex
perie
nces
so
me
probl
em a
s
the insta
b
ility
of frequen
cy becau
se of
the lack of inert
i
a. Thus, the voltage so
urces
inverter h
a
s a new met
hod for
cont
rol have be
en pro
p
o
s
ed
named virt
ual syn
c
hron
ous
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 25
02-4
752
IJEECS
Vol.
2, No. 2, May 2016 : 305 –
314
306
gene
rato
r VSG. The co
ncept of the virtual syn
c
h
r
o
nou
s gen
erat
or is to em
u
l
ate the swi
n
g
equatio
n of the syn
c
hrono
us ge
nerator,
which m
a
ke
the inverter li
ke c
onventio
nal syn
c
hron
ous
gene
rato
r su
ch as dyn
a
m
ic ch
ara
c
te
ristics,
and
make it have virtual inertia. the main
advantag
es
of the VSG is: the invert
er outp
u
t po
wer
ca
n be
made p
r
op
ortional to the
grid
freque
ncy, b
y
setting excitation the output volt
age can be ea
sily regul
ated, st
ability operati
o
n
whe
n
more t
han two ge
n
e
rato
r are op
erated in pa
rallel, load sh
aring
can be
easily achiev
e b
y
applying
a fre
quen
cy -
acti
ve power
-
static etc [
11].
The virtual
sy
nch
r
on
ou
s g
e
nerato
r
(VSG
) is
one
of the i
m
porta
nt techniqu
es to
cope
with
sta
b
ility
issue
s
in
po
we
r system whe
n
DG
c
o
nnec
ted to the gird [12-14].
For pa
rallel
operation, the mo
st important
p
o
int
is that the load shari
n
g amon
g
inverters.
Usually th
ere
are
two
types
of
co
ntrol
schem
es. Fi
rst
on
e ba
se
d on
the
comm
uni
cati
on sy
stem, which limit the
system
relia
b
ility, and expanda
bility. The se
co
nd o
n
e
is
based o
n
d
r
oop m
e
thod
whi
c
h
ope
rate thro
ugh
tight adju
s
tm
ent over th
e
output volta
g
e
freque
ncy an
d amplitude o
f
the inverter to compe
n
sate the active and rea
c
tive p
o
we
r unb
alan
ce
[15,1].
This pa
per i
n
trodu
ce
d th
e pa
rallel
o
p
e
ration
of th
ree-p
h
a
s
e
mu
ltilevel invert
ers
with
different
cap
a
citie
s
to
sh
are l
oad
po
wer by u
s
e
d
a n
e
wly
strategy nam
ed
VSG with
d
r
oop
method
controller. T
h
e
co
ntrol
strate
gy is u
s
ed
to m
a
ke
the
inverters to e
m
ula
t
e the tran
sie
n
t
and dyn
a
mi
c cha
r
ate
r
isti
cs of
conve
n
tional
synchr
o
nou
s ge
ne
rat
o
r a
nd to
gives a
c
cu
rate l
oad
sha
r
ing a
m
on
g the inverters in pro
p
o
r
tio
nal to their rat
i
ngs.
The re
st of this pa
per i
s
orga
nized a
s
follo
ws: sect
ion II gives the co
ncept o
f
inverter
descri
p
tion a
nd VSG co
ntrol. Mathem
a
t
ical mod
e
l synchrono
us
g
enerator d
e
scrib
ed in
se
ct
ion
III, in section
IV the droop control for f-P and v-
Q are presented, parall
e
l operation of inverters
details
given i
n
se
ction V, i
n
se
ction VI
simulati
on
re
sults an
d an
al
ysis a
r
e
discu
s
sed, an
d all
the
simulatio
n
s
are p
e
rfo
r
m
ed in MAT
L
AB/Simulink, finally conclu
sio
n
s a
r
e mention
e
d
in
s
e
c
t
ion VIII.
2. In
v
e
rter Structur
e and
VSG Contr
o
l
Figure 1
depi
cts th
e thre
e-pha
se inve
rte
r
whic
h con
s
i
s
ts of
ca
scad
ed conn
ectio
n
of 10
cell
s of H-b
r
i
dge in ea
ch
pha
se of the inverter
. Each bri
dge
co
nsi
s
ts of four insulated
-
g
a
t
e
bipola
r
tran
si
stor (IGBT) switch
es drive
n
by
pulse width-mo
dulate
d
(PWM
) gat
e circuit
s
, an
d
isolate
d
DC sou
r
ce. The
VSC use
d
to perform
the
function
s of the DC/AC co
nversi
on an
d
to
interface with
the grid if needed.
Figure 2 sho
w
s th
e po
we
r circuit for o
n
e
pha
se le
g
of a three
-
lev
e
l ca
scade
d i
n
verter.
The
circuit ge
nerate
s
th
ree
voltages at the outp
u
t (+
V
d
c, 0, -V
dc) a
s
in ta
ble 1.
We a
s
sum
e
that
the DC bu
s
of the VSC i
s
con
s
tant. T
hen, Th
e AC output ph
ase voltage i
s
con
s
tru
c
ted
by
addin
g
the vo
ltages
gen
era
t
ed by the dif
f
erent
cells.
One a
d
vanta
ge of this
structure i
s
that
the
output wavef
o
rm is n
early
sinu
soi
dal [16
,
17].
The overall
structu
r
e a
s
depicte
d
in Figure
3
is
sh
o
w
n po
we
r pa
rt of the virtu
a
l synch
r
o
n
o
u
s
gene
rato
r with capa
cito
r bank
conn
ecte
d in parallel
with the stato
r
terminal. Fi
gure
4
depi
cts the
electroni
c pa
rt (control part
)
of the VSG [18].
Table 1. The
swit
chin
g stat
es corre
s
po
n
d
ing to Figu
re
2
S1
S2 S3 S4
Vo
1
1
0
0
0
0
1
1
1
1
0
1
0
0
1
0
+Vdc
0
0
-Vdc
Evaluation Warning : The document was created with Spire.PDF for Python.
IJEECS
ISSN:
2502-4
752
Powe
r Shari
n
g for Inve
rters Base
d on V
i
rtual Syn
c
h
r
o
nou
s Gen
e
rat
o
r Co
ntrol
(A
m
a
r Ham
z
a)
307
Figure 1. Three pha
se 2
1
-l
evel ca
scade
d H-
Bri
dge m
u
ltilevel inverter (Y-
con
n
e
c
ted)
Figure 2. One
cell structu
r
e
of cascad
ed
inverter
,
s
s
R
L
,
s
s
PQ
,
g
g
RL
ab
c
v
abc
e
ab
c
i
123
v
123
i
Figure 3. Power p
a
rt of the
virtual synchron
ou
s gen
e
r
ator
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 25
02-4
752
IJEECS
Vol.
2, No. 2, May 2016 : 305 –
314
308
Figure 4. Electroni
c pa
rt (control pa
rt) of
VSG
3. Sy
nchronous Gen
e
ra
tor Math
ematical Model
Figure 5 sho
w
s the sim
p
li
fied stru
cture
of
a round rotor of the synch
r
on
ou
s g
enerator,
whi
c
h
ha
s p
a
i
r of
pole
on
the rotor
pa
rt (p
=1
). In
thi
s
p
ape
r the
mathemati
c
al
model
that i
s
a
passive dyna
mic sy
stem without any assump
tio
n
on the sig
nal is e
s
tabli
s
he
d [19].
,
SS
RL
,
SS
RL
,
SS
RL
,
f
f
RL
ca
x
i
s
aa
x
i
s
ba
x
i
s
0
a
b
c
c
i
a
i
b
i
b
v
c
v
a
v
f
u
f
f
Figure 5. Structure of a
n
idea
lized thre
e-pha
se ro
und
-rotor SG
The mathe
m
atical mo
del
of the three
-
p
hase
ro
und
-rotor SG that
descri
bed by
equatio
ns
(1-15) i
s
used
in this pape
r as controll
er [
20, 21, 17].
(1)
(2)
The
swing
eq
uation
of the
synchro
nou
s
machi
n
e
a
c
cordin
g to
me
cha
n
ical p
a
rt
is give
n
by:
2
(3)
Evaluation Warning : The document was created with Spire.PDF for Python.
IJEECS
ISSN:
2502-4
752
Powe
r Shari
n
g for Inve
rters Base
d on V
i
rtual Syn
c
h
r
o
nou
s Gen
e
rat
o
r Co
ntrol
(A
m
a
r Ham
z
a)
309
(4)
〈
,
〉
(5)
(6)
〈
,
〉
(7)
〈
,
〉
(8)
2
3
2
3
2
3
2
3
(9)
Whe
r
e
T
is th
e electrom
ag
netic torqu
e
.
θ
is the rotor
angle.
P
and
Q
are the active
and re
active
power respe
c
tively.
H
is
the inertia cons
tant.
4. Droop Co
ntrol
For emul
atin
g the droo
p controlle
r of c
onve
n
tional synchro
nou
s gene
rato
r
to
operate
the inve
rters, there i
s
ve
ry
importa
nt controlle
r
req
u
i
red
whi
c
h
i
s
gen
erating t
he m
e
chani
cal
torque sign
al
T
and field exci
tation
M
signal
s which are giv
en as: [4]
_
(10
)
_
(11
)
1
(12
)
(13
)
_
(14
)
Whe
r
e
T
is the mechani
cal torqu
e
applied
to
the rotor.
M
is the field excitation.
θ
is th
e
angul
ar spe
e
d
.
ω
is the no
minal me
cha
n
ical
spe
ed.
D
is the fre
que
ncy droop
co
efficient.
D
is the voltage
droop
coefficient.
V
is the output voltage amplitude
whi
c
h is give
n as:
2
√
3
(15
)
5. Parameter
s
Design
for
Para
llel Operation of Inverters
Many rea
s
on
s are
why inverters ne
ede
d to oper
ate i
n
parall
e
l. On
e of them is becau
se
of the limited availability of high
current
power el
ectronic devi
c
es. Another one is that parall
el-
operated inve
rters are able
to prov
ide
system redun
d
ancy an
d hig
h
relia
bility neede
d by criti
c
al
cu
stome
r
s.
More
over, the parall
e
l op
eration of in
v
e
rt
er
s al
so e
a
se
s t
he dif
f
i
cult
ie
s in t
hermal
manag
eme
n
t and de
sig
n
for high
-po
w
e
r
inverters.
The ba
si
c po
int for inverte
r
s o
p
e
r
ated i
n
parallel i
s
that ho
w to share th
e loa
d
amon
g
them. Thi
s
p
r
oble
m
can
be
solved
b
y
usin
g the
droo
p
cont
rol
whi
c
h i
s
wi
dely u
s
ed; t
he
advantag
e of
this m
e
thod
is th
at no
e
x
ternal
m
e
ch
anism
is ne
e
ded
amon
g t
he inve
rters
to
achi
eve goo
d
shari
ng.
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310
Figure 6 sh
ows two inverters ope
rat
ed in
parall
e
l [22, 23].
In which the
output
impeda
nce is inductively (
X≫R
).
11
X
11
1
SP
j
Q
22
X
1
I
2
I
11
E
22
E
0
o
V
22
2
SP
j
Q
Figure 6. Two
inverters ope
rated in pa
rall
el
Gene
rally th
e cu
rrent fol
l
owin
g to th
e l
oad
so
urce from the
inverter th
rough th
e
impeda
nce is given as:
∠
∠0
∠
(16
)
Then the
acti
ve and rea
c
tive powe
r
d
e
livered by the
inverters to t
he termi
nal a
r
e given
as:
(17
)
(18
)
W
h
er
e
δ
the powe
r
an
gle
For ca
se of the output impeda
nce is inductive which lead
θ
to
90
°
the active
and
rea
c
tive power are be
cam
e
as:
And
(19
)
And whe
n
sm
all
δ
And
(20
)
Gene
rally, th
e d
r
oop
cont
rol
strate
gy for
diffe
rent i
n
verters
ope
rated in
pa
ral
l
el with
output imped
ance
X≫R
tak
e
s
t
he form:
∗
(21
)
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IJEECS
ISSN:
2502-4
752
Powe
r Shari
n
g for Inve
rters Base
d on V
i
rtual Syn
c
h
r
o
nou
s Gen
e
rat
o
r Co
ntrol
(A
m
a
r Ham
z
a)
311
∗
(22
)
For shared l
oad po
we
r a
m
ong differe
nt capa
citi
e
s
of inverters
the output cu
rre
nts of
inverters sho
u
ld
be distri
buted
in pro
portion
al
to their
rating
s,
then the foll
owin
g eq
uation
s
sho
u
ld be
sat
i
sf
ied;
,
(23
)
The co
ndition
s to satisfie
d prop
ortio
nal sharin
g are, if
,
,
,
6. Simulation Resul
t
s an
d Analy
s
is
In this
s
e
c
t
ion, to verify the performance
of the
prop
ose
d
meth
od,
three
ph
ase
21-level
ca
scade
d H-bridg
e
invert
er ha
s be
en
use
d
. The
sy
stem is te
ste
d
unde
r different cap
a
citie
s
of
the inverte
r
s.
Table 2
sh
ows
the
syst
em pa
ramet
e
rs. A
s
a re
sult, the inv
e
rters b
ehav
e a
synchro
nou
s gene
rato
r. Since, it’s i
m
porta
nt fo
r large
scale
inverters to
sha
r
e th
e l
oad in
proportional t
o
their capacities to im
prove t
he
system reli
ability and r
edundancy, the real
and
rea
c
tive po
wer d
e
livered b
y
inverters
co
nne
cted i
n
p
a
r
allel ca
n
b
e
automatically sha
r
ed. Figu
res
7 to 9
sho
w
the outp
u
t p
o
we
r fo
r p
a
rallel inve
rters (S1
= 1MV
A
& S2
= 2
M
VA), load
p
o
we
r
sha
r
ing
and
three
pha
se
l
oad
cu
rre
nts
sha
r
ing
re
sp
e
c
tively. Figure 10 a
nd Fi
g
u
re
11 d
epi
ct the
output thre
e
pha
se curren
ts for pa
rallel
inverters 1M
VA and 2MV
A
. When the l
oad st
ep at 0
.
6 s
from 1.8M
W to 3MW the
system re
spo
n
ded very
fast,
and the in
creasi
ng loa
d
p
o
we
r shared
by
the inverters i
n
prop
ortio
nal
to their rating
s.
Figure 12 a
n
d
Figu
re 13
d
epict the i
n
ve
rter o
u
tput lin
e-to-li
ne an
d
pha
se voltag
es
whi
c
h
are
com
p
ri
se
21-level
and
their redu
ce
d or
d
e
r T
H
D. The me
asured outp
u
t voltage THD
was
1.24% for the
line voltage and 4.68% fo
r the pha
se voltage.
Table 2. Simulation pa
ram
e
ters
Parameters
Values
Parameters
Values
V
V
(rms
)
P
Q
P
Q
n
n
m
m
560 V
6.6 kV
1MW
2kVar
2MW
0.5kVar
21
0
41
0
6.6
10
3.3
10
H1,H2
K
R1& R2
L1& L2
C
P
f
f
V
ω
0.0005s,0.001
15
1
0
0.01&0.02
Ω
0.5&1mH
10 µF
2.8MW
8 kHz
50 Hz
5600V
314 rad/sec
Figure 7. Output active po
wer fo
r two p
a
rallel inv
e
rte
r
s (P
1 = 1M
W
,
P2 = 2MW)
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
-1.
5
-1
-0.
5
0
0.
5
1
1.
5
2
2.
5
3
x 1
0
6
Ti
m
e
(
s
)
O
u
t
p
u
t
P
o
w
er
(
W
)
P1
P2
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IJEECS
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312
Figure 8. Active powe
r
loa
d
sha
r
ing b
e
twee
n parallel
inverters (P1
= 1MW, P2 = 2MW)
Figure 9. Three-p
h
a
s
e loa
d
curre
n
t sha
r
ing bet
we
e
n
parall
e
l invert
ers
(P1 = 1M
W, P2 = 2M
W)
Figure 10. Th
ree ph
ase cu
rrents o
u
tput for inv
e
rte
r
(P
= 2M
W)
Figure 11. three pha
se
currents
outp
u
t for inv
e
rter
(P =
1MW)
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
0
0.
5
1
1.
5
2
2.
5
3
x 10
6
Ti
m
e
(
s
)
Lo
a
d
P
o
w
e
r
(
W
)
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
-40
0
-30
0
-20
0
-10
0
0
10
0
20
0
30
0
40
0
Ti
m
e
(
s
)
L
oad
C
u
r
r
e
n
t
s
(
A
)
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
-
3
000
-
2
000
-
1
000
0
1
000
2
000
3
000
Ti
m
e
(
s
)
O
u
t
p
u
t
C
u
r
ren
ts
(A
)
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
-
3
000
-
2
000
-
1
000
0
1
000
2
000
3
000
Ti
m
e
(
s
)
O
u
t
p
u
t
cu
rr
en
t
s
(
A
)
Evaluation Warning : The document was created with Spire.PDF for Python.
IJEECS
ISSN:
2502-4
752
Powe
r Shari
n
g for Inve
rters Base
d on V
i
rtual Syn
c
h
r
o
nou
s Gen
e
rat
o
r Co
ntrol
(A
m
a
r Ham
z
a)
313
(a)
(b)
Figure 12. ou
tput for 21-lev
e
l CHB inve
rter (a
) line
-
to-l
ine voltage (b
) THD
(a)
(b)
Figure 13. Ou
tput for 21-lev
e
l CHB inve
rter (a
) pha
se
voltage (b
) THD
7. Conclusio
n
This wo
rk prese
n
ted sha
r
e
load po
wer
of
di
fferent
cap
a
city of three
pha
se
s parallel
VSG based
on multilev
e
l inverte
r
. The ove
r
a
ll
perfo
rman
ce
wa
s evalua
ted the diffe
rent
cap
a
citie
s
a
n
d
different i
n
ertia
con
s
tant
. The propo
sed metho
d
was ve
rified th
roug
h si
mulat
i
on
results. To th
e best of pa
rallel po
wer
sh
aring to
give
excelle
nt re
spon
se
s wh
en
operate by u
s
ing
the improve
m
ent and a
c
curate droop
control of
medium/hig
h voltage po
we
r system. Thi
s
can
open n
e
w me
thods a
ppli
c
a
t
ions po
we
r sharin
g in the future.
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ces
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hang, Z
Ji
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N Li,
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n
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e-lev
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perati
on of a
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d
e
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l
e
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verter us
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n
".
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e
r Electronics
. 201
2; 5: 542-5
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[3]
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T
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rres, J Es
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n, J Rohten, a
n
d
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Inte
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le p
hoto
v
oltaic p
l
a
n
t
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g a multil
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nverter
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g
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ono
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". in IEEE 23r
d
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na
l Symp
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u
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20-
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QC Z
hong an
d
T
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t
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r in
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u
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e
r
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".
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E
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y of
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ree
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ase
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idg
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evel
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on”.
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E
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esi
an Jour
nal
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ngi
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015;
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1 ~
49
2.
0.
16
0.
1
7
0.
18
0.
19
0.
2
0.
21
0.
22
0.
2
3
-1
.
5
-1
-0
.
5
0
0.
5
1
1.
5
x 1
0
4
Ti
m
e
(
s
)
L
i
n
e
-t
o
-
L
i
n
e
V
o
l
t
a
g
e
(V
)
0
10
00
20
00
30
00
40
00
500
0
6
000
70
00
80
00
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
F
r
e
q
ue
nc
y
(
H
z
)
F
u
n
d
a
m
e
n
tal
(
5
0
H
z
)
= 89
45V
,
T
H
D
=
1.
42
%
M
a
g (
%
of
F
u
n
d
a
m
e
n
t
a
l
)
0.
16
0.
17
0.
18
0.
1
9
0.
2
0.
2
1
-
6
000
-
4
000
-
2
000
0
2
000
4
000
6
000
Ti
m
e
(
s
)
Ph
a
s
e
V
o
l
t
a
g
e
(
V
)
0
100
0
200
0
300
0
400
0
500
0
600
0
700
0
80
00
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
Fr
e
q
u
e
n
c
y
(
H
z
)
F
u
n
d
am
e
n
t
a
l
(
5
0
H
z
)
= 51
69V
,
T
H
D
=
4.
68%
M
a
g
(
%
o
f
F
unda
m
e
nt
a
l
)
Evaluation Warning : The document was created with Spire.PDF for Python.
ISSN: 25
02-4
752
IJEECS
Vol.
2, No. 2, May 2016 : 305 –
314
314
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rtual synchr
o
n
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ner
ator
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id
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licati
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nd
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