Inter
national
J
our
nal
of
P
o
wer
Electr
onics
and
Dri
v
e
System
(IJPEDS)
V
ol.
15,
No.
4,
December
2024,
pp.
2296
∼
2307
ISSN:
2088-8694,
DOI:
10.11591/ijpeds.v15.i4.pp2296-2307
❒
2296
Switching
state
v
ector
selection
f
or
impr
o
v
ed
THD
perf
ormance
in
multile
v
el
curr
ent
fed
in
v
erters
G.
Pr
em
K
umar
Reddy,
Bhuk
ya
Mangu
Department
of
Electrical
Engineering,
Osmania
Uni
v
ersity
,
Hyderabad,
India
Article
Inf
o
Article
history:
Recei
v
ed
Jan
3,
2024
Re
vised
Mar
26,
2024
Accepted
Apr
18,
2024
K
eyw
ords:
Multile
v
el
current-fed
in
v
erters
Space
v
ector
modulation
Switching
losses
Switching
state
v
ectors
T
otal
harmonic
distortion
ABSTRA
CT
This
paper
aims
to
e
xplore
synthesis
methods
of
three
-phase
multi-
le
v
el
cur
-
rent
w
a
v
eforms
by
utilizing
a
conguration
of
n
parallel
operating
three-phase,
three-le
v
el
current-fed
in
v
erters
(CFIs).
It
points
out
an
issue
where
dif
ferences
in
the
DC-link
current
between
in
v
erters
cause
a
dist
orted
space
v
ector
diagram
and
decreased
switching
state
redundanc
y
,
this
leads
to
generation
of
lo
w
fre-
quenc
y
harmonics
in
the
output
current
and
increased
total
harmonic
distortion
(THD).
The
research
suggests
a
method
that
chooses
the
best
switching
state
v
ectors
by
considering
their
closeness
to
a
reference
current
space
v
ector
.
This
approach
aims
to
decrease
switching
losses
and
lo
w-frequenc
y
harmonic
con-
tent.
This
method
impro
v
es
the
quality
of
the
w
a
v
eform
and
the
ef
cienc
y
of
the
in
v
erter
by
closely
matching
the
switching
operations
with
the
intended
cur
-
rent
path.
An
analytical
model
is
created
to
in
v
estig
ate
ho
w
changes
in
DC-link
current
impact
in
v
erter
performance.
Simulations
and
actual
tests
conrm
the
ef-cac
y
of
the
proposed
strate
gy
in
enhancing
total
harmonic
distortion
(THD)
and
w
a
v
eform
accurac
y
.
The
results
pro
vide
v
aluable
information
on
impro
ving
multile
v
el
in
v
erter
designs
to
enhance
po
wer
quality
and
operational
ef
cienc
y
,
indicating
potential
areas
for
further
research
in
po
wer
electronics.
This
is
an
open
access
article
under
the
CC
BY
-SA
license
.
Corresponding
A
uthor:
G.
Prem
K
umar
Reddy
Department
of
Electrical
Engineering,
Osmania
Uni
v
ersity
Amberpet,
Hyderabad,
T
elang
ana,
India
Email:
gpkreddy2009@gmail.com
1.
INTR
ODUCTION
In
the
eld
of
po
wer
electronics,
there
is
considerable
interest
in
the
design
and
optimization
of
current-fed
in
v
erters
(CFIs)
for
ef
cient
ener
gy
con
v
ers
ion,
especially
in
applications
rel
ated
to
rene
w
able
ener
gy
sources.
This
study
aims
to
in
v
estig
ate
adv
anced
techniques
in
order
to
enhance
the
ef
cienc
y
of
three-
le
v
el
con
v
erters
for
interf
ace
circuits
by
remo
ving
the
requirement
for
current
sharing
inductors
and
trans-
formers.
T
o
achie
v
e
this
goal,
each
CFI
unit
is
equipped
with
a
separate
direct
current
source,
enabling
parallel
connection
on
the
alternating
current
side.
The
magnitudes
of
the
DC
currents
[1]–[4]
from
the
separate
sources
are
consistent.
Y
et,
a
signicant
dif
culty
arises
in
ensuring
consistent
DC-link
currents
among
CFI
units,
par
ticularly
when
the
y
are
po
wered
by
intrinsically
uctuating
re
ne
w
able
ener
gy
sources
lik
e
photo
v
oltaics
or
fuel
cells.
The
study
sho
ws
that
dif
ferences
in
DC-link
currents
cause
distortions
in
space
v
ector
diagram
and
result
in
a
loss
of
switching
state
redundanc
y
.
This
phenomenon
ne
g
ati
v
ely
impacts
the
output
current
by
introducing
lo
w-frequenc
y
harmonic
[5]
components,
which
leads
to
a
de
gradation
i
n
the
system
’
s
total
harm
o
ni
c
distortion
(THD)
and
compromises
po
wer
quality
.
J
ournal
homepage:
http://ijpeds.iaescor
e
.com
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
❒
2297
T
o
address
this
issue,
the
paper
proposes
a
ne
w
method
that
focuses
on
the
strate
gic
selection
and
time-sharing
of
switching
state
v
ectors
via
space
v
ector
modulation
techniques
[6]–[11].
This
technique
gen-
erates
a
reference
current
space
v
ector
by
utilizing
the
closest
switching
state
v
ectors
[12]–[18]
in
order
to
optimize
switching
operations
and
reduce
losses.
Although
it
reduces
switching
losses
and
harmonic
distor
-
tion,
this
technique
unintentionally
causes
lo
w-frequenc
y
pulsations
in
the
DC-link
v
oltage
of
each
in
v
erter
,
with
the
v
oltage
v
ariation
precise
ly
proportional
to
the
imbalance
in
DC-link
current.
The
study
in
v
estig
ates
the
dif
culties
of
de
v
eloping
a
DC-DC
con
v
erter
that
can
adjust
to
a
lar
ge
range
of
output
v
oltage
uctuations
[19]–[28],this
has
an
impact
on
the
DC-link
v
oltage’
s
stability
.
Line
v
oltage
coordinate
transformation
is
used
in
a
ne
w
space
v
ector
pulse
density
modulation
tech-
nique
that
is
presented
[6].
F
or
pulse
density
modulation,
it
emplo
ys
three
rst-order
sigma
delta
modulators
(SDM),
which
simplies
computation
by
quantifying
the
reference
v
ector
and
producing
output
switching
v
ec-
tors
without
sector
identication.
The
propose
d
space
v
ector
quantizer
(SVQ)
constructs
V
oronoi
areas
with
in
v
erter
switching
v
ectors,
using
a
normalized
reference
v
ector
to
designate
re
gions
and
quantifying
SDM’
s
instantaneous
error
v
ector
(IEV).
This
method
a
v
oids
the
dif
cult
computations
related
with
sector
identica-
tion,
sub-he
xagonal
mapping,
and
lookup
table
usage,
making
time
calculations
easier
.
Furthermore,
in
[29],
When
analyzing
switching
loss
and
total
harmonic
distortion
(THD)
in
diode-clamped
three
phase
multile
v
el
in
v
erters
across
v
arious
resisti
v
e
loads,
space
v
ector
pulse
width
modulation
(SVPWM)
is
utilized
to
impro
v
e.
The
multile
v
el
DC-link
in
v
erter
(MLDCLI)
[13]
acts
as
a
vital
link
between
solar
systems
and
house-
hold
A
C
po
wer
supplies.
This
paper
describes
an
MLDCLI
arrangement
that
uses
three
asymmetric
DC
sources
to
pro
vide
a
15-le
v
el
output
v
oltage.
Control
is
implemented
using
the
simplied
g
ate
pulse
generation
(SGPG)
approach.
In
addition,
a
modied
nearest
le
v
el
modulation
(mNLM)
method
is
used
to
reduce
total
harmonic
distortion
(THD)
in
response
to
v
ariations
in
the
DC
v
oltage
source
ratio.
The
mNLM
algorithm
adjusts
gradi-
ent
angles
dynamically
to
optimize
THD
as
the
v
oltage
in
one
of
the
DC
sources
v
aries.
Continuous
use
of
this
technique
based
on
input
v
oltage
v
alues
impro
v
es
THD
performance
in
the
output
v
oltage,
especially
when
the
DC
v
oltage
sources
v
ary
.
Shang
and
Li
[1]
proposed
a
ne
w
approach,
a
decreased
common
mode
v
oltage
(CMV)
space
v
ector
modulation
(SVM),
that
is
specically
de
v
eloped
for
current
source
con
v
erters.
Unlik
e
typical
nonzero-state
reduced
common
mode
v
oltage
(RCMV)
SVMs,
this
strate
gy
pro
vides
signicant
CMV
reduction
without
ignoring
zero-state
v
ectors,
resulting
in
grea
ter
performance
abo
v
e
standard
algorithms.
This
RCMV
SVM
approach
also
applies
to
the
con
v
erter
side
interf
ace
(CSI),
where
zero-state
v
ector
selection
is
guided
by
motor
stator
v
oltages
rather
than
grid
v
oltages
as
in
the
con
v
erter
side
rectier
(CSR)
application.
When
com-
pared
to
e
xisting
approaches,
the
proposed
method
considerably
reduces
CMV
peak
v
alue.
Furthermore,
when
compared
to
the
standard
three-se
gment
SVM,
the
suggested
RCMV
SVM
sho
ws
lo
wer
CMV
and
impro
v
ed
harmonic
performance.
Using
a
space
v
ector
modulation
(SVM)
approach
on
a
v
e-le
v
el
current
source
in
v
erter
based
on
interphase
transformers
w
as
recommended
by
Dup
c
zak
et
al.
[4].
A
ne
w
SVM
technique
has
been
presented
that
lo
wers
the
requirements
for
the
used
passi
v
e
components,
such
as
the
coupled
magnetic
components,
while
enabling
the
interphase
transformer
-based
v
e-le
v
el
CSI
to
pro
vide
high-quality
output
v
oltages.
As
a
result,
the
v
olume
of
the
passi
v
e
components
might
be
decreased,
resulting
in
higher
po
wer
density
le
v
els
and
impro
v
ed
in
v
erter
performance.
A
quick
comparison
with
a
traditional
3L-CSI
demonstrates
that
the
5L-CSI
using
the
suggested
SVM
can
reduce
the
requirements
for
passi
v
e
components.
Distortion
of
the
space
v
ector
diagram
complicates
precisely
recognizing
the
sector
of
the
re
ference
space
v
ector
in
the
5-le
v
el
CFI
system,
which
is
crucial
for
optimal
performance
and
ef
cienc
y
,
concludes
with
a
thorough
assessm
ent
of
the
5-le
v
el
CFI’
s
performance,
using
MA
TLAB
simulations
to
conrm
the
ef
cac
y
of
the
suggested
solutions
in
reducing
THD
and
impro
ving
system
ef
cienc
y
and
reliability
.
This
study
mak
es
a
substantial
contrib
ution
to
the
po
wer
electronics
profes
sion
by
of
fering
essential
insights
and
approaches
for
optimizing
CFI
designs
to
enhance
po
wer
quality
and
ef
cienc
y
in
rene
w
able
ener
gy
applications.
The
primary
objecti
v
es
of
this
study
are:
−
De
v
elop
a
conguration
for
three-le
v
el
current-fed
in
v
erters
(CFIs)
that
remo
v
es
the
necessity
for
cur
-
rent
sharing
inductors
and
transformers
by
em
plo
ying
separate
DC
current
s
ources
for
each
CFI
unit,
enabling
parallel
connections
on
the
ac
side.
−
T
o
address
the
issue
of
une
v
en
DC-link
currents
in
CFI
units,
particularly
when
coming
from
v
ariable
rene
w
able
ener
gy
sources
such
as
photo
v
oltaics
or
fuel
cells,
which
may
cause
distortion
in
the
multile
v
el
space
v
ector
diagram
and
a
loss
of
switching
state
redundanc
y
.
Switc
hing
state
vector
selection
for
impr
o
ved
THD
performance
in
multile
vel
...
(G.
Pr
em
K
umar
Reddy)
Evaluation Warning : The document was created with Spire.PDF for Python.
2298
❒
ISSN:
2088-8694
−
By
addressing
the
introducti
on
of
lo
w-frequenc
y
harmonic
components
produced
by
the
DC-link
current
inequality
,
reduce
total
harmonic
distortion
(THD).
−
De
v
elop
and
conrm
an
adv
anced
switching
strate
gy
that
includes
choosing
and
time-sharing
switching
state
v
ectors
using
space
v
ector
modulation
techniques.
By
generating
a
reference
current
space
v
ector
from
the
closest
switching
state
v
ectors,
this
aims
to
lo
wer
switching
losses
and
impro
v
e
w
a
v
eform
quality
.
−
Design
a
v
ersatile
DC-DC
con
v
erter
that
can
adjust
to
wide
v
ariations
in
output
v
oltage
to
maintain
sta-
bility
of
the
DC-link
v
oltage,
allo
wing
in
v
erters
to
run
at
consistent
switching
rates
e
v
en
with
uctuations
in
DC-link
current.
−
Ev
aluate
a
5-le
v
el
CFI
system’
s
performance
using
sophisticated
simulation
tools
lik
e
MA
TLAB
to
con-
rm
that
suggested
solutions
are
successful
in
lo
wering
THD,
minimizing
switching
losses,
and
enhancing
o
v
erall
system
reliability
and
ef
cienc
y
in
rene
w
able
ener
gy
applications.
2.
PR
OPOSED
METHODOLOGY
The
direct
current
balance
optimization
between
tw
o
current
source
in
v
erters
(CSIs)
using
space
v
ector
modulation
is
closely
e
xamined
in
this
research
methodology
.
This
method
entails
a
thorough
e
xamination
of
the
present
space-v
ectors
within
the
dual-CSI
system
that
correl
ate
to
v
arious
switching
states.
In
Figure
1
the
four
numbers
that
indicate
these
switching
states
are
named
using
a
method
where
the
rst
tw
o
digits
stand
for
the
on-state
switches
in
in
v
erter
-1,
and
the
nal
tw
o
digits
stand
for
those
in
in
v
erter
-2.
Figure
1.
Switching
states
of
v
e-le
v
el
SVPWM
The
process
comprises
di
viding
the
v
ectors
into
four
cate
gories,
as
sho
wn
in
Figure
2
-
lar
ge,
medium,
small,
and
zero
v
ectors.
This
classication
is
the
foundation
for
the
de
v
elopment
of
a
no
v
el
switching
scheme
intended
to
enhance
the
tw
o
in
v
erters’
DC
current
balance.
Through
the
reduction
of
ener
gy
losses
and
en-
hancement
of
system
ef
cienc
y
,
this
technique
of
fers
enhanced
operational
performance.
The
ne
w
switching
pattern
is
based
on
specic
design
ideas
that
are
e
xpressed
through
important
directi
v
es.
−
Prohibition
of
small
and
zero
current
v
ectors:
The
approach
clearly
does
not
allo
w
the
use
of
small
and
zero
current
v
ectors.
This
e
xclusion
is
based
on
the
v
ectors
causing
a
’
shoot-through’
circumstance,
where
tw
o
de
vices
in
the
same
le
g
are
acti
v
ated
simultaneously
.
This
scenario
increases
the
switching
frequenc
y
and
causes
substantial
ener
gy
losses,
which
ultimately
reduces
system
ef
cienc
y
.
−
Exclusion
of
lar
ge
v
ectors:
Lar
ge
v
ectors
are
not
suited
for
DC
current
balancing
management.
This
is
due
to
the
operating
characteristic
of
acti
v
ating
the
identical
de
vices
in
both
in
v
erters,
which
does
not
modify
the
DC
current
in
the
in
v
erters
and
so
does
not
achie
v
e
current
balancing.
−
Using
medium
v
ectors
for
DC
current
balance
control:
The
core
of
the
suggested
approach
relies
on
the
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
15,
No.
4,
December
2024:
2296–2307
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
❒
2299
strate
gic
use
of
medium
v
ectors.
The
v
ectors’
inherent
redundanc
y
in
switching
states
mak
es
them
ideal
for
enabling
direct
current
balance
control.
Separate
control
of
the
DC
currents
in
the
tw
o
in
v
erters
is
made
possible
by
utilizing
the
redundant
switching
states
connected
to
the
medium
v
ectors,
which
permits
the
proper
distrib
ution
of
DC
current
balance.
Figure
2.
Fi
v
e-le
v
el
SVPWM
2.1.
Equal
DC-link
curr
ents
in
a
v
e-le
v
el
curr
ent-fed
in
v
erter
The
creation
of
switching
states
and
their
use
in
b
uilding
a
v
e-le
v
el
space
v
ector
diagram
necessitates
a
thorough
understanding
of
po
wer
electronics
and
space
v
ector
modul
ation
(SVM)
techniques.
Specically
,
the
switching
states
(
S
1
,
S
′
1
),
(
S
2
,
S
′
2
),
and
(
S
3
,
S
′
3
)
are
designated
as
i
0
a
,
i
0
b
,
and
i
0
c
.
These
notations
represent
the
zero-switching
state
v
ect
or
,
indicated
as
i
0
,
which
serv
es
as
the
foundation
for
the
v
e-le
v
el
space
v
ector
diagram
sho
wn
in
Figure
2.
This
diagram
is
the
result
of
the
combination
and
e
xpansion
of
three-le
v
el
space
v
ector
diagrams,
demonstrating
a
sophisticated
modulat
ion
strate
gy
designed
specically
for
current
fed
in
v
erters
(CFIs).
The
v
e-le
v
el
space
v
ector
diagram
is
or
g
anized
into
six
main
sectors,
S
I
through
S
V
I
,
each
of
which
has
four
minor
sectors,
S
1
-
S
4
.
This
se
gmentation
enables
a
detailed
control
strate
gy
,
which
allo
ws
for
e
xact
adjustment
and
enhancement
of
the
in
v
erter’
s
performance.
This
se
gmentation
permits
a
sophisticated
control
strate
gy
,
allo
wing
for
precise
adjustment
and
impro
v
ement
of
the
in
v
erter’
s
performance.
This
system
contains
49
repeating
switching
state
v
ectors,
yielding
19
distinct
state
v
ector
places.
T
able
1
or
g
anizes
the
locations
and
their
corresponding
switching
state
v
ectors.
The
modulation
system
uses
redundanc
y
in
switching
states
to
gi
v
e
e
xibility
and
rob
ustness
when
operating
the
in
v
erter
.
A
specic
switching
state
sequence
can
be
produced
by
repeatedly
v
arying
t
he
switching
states
in
three-le
v
el
CFI
units.
T
able
1
lists
the
combinations
that
could
be
used
to
accomplish
the
intended
switching
states.
Change
the
state
v
ector
positions
I
6
,
I
1
,
and
I
0
in
minor
sector
S
1
of
major
sector
S
I
.
T
o
reach
state
v
ector
position
I
6
,
use
one
of
the
redundant
switching
state
v
ectors
I
6
−
1
,
I
6
−
2
,
I
6
−
3
.
The
switching
state
v
ector
I
6
−
1
can
be
obtained
using
an
y
of
the
combinations
(
i
6
,
i
0
a
),
(
i
6
,
i
0
b
),
or
(
i
6
,
i
0
c
).
This
demonstrates
the
systematic
use
of
redundanc
y
to
achie
v
e
accurate
control
o
v
er
the
in
v
erter’
s
output.
A
reference
space
v
ector
crucial
for
the
modulation
method
can
be
created
by
utilising
an
y
of
the
surplus
switching
states
in
a
specic
sector
.
Space
v
ector
modulation
demonstrates
v
ersatility
and
ef
cienc
y
in
optimizing
the
operational
dynamics
of
CFIs,
leading
to
higher
po
wer
quality
,
reduced
harmonic
distortion,
and
impro
v
ed
system
performance.
Switc
hing
state
vector
selection
for
impr
o
ved
THD
performance
in
multile
vel
...
(G.
Pr
em
K
umar
Reddy)
Evaluation Warning : The document was created with Spire.PDF for Python.
2300
❒
ISSN:
2088-8694
T
able
1.
Classication
of
current
space
v
ectors
T
ype
V
ectors
Zero
v
ectors
52;14,
36;14,
14;36,
36;52,
52;36,
14;52,
14;14,
36;36,
52;52,
12;54,
54;12,
32;56,
56;32,
34;16,
16;34
Small
v
ectors
56;36,
36;56,
56;52,
52;56,
54;16,
16;54,
16;14,
14;16,
16;36,
36;16,
56;12,
12;56,
32;36,
36;32,
32;52,
52;32,
12;34,
34;12,
54;14,
14;54,
54;52,
52;54,
34;56,
56;34
Medium
v
ectors
12;16,
16;12,
32;12,
12;32,
32;34,
34;32,
34;54,
54;34,
54;56,
56;54,
16;56,
56;16
Lar
ge
v
ectors
54;54,56;56,
16;16,
12;12,
32;32,
34;34
2.2.
Calculation
of
duty
cycles
by
pr
ojections
Multi-le
v
el
current
fed
in
v
erters
(MCFI)
that
use
space
v
ector
modulation
(SVM)
create
a
des
ired
reference
current
v
ector
,
˙
i
∗
,
by
carefully
sampling
the
static
current
v
ectors
of
the
in
v
erters
during
a
designated
switching
interv
al.
The
procedure
relies
on
the
in
v
erter
maintaining
a
specic
switching
state
for
a
suf
cient
duration
to
produce
the
desired
v
ector
,
which
signies
a
particular
direction
and
amount
of
current
that
the
in
v
erter
has
t
o
pro
vide.
This
modulation
strate
gy
is
primarily
concerned
with
computing
duty
c
ycles
for
each
of
the
MCFI’
s
current
v
ectors.
Duty
c
ycles
are
critical
in
determining
ho
w
long
each
v
ector
is
acti
v
e
during
a
switching
period,
which
impacts
the
o
v
erall
shape
and
qualities
of
the
output
w
a
v
eform.
The
current
reference
angle
(
θ
)
and
modulation
inde
x
(Mi)
related
to
related
to
˙
i
∗
are
crucial
f
actors
in
this
computation.
The
modulation
inde
x
measures
the
ratio
of
the
reference
v
ector’
s
magnitude
to
the
maximum
achie
v
able
v
ector
magnitude
based
on
the
in
v
erter’
s
setup.
The
reference
angle
θ
indicates
the
direction
of
˙
i
∗
in
the
α
−
β
plane,
guiding
the
modulation
process.
The
methodology
pro
vided
in
literature
[25]
describes
ho
w
to
compute
duty
c
ycles
for
neutral-point
clamped
Multi-Le
v
el
V
oltage
Source
In
v
erters
(MVSI).
This
method
focuses
on
strate
gically
determining
spe-
cic
projections
of
the
reference
v
ector
onto
the
α
−
β
plane.
These
projections
are
essential
for
simplifying
the
SVM
process
by
decomposing
the
intricate
v
ector
manipulation
into
simpler
geometric
and
algebraic
operations.
Figure
3
demonstrates
a
situation
in
which
three
v
ectors,
−
→
i
a
,
−
→
i
b
,
and
−
→
i
c
,
form
a
triangle
area
in
the
α
−
β
plane.
The
goal
is
to
place
the
reference
v
ector
˙
i
∗
(see
(1)
and
(2))
inside
the
triangle
using
its
v
ertices
as
the
basic
v
ectors
for
modulation.
The
met
ho
d
pro
vides
insight
into
achie
ving
the
reference
v
ector’
s
projection
onto
the
plane
by
analysing
the
contained
re
gion
dened
by
the
v
ertices
and
combining
fundamental
v
ectors.
The
triangle’
s
sides
and
the
area
it
encompasses
with
the
reference
v
ector
serv
e
as
a
geometric
foundation
for
determining
the
duty
c
ycles
of
the
v
ectors,
allo
wing
for
the
accurate
generation
of
˙
i
∗
by
combining
the
in
v
erter’
s
switching
operations.
i
∗
=
−
→
i
c
+
−
→
p
a
+
−
→
p
b
(1)
i
∗
=
|
−
→
p
a
|
l
a
−
→
i
a
+
|
−
→
p
b
|
l
b
−
→
i
b
+
(1
−
|
−
→
p
a
|
l
a
−
|
−
→
p
b
|
l
b
)
−
→
i
c
(2)
The
modules
of
−
→
p
a
and
−
→
p
b
are
the
projections
of
i
∗
on
the
triangle
sides
and
l
a
,
l
b
are
the
distances
between
the
adjacent
v
ectors.
The
duty
c
ycles
for
generic
v
ectors
are
gi
v
en
in
(3).
d
′
a
=
|
−
→
p
a
|
l
a
d
′
b
=
|
−
→
p
b
|
l
b
d
′
c
=
(1
−
d
′
a
−
d
′
b
)
(3)
The
normalized
reference
v
ector
i
∗
is
rotated
to
the
rst
se
xtant.
No
w
the
angle
of
i
∗
is
no
w
represented
by
θ
′
,
which
is
dened
as
gi
v
en
in
(4).
θ
′
=
θ
−
(
N
s
−
1)
π
3
(4)
Where,
N
s
∈
1
,
2
...
6
,
using
the
edges
that
dene
the
se
xtant
in
Figure
3,
tw
o
ax
es
where
the
projections
of
the
reference
v
ector
li
e
are
dened
with
angles
equal
to
±
π
6
.
The
v
alues
of
the
projections
are
determined
using
(5)
and
(6).
|
−
→
p
a
|
=
M
i
[
√
3
cos(
θ
′
)
−
sin(
θ
′
)]
(5)
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
15,
No.
4,
December
2024:
2296–2307
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
❒
2301
|
−
→
p
b
|
=
M
i
[
√
3
cos(
θ
′
)
+
sin(
θ
′
)]
(6)
Where,
the
modulation
inde
x
ranges
from
0
to
1
for
the
MCSI
linear
modulation
range.
Each
se
xtant
of
the
v
ector
plane
can
be
di
vided
into
four
smaller
re
gions;
ne
v
ertheless,
each
side
of
the
triangles
has
a
length
l
T
=
1
√
3
.
This
represents
the
normalized
distance
between
tw
o
adjacent
v
ectors.
Using
this
distance,
as
well
as
(5)
and
(6)
in
(3),
the
v
e-le
v
el
CSI
generic
duty
c
ycles
are
(7)
and
(8).
d
′
a
=
M
i
[cos(
θ
′
)
−
√
3
sin(
θ
′
)]
(7)
d
′
b
=
M
i
[cos(
θ
′
)
+
√
3
sin(
θ
′
)]
(8)
Figure
3.
Projections
and
composition
of
the
reference
v
ector
from
three
arbitrary
and
projections
of
current
reference
v
ector
in
the
±
π
6
axis
at
rst
sector
3.
RESUL
TS
AND
DISCUSSION
3.1.
Conguration
and
simulation
of
the
con
v
erter
The
in
v
erter
is
designed
to
transform
direct
current
(DC)
into
a
v
e-le
v
el
alternating
current
(A
C)
output,
allo
wing
for
the
generation
of
v
e
unique
v
oltage
le
v
els
in
the
output
w
a
v
eform.
Ha
ving
ne
granularity
in
output
le
v
els
enables
a
more
accurate
representation
of
a
sinusoidal
w
a
v
eform,
which
decreases
harmonic
distortion
and
enhances
po
wer
quality
.
Each
phase
of
the
in
v
erter
typically
consists
of
tw
o
con
v
erters
connected
either
in
series
or
parallel,
depending
on
the
design.
It
is
essential
to
ha
v
e
this
setup
in
order
to
achie
v
e
the
v
e-le
v
el
output,
as
each
con
v
erter
plays
a
role
in
increasing
the
v
oltage
le
v
els
by
sequential
switching.
IGBTs
are
selected
for
thei
r
high
ef
cienc
y
and
rapid
switching
abilities,
which
are
crucial
for
han-
dling
high
currents
(100
A)
and
the
precise
control
needed
in
multi-le
v
el
in
v
erters.
Their
durability
in
managing
high
po
wer
le
v
els
and
their
ability
to
be
controlled
mak
e
them
perfect
for
this
specic
use.
Each
con
v
erter
consists
of
six
IGBT
switches
or
g
anised
to
enable
the
production
of
a
v
e-le
v
el
output.
The
positioning
of
these
switches
is
crucial
for
the
in
v
erter
to
control
the
DC
current
and
produce
the
intended
A
C
w
a
v
eform.
The
switches
are
probably
arranged
in
either
a
full-bridge
or
half-bridge
setup,
where
each
le
g
of
the
bridge
plays
a
role
in
determining
the
nal
output
v
oltage
le
v
els.
The
in
v
erter’
s
control
approach
probably
use
PWM
methods
to
control
the
IGBT
switches’
opening
and
closing.
This
technique
enables
accurate
v
oltage
le
v
el
adjustments
by
re
gulating
the
duration
(width)
of
the
pulses
directed
to
each
switch.
Space
v
ector
modulation
(SVM)
can
be
used
t
o
optimise
the
switching
pattern
for
a
v
e-le
v
el
in
v
erter
.
This
sophisticated
modulation
method
determines
the
most
ef
cient
switching
states
needed
to
pro
vide
the
v
oltage
v
ector
closest
to
the
des
ired
reference,
reducing
switching
losses
and
harmonics.
The
Simulink
model
sho
wn
in
Figure
4
demonstrates
the
implementation
of
control
methods
by
inte
grating
IGBT
models,
control
logic
for
PWM
or
SVM,
and
the
system’
s
setup.
The
diagram
visually
represents
ho
w
the
in
v
erter
operates
by
sho
wing
the
current
o
w
through
the
switches
and
the
modulation
mechanism
.
The
simulation
aims
to
conrm
the
in
v
erter’
s
capacity
to
generate
a
v
e-le
v
el
A
C
output
from
a
100
A
DC
current
source.
This
includes
analysing
the
w
a
v
eform
quality
,
quantifying
harmonic
distortion,
and
e
xamining
the
ef
cienc
y
of
the
in
v
erter
.
Switching
strate
gy
optimisation
in
v
olv
es
using
simulation
to
attain
peak
performance
in
ef
cienc
y
,
reduced
harmonic
distortion,
and
st
ability
across
dif
ferent
load
circumstances.
The
parameters
used
for
simulation
is
gi
v
e
in
T
able
2.
Switc
hing
state
vector
selection
for
impr
o
ved
THD
performance
in
multile
vel
...
(G.
Pr
em
K
umar
Reddy)
Evaluation Warning : The document was created with Spire.PDF for Python.
2302
❒
ISSN:
2088-8694
Figure
4.
MA
TLAB
simulink
model
diagram
T
able
2.
Classication
of
current
space
v
ectors
P
arameter
V
al
ue
Simulink
time
setup
1e-6
Inductor
lter
Lf
1.1258
mH
Capacitor
lter
Cf
10e-6
Po
wer
111
KW
Sampling
frequenc
y(fs)
5
KHZ
Max
phase
v
oltage
340
V
Modulation
inde
x
0.866
The
DC-link
v
oltage
in
a
po
wer
con
v
ersion
system
sho
ws
harmonic
distortion
with
a
ripple
at
a
fre-
quenc
y
of
300
Hz,
serving
as
a
connecti
on
between
the
input
po
wer
source
and
the
in
v
erter
.
Ripple
is
an
oscillation
that
is
not
desired
and
is
added
on
top
of
the
DC
v
oltage.
It
can
cause
inef
ciencies,
higher
heat
production,
and
may
interfere
with
the
functioning
of
the
load
or
the
po
wer
con
v
ersion
system.
T
o
remo
v
e
the
300
Hz
harmonic
component,
the
proposed
solution
is
to
install
an
LC-lter
on
the
DC
side
of
the
link.
An
LC-lter
is
compris
ed
of
an
inductor
(L)
and
a
capacitor
(C)
link
ed
either
in
series
or
parallel,
with
the
purpose
of
functioni
ng
as
a
lo
w-pass
lter
.
This
lter
ef
ciently
reduces
high-frequenc
y
elements,
permitting
just
the
intended
DC
component
and
lo
w-frequenc
y
changes
to
go
through.
The
inductor
slo
ws
do
wn
quick
changes
in
current,
while
the
capacitor
creates
a
channel
with
lo
w
impedance
for
the
ripple
frequenc
y
,
which
helps
stabilise
the
DC-link
v
oltage
by
reducing
oscillations.
The
mean
v
alue
of
the
DC-link
v
oltage
(VDC)
is
around
555
V
as
sho
wn
in
Figure
5.
This
v
alue
is
important
because
it
esta
blishes
a
reference
point
for
the
operating
v
oltage
le
v
el
in
the
system,
which
can
be
used
to
e
v
aluate
the
performance
of
the
LC-lter
in
reducing
ripple.
The
consistent
a
v
erage
v
oltage
v
alue
observ
ed
at
v
arious
points
in
the
DC-link
suggests
that
the
ripple
frequenc
y
harmonic
component
has
minimal
impact
on
the
a
v
erage
v
oltage.
The
LC-lter
ef
fecti
v
ely
sta
b
i
lises
the
v
oltage
throughout
the
system.
The
graphs
in
Figure
6
sho
wns
the
output
phase-a
current
of
in
v
erters
1
and
2.
The
top
w
a
v
eform
ha
v
e
more
consistent
pulse
widths
across
the
c
ycle,
whereas
the
bottom
w
a
v
eform
sho
ws
slightly
more
v
ariation
in
the
width
of
some
pulses.
This
v
ariation
can
af
fect
the
harmonic
content
and
the
qualit
y
of
the
output
w
a
v
eform.
Both
w
a
v
eforms
oscillate
between
similar
amplitude
le
v
els,
suggesting
that
the
current
magnitudes
are
approximately
the
same.
The
F
FT
windo
w
and
THD
analysis
of
output
phase
current
of
con
v
erter
-1
are
represented
in
Figures
7
and
8
respecti
v
ely
.
Due
to
the
square
nature
of
the
w
a
v
eform
(Figure
7),
it
is
e
xpected
to
contain
a
series
of
odd
harmonics
in
its
frequenc
y
spectrum.
This
means
that
the
FFT
analysis
will
sho
w
signi
cant
fre-
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
15,
No.
4,
December
2024:
2296–2307
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
❒
2303
quenc
y
components
at
o
dd
multiples
of
the
fundamental
frequenc
y
.
An
LC
lter
on
the
DC
side,
as
mentioned
earlier
,
could
smooth
out
the
ripple
to
protect
sensiti
v
e
loads
and
reduce
electromagnetic
interference
(EMI).
A
high
peak-to-RMS
current
ratio
indicate
a
w
a
v
eform
with
signicant
harmonic
content,
as
suggested
by
the
FFT
analysis.
Figure
9
sho
ws
the
Fi
v
e-le
v
el
output
currents
of
combined
control
of
in
v
erters
at
fundamental
frequenc
y
(50
Hz).
Fi
v
e
le
v
el
output
phase
currents
are
I
a
0
=
I
b
0
=
I
c
0
=
210
.
9
A
.
The
FFT
windo
w
and
THD
analysis
of
output
phase
curre
n
t
of
con
v
erter
-2
are
represented
in
Figures
10
and
11
respecti
v
ely
.
The
phase
v
oltages
and
phase
currents
are
at
the
grid
and
grid
phase
v
oltage
set
to
240
V
rms.
The
THD
analysis
of
con
v
erter
-2’
s
output
phase
current
in
Figure
12
sho
ws
a
signicant
harmonic
distortion
with
a
THD
of
12.39%,
primarily
concentrated
belo
w
1000
Hz.
The
fundamental
frequenc
y
is
50
Hz
with
notable
harmonic
peaks
reaching
up
to
16%
of
the
fundamental’
s
magnitude.
Figure
5.
Input
DC
link
v
oltage
Figure
6.
Output
phase-a
current
of
in
v
erters
1
and
2
Switc
hing
state
vector
selection
for
impr
o
ved
THD
performance
in
multile
vel
...
(G.
Pr
em
K
umar
Reddy)
Evaluation Warning : The document was created with Spire.PDF for Python.
2304
❒
ISSN:
2088-8694
Figure
7.
The
FFT
of
output
phase
current
of
con
v
erter
-1
Figure
8.
The
THD
analysis
of
output
phase
current
of
con
v
erter
-1
Figure
9.
Fi
v
e
le
v
el
output
current
vs
time
Int
J
Po
w
Elec
&
Dri
Syst,
V
ol.
15,
No.
4,
December
2024:
2296–2307
Evaluation Warning : The document was created with Spire.PDF for Python.
Int
J
Po
w
Elec
&
Dri
Syst
ISSN:
2088-8694
❒
2305
Figure
10.
Grid
v
oltage
(
V
ag
)
and
current
(
I
ag
)
vs
time
Figure
11.
The
FFT
of
output
phase
current
of
con
v
erter
-2
Figure
12.
The
THD
analysis
of
output
phase
current
of
con
v
erter
-2
Switc
hing
state
vector
selection
for
impr
o
ved
THD
performance
in
multile
vel
...
(G.
Pr
em
K
umar
Reddy)
Evaluation Warning : The document was created with Spire.PDF for Python.