Inter national J our nal of P o wer Electr onics and Dri v e System (IJPEDS) V ol. 17, No. 2, June 2026, pp. 1211 ∼ 1220 ISSN: 2088-8694, DOI: 10.11591/ijpeds.v17.i2.pp1211-1220 ❒ 1211 Dual-mode model pr edicti v e contr ol f or non-minimum phase boost con v erters J awhra El Hmidi 1 , Anass Mansouri 2 , Ali Ahaitouf 1 1 Laboratory of Science and Engineering Research, F aculty of Sciences and T echnology , Sidi Mohamed Ben Abdellah Uni v ersity , Fez, Morocco 2 Laboratory of Science and Engineering Research, School of Applied Sciences, Sidi Mohamed Ben Abdellah Uni v ersity , Fez, Morocco Article Inf o Article history: Recei v ed Jul 15, 2025 Re vised Apr 4, 2026 Accepted Apr 23, 2026 K eyw ords: Dual mode MPC FS-MPC HIL Non-minimum phase Real-time control Split cost function ABSTRA CT This paper aims to de v elop an ef cient nite-set model predicti v e control (FS-MPC) strate gy for DC–DC boost con v erters to impro v e v oltage re gulation while reducing computational comple xity . The proposed approach introduces a split cost function that decouples v oltage and current re gulation, pro viding a simpler alternati v e to con v entional long-horizon FS-MPC schemes used to address the con v erter’ s non-minimum-phase (NMP) beha vior . A current- estimation technique is incorporated to eliminate the need for additional sensors, lo wering hardw are cost and impro ving rob ustness. Unlik e e xisting FS-MPC methods that rely on horizon e xtension or e xtra measurements, the proposed strate gy le v erages the split cost structure to achie v e comparable NMP compensation with signicantly lo wer computational ef fort. The controller is implemented in real time using a hardw are-in-the-loop (HIL) setup on a ZedBoard platform, with accurate data acquisition pro vided by an e xternal ADC. Experimental results demonstrate that the proposed approach enhances v oltage-tracking performance, eliminates o v ershoot and undershoot , reduces settling time by o v er 40%, and decreases computational ef fort by more than 80% compared to traditional FS-MPC methods. This is an open access article under the CC BY -SA license . Corresponding A uthor: Ja whara El Hmidi Laboratory of Science and Engineering Research, F aculty of Sciences and T echnology Sidi Mohamed Ben Abdellah Uni v ersity Fez, Morocco Email: ja whara.elhmidi@usmba.ac.ma 1. INTR ODUCTION DC–DC boost con v erters play a critical role in modern ener gy systems such as electric v ehicles [1], rene w able ener gy interf aces [2], and distrib uted po wer supplies [3]. Their ability to step up DC v oltage le v els mak es them indispensable in meeting load and subsystem requirements. Ho we v er , the intrinsic non-minimum-phase (NMP) dynamics of boost con v erters [4] introduce control challenges, often leading to instability and de graded transient performance when con v entional controllers are applied. T raditional proportional–inte gral (PI) controllers are widely used because of their simplicity b ut struggle with the nonlinear and NMP characteristics of boost con v erters [5]. Nonlinear strate gies, such as sliding-mode and backstepping techniques [6], [7], impro v e rob ustness b ut require comple x implementations and e xtensi v e parameter tuning, which limits their practicality for lo w-cost embedded systems. Model predicti v e control (MPC) has emer ged as a compelling alternati v e for po wer electronic con v erters [8]. In particular , nite-set MPC (FS-MPC) [9], J ournal homepage: http://ijpeds.iaescor e .com Evaluation Warning : The document was created with Spire.PDF for Python.
1212 ❒ ISSN: 2088-8694 [10] aligns well with po wer con v erter operation because of its discrete nature and moderate computational requirements [11]. Ne v ertheless, when single-horizon FS-MPC is directly applied to re gulate the output v oltage of boost con v erters, the NMP ef fect can lead to instability and poor transient response [12], [13]. Existing solutions, including long-horizon and mo v e-blocking FS-MPC approaches [14]–[16], alle viate this problem b ut at the e xpense of increased computational b urden, making them less suitable for real-time applications on lo w-cost hardw are. These challenges highlight a signi cant research g ap because there is still a need for an FS-MPC strate gy capable of addressing the NM P beha vior of boost con v erters without relying on horizon e xtension or additional sensors that increase cost and comple xity [17]. The present w ork addresses this g ap by introducing a computationally ef cient FS-MPC method based on a split cost function that decouples v oltage and current re gulation. By le v eraging a load-current estimation technique, the proposed approach eliminates the need for e xtra current sensors, t hereby impro ving rob ustness and reducing hardw are requirements. In addition, a current-limiting feature is embedded wit hin the control algorithm to enhance protection under o v ercurrent conditions as e xplained in [18]. The proposed strate gy is v alidated through comprehensi v e simulations and Hardw are-in-the-Loop e xperiments under a v ariety of operating conditions, including input-v oltage v ariations, load disturbances, and reference-tracking scenarios. Results demonstrate that the method ef fecti v ely mitig ates the NMP -induced instability while impro ving transient performance, achie ving f aster settling time, better v oltage tracking, and signicantly lo wer computational ef fort compared with con v entional FS-MPC schemes. 2. METHOD This section presents a predicti v e control scheme tailored for DC-DC boost con v erters, aimed at mitig ating the adv erse ef fect s of their NMP nature. The propose d solution modi es the clas sical FS-MPC formulation by e v aluating a split cost function based on the switching state. Moreo v er , a load current estimation strate gy is included to eliminate the need for an output current sensor . 2.1. Modeling of the boost con v erter The boost con v erter as sho wn in Figure 1(a) is represented as a switched system composed of a DC v oltage source, a po wer switch (typically a MOSFET), a diode, an inductor L , an output capacitor C , and a resisti v e load. The control input u ∈ { 0 , 1 } determines the switching state: u = 1 corresponds to the ON state (switch closed), while u = 0 indicates the OFF state (switch open), as illustrated in Figures 1(a) and 1(b). The re gulation of the output v oltage is achie v ed by rapidly alternating between these tw o operating modes [16]. When the MOSFET is closed, this state is described by (1). V L = L di L ( t ) dt = V in − i L R L (1) The same for state where the MOSFET is open, Figure 1(c) present the con v erter topology and (2) described it. V L = L di L ( t ) dt = V in − i L R L − V c (2) V c is equal to V out , we can some by (1) and (2) in one equation, we obtain (3). V L = L di L ( t ) dt = V in − i L R L − V c (1 − u ) (3) T o predict the future inductor current [19], the con v entional Euler approximation is used (4). di L dt ≈ i L ( k + 1) − i L ( k ) T s (4) Rearranging this equation gi v es (5). i L ( k + 1) = di L dt T s + i L ( k ) (5) i L ( k ) : The measured v alue of the inductor current; T s : Sampling time of the control algorithm, wich equal half of period T s = T sw 2 . Int J Po w Elec & Dri Syst, V ol. 17, No. 2, June 2026: 1211–1220 Evaluation Warning : The document was created with Spire.PDF for Python.
Int J Po w Elec & Dri Syst ISSN: 2088-8694 ❒ 1213 Then we can put the deri v ati v e in (3) into the prediction function (5). i L ( k + 1) = T s L [ V in − i L R L − V out (1 − u )] + i L ( k ) (6) Ho we v er , to reduce comple xity and preserv e computational ef cienc y in real-time appl ications, the parasitic resistance is often ne glected. Under the assumption R L ≈ 0 , the simplied discrete-time model is (7). i L ( k + 1) = T s L [ V in − V out (1 − u )] + i L ( k ) (7) (a) (b) (c) Figure 1. Circuit diagram of a DC–DC boost con v erter and its operating modes: (a) circuit diagram, (b) MOSFET ON, and (c) MOSFET OFF 2.2. Pr ediction model The boost con v erter is modeled using tw o state v ariables: the inductor cur rent i L and the output v oltage V out . Con v entional FS–MPC typically relies on a single s tep prediction, which is adequate for man y po wer con v erters. Ho we v er , because of the NMP beha vior of boost con v erters where the output v oltage initially mo v es in the opposite direction to a change in the control input single step pre d i ction is insuf cient for accurate control [20]. T o o v ercome this limitation, the proposed strate gy adopts a dual mode approach with a tw o step prediction horizon [21]. At each sampling instant k , the switch state u ∗ ( k ) has already been applied, so the controller focuses on selecting the optimal future action u ( k + 1) by e v aluating its ef fect on the system at k + 2 . First, the intermediate state at k + 1 is predicted based on the applied control u ∗ ( k ) , and then each candidate switching action for u ( k + 1) is used to forecast the state at k + 2 . T o further enhance the controller’ s ability to manage the NMP dynamics, the decision at each candidate switching action is guided by a split cost function structure that e v aluates the system response dif ferently for the switch ON and switch OFF modes, section 2.5 describe this. This combined use of a dual–mode prediction horizon and split cost function enables the controller to anticipate the in v erse v oltage response and select the switching sequence that ensures stable and well re gulation. The inductor current at k + 1 is gi v en by (8). i L ( k + 1) = i L ( k ) + V in ( k ) L − (1 − u ∗ ( k )) V out ( k ) L T s (8) And the corresponding output v oltage is predicted as (9). V out ( k + 1) = V out ( k ) + (1 − u ∗ ( k )) i L ( k ) C − i load ( k ) C T s (9) Dual-mode model pr edictive contr ol for non-minimum phase boost con verter s (J awhr a El Hmidi) Evaluation Warning : The document was created with Spire.PDF for Python.
1214 ❒ ISSN: 2088-8694 Then, for each candidate switching action u ∈ { 0 , 1 } , the prediction at k + 2 is calculated in (10) and (11). i L ( k + 2) = i L ( k + 1) + V in ( k ) L − (1 − u ) V out ( k + 1) L T s (10) V out ( k + 2) = V out ( k + 1) + (1 − u ) i L ( k + 1) C − i load ( k ) C T s (11) The (8) and (9) pro vide the intermediate prediction, while in (10) and (11) estimate the fut ure state at k + 2 for each control candidate. This e xtended predict ion horizon allo ws the controller to anticipate the actual ef fect of switching actions and better handle the NMP beha vior of the system. 2.3. Load curr ent estimation The load current is estimated without using a ph ysical sensor , based on the capacitor current dynamics and the a v erage inductor current. T o deri v e this e xpression, we start from Kirchhof f ’ s current la w (KCL) at the output node of the boost con v erter . The load current is equal to the dif ference between the current supplied by the inductor (when the switch is OFF) and the capacitor current [22]. The capacitor current is gi v en by (12). i C ( k ) = C · V out ( k ) − V out ( k − 1) T s (12) When the switch is OFF , i.e., u ( k − 1) = 0 , the inductor current o ws to the output stage. The a v erage inductor current o v er one sampling period is approximated by (13). i a vg L ( k ) = i L ( k ) + i L ( k − 1) 2 (13) Consequently , the load current can be e xpressed as (14). i load ( k ) = (1 − u ( k − 1)) · i a vg L ( k ) − i C ( k ) (14) Substituting by (12) and (13) into (14), we obtain the nal estimation in (15). i load ( k ) = (1 − u ( k − 1)) · i L ( k ) + i L ( k − 1) 2 − C · V out ( k ) − V out ( k − 1) T s (15) This approach enables the estimation of the output current using only v oltage and inductor current measurements, eliminating the need for an additional current sensor . 2.4. Refer ence curr ent calculation The re ference v alue for the inductor current is deri v ed based on the principle of ideal po wer balance between the input and output of the con v erter . Assuming lossless operation and continuous conduction mode (CCM) [23], the input po wer P in is equal to the output po wer P out . That is, P in = V in ( k ) · i ref L = V ∗ out · i load ( k ) (16) solving in (16) for i ref L yields: i ref L = V ∗ out · i load ( k ) V in ( k ) (17) Int J Po w Elec & Dri Syst, V ol. 17, No. 2, June 2026: 1211–1220 Evaluation Warning : The document was created with Spire.PDF for Python.
Int J Po w Elec & Dri Syst ISSN: 2088-8694 ❒ 1215 2.5. Split cost function T o address the NMP beha vior inhere n t to boost con v er ters, a modied cost function structure is proposed. Instead of using a unied objecti v e for both switching states, the controller e v aluates tw o separate cost functions depending on the candidate control input u ∈ { 0 , 1 } . This allo ws the decision-making process to account for the dif ferent system responses when the switch is ON or OFF [24]. Specically , when the switch is OFF ( u = 0 ), as in (18). J OFF = V ∗ out − V OFF out ( k + 2) 2 + λ I i ref L − i OFF L ( k + 2) 2 (18) When the switch is ON ( u = 1 ), as (19). J ON = − V ∗ out − V ON out ( k + 2) 2 + λ I i ref L − i ON L ( k + 2) 2 (19) In this formulation, the tracking objecti v e for the output v oltage is weighted dif ferentl y based on the switch state [25]. In the OFF state, the controller aims to directly minimize the tracking error , encouraging the output v oltage to approach its reference. In the ON state, the sign of the v oltage error term is in v erted. This design choice intenti o na lly re w ards e ner g y accumulation in the induct o r , antici pating future output needs. By doing so, the controller compensates for the delayed ef fect of control actions on the output v oltage a k e y challenge posed by the NMP dynamics. The current re gulation term remains quadratic and symmetric in both cases, ensuring consistent tracking of the reference inductor current.This split e v aluation strate gy impro v es both transient performance and steady-state re gulation, while reducing the risk of o v ershoot or instability . At each sampling instant, both cost functions are e v aluated, and the optimal switching action i s chosen as described in (20). u ∗ ( k + 1) = ( 1 , if J ON < J OFF 0 , otherwise (20) T o ensure safe operation, an o v ercurrent protection mechanism is also implemented (21). If i ON L ( k + 2) > i max L ⇒ u ∗ ( k + 1) = 0 (21) 3. RESUL TS AND DISCUSSION 3.1. Experimental setup The e xperimental v alidation of the proposed dual-mode FS-MPC w as performed on a hardw are-in-the-loop (HIL) platform based on a ZedBoard Zynq-7000. The ARM corte x-A9 processor e x ecuted t he real-time control algorithm, strictly follo wing the sequence presented in Algorithm 1. This implementation e xcluded the FPGA f abric to assess the computational ef cienc y of the controller on a lo w-cost embedded processor . The e xperimental boost con v ert er , b uilt according to the parameters listed in T able 1, used an IRFZ44N MOSFET dri v en by an g ate dri v er . V oltage and current measurements were obtained using L V25-P and HAS50-S sensors, respecti v ely . The analog signals were digitized by an e xternal 16-bit ADS1115 ADC communicating via an I 2 C b us at 1.2 MHz, ensuring synchronized sampling. The control algorithm—comprising state prediction, load-current estimation, and dual cost-function e v aluation w as e x ecuted e v ery 10 µ s (10 kHz switching rate). Real-time monitoring and data acquisition were achie v ed through MA TLAB/Simulink in e xternal mode, as illustrated in Figure 2. T able 1. Boost con v erter parameters Component V alue Input v oltage [30 V –50 V] Output v oltage [40 V –60 V] Inductor 200 µH Capacitor 1000 µF Sampling time 10 µs Reference switching frequenc y 10 kHz Load resistor [10 Ω – 20 Ω ] Dual-mode model pr edictive contr ol for non-minimum phase boost con verter s (J awhr a El Hmidi) Evaluation Warning : The document was created with Spire.PDF for Python.
1216 ❒ ISSN: 2088-8694 Algorithm 1 Dual-mode-MPC controller for b uck con v erter 1: function D U A L - M P C ( i L ( k ) , i L ( k − 1) , V out ( k ) , V out ( k − 1) , u ( k − 1 ) , V r ef ) 2: Set parameters: T s , L , C , λ I , i L,max ; Estimate load current i L 3: Predict ne xt states using u ( k − 1 ) ; Init: J O N ← ∞ , J O F F ← ∞ 4: f or u ∈ { 0 , 1 } do 5: Predict ( i L,k +2 , V out,k +2 ) , compute e V , e I 6: if u = 1 then 7: J O N ← f ( e V , e I ) (f a v or ON if e V > 0 ) 8: else 9: J O F F ← f ( e V , e I ) (f a v or OFF if e V < 0 ) 10: end if 11: end f or 12: u ( k + 1) ← 1 if J O N < J O F F else 0 ; r etur n u ( k + 1) 13: end function Figure 2. HIL setup 3.2. Experimental r esults 3.2.1. T est scenario 1: V ariable input v oltage with xed output r efer ence In this rst test, the objecti v e is to e v aluate the beha vior of the boost con v erter and its control strate gy under a time-v arying input v oltage while maintaining a constant output v oltage reference. The input v oltage V in v aries o v er time as described in (22). V in ( t ) = 30 V , for 0 ≤ t < 1 s 40 V , for 1 ≤ t < 1 . 5 s 50 V , for t ≥ 1 . 5 s (22) In contrast, Figure 3(a) illustrates the response when the proposed control technique is applied. The output v oltage follo ws the reference v alue V ref = 60 V with e xcellent accurac y and without o v ershoot as sho wn in Figure 3(b). The inductor current sho ws smooth transitions and impro v ed tracking of the reference current, e v en during changes in input v oltage. This conrms the enhanced rob ustness and dynamic performance of the proposed split cost function-based control. 3.2.2. T est scenario 2: Fixed input v oltage with v ariable output r efer ence In this second test, the input v oltage V in is k ept constant at 30 V throughout the simulation, while the output v oltage reference V ref is v aried in steps to e v aluate the con v erter’ s ability to track dif ferent reference v alues. The reference prole is dened as follo ws: V ref ( t ) = 60 V , for 0 ≤ t < 1 s 80 V , for 1 ≤ t < 1 . 5 s 50 V , for t ≥ 1 . 5 s Int J Po w Elec & Dri Syst, V ol. 17, No. 2, June 2026: 1211–1220 Evaluation Warning : The document was created with Spire.PDF for Python.
Int J Po w Elec & Dri Syst ISSN: 2088-8694 ❒ 1217 This test e v aluates the performance proposed approach. The goal is to v erify ho w accurately and quickly the con v erter responds to do wnw ard steps in V ref , and elimi nates o v ershoot or undershoot during transients as it clearly sho wn in Figure 4 despite the ab use change in V r ef . (a) (b) Figure 3. Con v erter response using proposed FS-MPC under input v oltage v ariation: (a) system response using proposed FS-MPC and (b) zoomed vie w of the output v oltage and current response Figure 4. Con v erter response using proposed FS-MPC under reference v oltage v ariation Dual-mode model pr edictive contr ol for non-minimum phase boost con verter s (J awhr a El Hmidi) Evaluation Warning : The document was created with Spire.PDF for Python.
1218 ❒ ISSN: 2088-8694 3.2.3. T est scenario 3: Load v ariation under xed input and output r efer ence In this third test, the rob ustness of the proposed control method is e v aluated under a sudden and se v ere load v ariation. The input v oltage V in is held constant at 30 V , and the output v oltage reference is x ed at V ref = 60 V. The resisti v e load under goes an abrupt change from 41.6 Ω to 4.16 Ω , corresponding to a tenfold increase in current demand. This v ariation is applied at t = 1 s, simulating a highly dynam ic operating condition. The objecti v e of this test is to observ e ho w ef fecti v ely the proposed split cost function-based FS-MPC handles the disturbance while maintaining output v olt age re gulation and current stability . The results sho w that the proposed controller quickly reacts to the increased load without o v ershoot or v oltage drop, and restores steady-state conditions with minimal transient de viation as seen in Figure 5. Figure 5. Con v erter response using proposed FS-MPC under load disturbance 3.3. Comparati v e analysis F or benchmarking purposes, the proposed method w as compared with a standard FS-MPC implementation. As summarized in T able 2, the split cost-function strate gy achie v es lo wer o v ershoot and a shorter settling time while simultaneously reducing switching acti vity . In addition, it deli v ers a signicant impro v ement in computational ef cienc y compared with the con v entional approach. These results conrm that the proposed control strate gy not only addresses the non-minimum phase challenge b ut also enhances real-time feasibility , making it suitable for embedded implementations on lo w-cost hardw are platforms. T able 2. Experimental performance comparison Metric FS-MP C (classical) Proposed method Ov ershoot (%) 6.8 0.9 Settling time (ms) 1.1 0.6 Computation time (ARM, µ s) 18 8.5 4. CONCLUSION This w ork presented a real-time implementation of a split cost function-based nite-set model predicti v e control (FS-MPC) strate gy for a DC-DC boost con v erter using a hardw are-in-the-l oo p (HIL) setup with a ZedBoard and an ADC. The proposed method successfully addressed the limitations of classical FS-MPC by impro ving v oltage re gulation, suppressing o v ershoot, and enhancing current tracking. Experimental results under dif fe rent scenarios, including input v oltage v ariation, reference changes, and sudden load disturbances, demonstrated the superior dynamic performance and rob ustness of the proposed approach. The controller w as able to maintain output v oltage stability and react quickly to system v ariations, conrming its suitability for real-time embedded po wer con v ersion applications. Int J Po w Elec & Dri Syst, V ol. 17, No. 2, June 2026: 1211–1220 Evaluation Warning : The document was created with Spire.PDF for Python.
Int J Po w Elec & Dri Syst ISSN: 2088-8694 ❒ 1219 FUNDING INFORMA TION Authors state no funding in v olv ed. A UTHOR CONTRIB UTIONS ST A TEMENT This journal uses the Contrib utor Roles T axonomy (CRediT) to recognize indi vidual author contrib utions, reduce authorship disputes, and f acilitate collaboration. Name of A uthor C M So V a F o I R D O E V i Su P Fu Ja whra El Hmidi ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ Anass Mansouri ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ Ali Ahaitouf ✓ ✓ ✓ ✓ ✓ C : C onceptualization I : I n v estig ation V i : V i sualization M : M ethodology R : R esources Su : Su pervision So : So ftw are D : D ata Curation P : P roject Administration V a : V a lidation O : Writing - O riginal Draft Fu : Fu nding Acquisition F o : F o rmal Analysis E : Writing - Re vie w & E diting CONFLICT OF INTEREST ST A TEMENT The authors declare that there is no conict of interest re g arding the publication of this paper . D A T A A V AILABILITY The data supporting this study’ s ndings are a v ailable from the corresponding author , [JEL]. REFERENCES [1] J. W ang, B. W ang, L. Zhang, J. W ang, N. I. Shchuro v , and B. V . Malozyomo v , “Re vie w of bidirectional DC–DC con v erter topologies for h ybrid ener gy storage system of ne w ener gy v ehicles, ” Gr een Ener gy and Intellig ent T r ansportation , v ol. 1, no. 2, p. 100010, Sep. 2022, doi: 10.1016/j.geits.2022.100010. [2] T . Sutikno, A. S. Samosir , R. A. Aprilianto, H. S. Purnama, W . Arsadiando, and S. P admanaban, “ Adv anced DC–DC con v erter topologies for solar ener gy harv esting applications: a re vie w , ” Clean Ener gy , v ol. 7, no. 3, pp. 555–570, Jun. 2023, doi: 10.1093/ce/zkad003. [3] M. F . Akhtar , S. R. S. Raihan, N. A. Rahim, M . N. Akhtar , and E. Ab u Bakar , “Recent de v elopments in DC-DC con v erter topologies for light electric v ehicle char ging: a critical re vie w , ” Applied Sciences , v ol. 13, no. 3, p. 1676, Jan. 2023, doi: 10.3390/app13031676. [4] J. Asish, T . S. Me gha, N. Laqueta, and R. Seethur , “ Analysis of non-minimum phase fourth-order b uck boost con v erter , ” in 2023 7th International Confer ence on Computer Applications in Electrical Engineering-Recent Advances (CERA) , IEEE, Oct. 2023, pp. 1–6. doi: 10.1109/CERA59325.2023.10455739. [5] A. Daraz, A. Basit, and G. Zhang, “Performance analysis of pid controller and fuzzy logic controller for dc-dc boost con v erter , ” PLOS ONE , v ol. 18, no. 10, p. e0281122, Oct. 2023, doi: 10.1371/journal.pone.0281122. [6] I. A. A yad et al. , “Optimized nonlinear inte gral backstepping controller for dc-dc three-le v el boost con v erters, ” IEEE Access , v ol. 11, pp. 49794–49805, 2023, doi: 10.1109/A CCESS.2023.3274773. [7] L. W u, J. Liu, S. V azquez, and S. K. Mazumder , “Sliding mode control in po wer con v erters and dri v es: a re vie w , ” IEEE/CAA J ournal of A utomatica Sinica , v ol. 9, no. 3, pp. 392–406, 2022, doi: 10.1109/J AS.2021.1004380. [8] M. Schwenzer , M. A y , T . Ber gs, and D. Abel, “Re vie w on model predicti v e control: an engineering perspecti v e, ” International J ournal of Advanced Manufacturing T ec hnolo gy , v ol. 117, no. 5–6, pp. 1327–1349, 2021, doi: 10.1007/s00170-021-07682-3. [9] Y . Hakam, A. Gag a, M. T abaa, and B. El hadadi, “Enhancing elect ric v ehicle char ger performance with synchronous boost and model predicti v e control for v ehicle-to-grid inte gration, ” Ener gies , v ol. 17, no. 7, 2024, doi: 10.3390/en17071787. [10] P . V erma, M. N. Anw ar , M. K. Ram, and A. Iqbal, “Internal model control scheme-based v oltage and current mode control of DC-DC boost con v erter , ” IEEE Access , v ol. 11, pp. 110558–110569, 2023, doi: 10.1109/A CCESS.2023.3320272. [11] P . Karamanak os and T . Ge yer , “Guidelines for the design of nite control set model predicti v e controllers, ” I EEE T r ansactions on P ower Electr onics , v ol. 35, no. 7, pp. 7434–7450, Jul. 2020, doi: 10.1109/TPEL.2019.2954357. [12] M. Schwenzer , M. A y , T . Ber gs, and D. Abel, “R e vie w on model predicti v e control: an engineering perspecti v e, ” The International J ournal of Advanced Manufacturing T ec hnolo gy , v ol. 117, no. 5–6, pp. 1327–1349, No v . 2021, doi: 10.1007/s00170-021-07682-3. [13] D. Rojas, M. Ri v era, J. Munoz, C. Baier , and P . Wheeler , “ A study of weighting f actor design in model predicti v e control applications, ” in 2021 IEEE CHILEAN Confer ence on Electrical, Electr onics Engineeri ng , Information and Communication T ec hnolo gies (CHILECON) , IEEE, Dec. 2021, pp. 1–5. doi: 10.1109/CHILECON54041.2021.9702932. [14] Q. Y ang et al. , “Computationally ef cient x ed switchi ng frequenc y direct model predicti v e control, ” IEEE T r ansactions on P ower Electr onics , v ol. 37, no. 3, pp. 2761–2777, 2022, doi: 10.1109/TPEL.2021.3114979. Dual-mode model pr edictive contr ol for non-minimum phase boost con verter s (J awhr a El Hmidi) Evaluation Warning : The document was created with Spire.PDF for Python.
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Muduli, “Eliminating current sensor dependencies in dab con v erters using a luenber ger observ er -based h ybrid approach, ” IEEE T r ansactions on Industry Applications , v ol. 60, no. 4, pp. 6380–6392, 2024, doi: 10.1109/TIA.2024.3384465. [23] I. Bashir , A. H. Bhat, and S. Ahmad, “ A re vie w on soft switched PFC boost con v erter for ef cient lo wering of switching losses, ” Electric P ower Systems Resear c h , v ol. 242, 2025, doi: 10.1016/j.epsr .2025.111430. [24] C. Minchala- ´ Avila, P . Ar ´ ev alo, and D. Ochoa-Correa, “ A systematic re vie w of model predicti v e control for rob ust and ef cient ener gy management in electric v ehicle inte gration and v2g applications , ” Modelling , v ol. 6, no. 1, 2025, doi: 10.3390/modelling6010020. [25] E. Zerdali, M. Ri v era, and P . Wheeler , “ A re vie w on weighting f actor design of nite control set model predicti v e control strate gies for A C electric dri v es, ” IEEE T r ansactions on P ower Electr onics , v ol. 39, no. 8, pp. 9967–9981, Aug. 2024, doi: 10.1109/TPEL.2024.3370550. BIOGRAPHIES OF A UTHORS J awhra El Hmidi recei v ed the State Engineering de gree in Embedded Systems and Industrial Computing from ENSA F ` es, Morocco, in 2020. She then w ork ed as an Elec tric/Electronic Architect at Stellantis Group (2020–2022), focusing on embedded automoti v e electronic systems. Currently pursuing a Ph.D. at Sidi Mohamed Ben Abdellah Uni v ersity (USMB A), Fez, within the SIGER Laboratory , her research centers on po wer electronics and control strate gies for electric v ehicle char gers. Her interests include bidirectional con v erters, LLC resonant topologies, V2G/G2V inte gration, and real-time embedded control. She is act i v ely in v olv ed in hardw are/softw are co-design and system-le v el modeling for adv anced char ging solutions in electric mobility . She can be contacted at email: ja whara.elhmidi@usmba.ac.ma. Anass Mansouri recei v ed the Ph.D. de gree in microelectronics and embedded systems from the F aculty of Sciences and T echnologies, Fez, Morocco, in 2009. He is currently a professor with the Nati onal School of Applied Sciences (ENSA), Fez. His research interests include VLSI and embedded architecture desi gn, video, image processing, and softw are/hardw are design and optimization. He is a member of the Intelligent Systems, Georesources, and Rene w able Ener gies (SIGER) and the Head of the T eam Embedded Systems, Electronics, and T elecommunication. He can be contacted at email: anass.manssouri@usmba.ac.ma. Ali Ahaitouf recei v ed the Ph.D. de gree in electronics, in 1998. He is currently a teacher and a researcher with the Uni v ersity of Sidi Mohammed Ben Abdellah (USMB A), Fez. He w as the Ex-Director of the Intelligent Systems, Georesources, and Rene w able Ener gies (SIGER). He managed man y multilateral research projects related to analog design optimization, electronics component characterization, optimization, and solar ener gy under concentration (CPV). He supervised a dozen Ph.D. theses and published o v er 15 articles in reno wned journals. His research interests include microelectronics and solar compounds, digital and analog design of inte grated circuits, and image and data compression. He can be contacted at email: ali.ahaitouf@usmba.ac.ma. Int J Po w Elec & Dri Syst, V ol. 17, No. 2, June 2026: 1211–1220 Evaluation Warning : The document was created with Spire.PDF for Python.