Vector logic for robotic system on chip design and test

Abstract

Artificial Intelligence and vector logic of computing do not contradict but cooperate and enrich each other. Logic is the law of existence and development of emerging computing. Logic is functions and structures, models and algorithms, phenomena and processes. Any computing, including artificial intelligence, is logic and nothing else. Emerging computing devices today have hundreds of systems on a chip and memory blocks, which are interconnected by thousands of connecting wires. This encompasses all the logic, functionalities, and structures, which are subject to testing by system methods. To achieve this, a logic vector serves as a generic form for describing functions, structures, and buses in modeling for the simulation of test sets and logic faults as address. Chip-let Interconnect bus is also a logical functionality or structure. They must be tested to diagnose defects by system logic mechanisms. The latter involves modeling to automatically obtain data structures, followed by good-value simulation and simulation of all fault combinations, such as addresses, on the buses segment. For this purpose, vector logic is used to describe functionalities and structures, models and algorithms, faults and tests. Mechanisms and application that assume a harmonious relationship between the model and the algorithm for their processing are considered.