Modeling and simulation of graphene field effect transistor (GFET)

Abstract

Graphene based top-gated Field effect transistor (GFET) is designed and simulated using the device simulator packages. The paper describes fabrication process and the device simulation aspects of the GFET device. Two devices with different gate lengths of 200nm and 350nm are simulated. Device simulations are carried out in open source TCAD software package. The results indicate a depletion FET type operation in which ON/OFF current ratio of 2.25 is obtained.