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30,468 Article Results

Comparison of Weak Load Bus Detection using LQP_LT Index with PV and QV Analysis of PSS/E

10.11591/ijeecs.v12.i2.pp577-584
Renuga Verayiah , Azah Mohamed
Identification of weak load buses which contributes to voltage instability problem is crucial in order for an appropriate mitigation action to be executed. The current power system transmission is not only stressed to deliver high load demand at the receiving end but also facing new challenges brought by the penetratrion of renewable energy sources. This new scenario requires power system operation and analysis to be robust and fast in detecting the accurate weak load bus for correction action. Due to this, many online indices to detect weak load bus during power system contingency have been developed. Nevertheless, LQP_LT is of the latest index developed which ultimately has the reactive power tracing capability for weak load bus detection and generate priority ranking list of the weak load buses. This index was tested on IEEE 14 bus test system for different contingency scenarios. The results obtained from the LQP_LT index is compared and validated with the PV and QV analyses obtained using industrial graded PSS/E software. It was concluded that the LQP_LT index is found to be robust, efficient and need less computation time as compared to the execution of voltage stability analysis using the PSS/E Tool.
Volume: 12
Issue: 2
Page: 577-584
Publish at: 2018-11-01

High Speed Area Efficient FPGA Implementation of AES Algorithm

10.11591/ijres.v7.i3.pp157-165
P. B. Mane , A. O. Mulani
Now a day digital information is very easy to process, but it allows unauthorized users to access this information. To protect this information from unauthorized access, Advanced Encryption Standard (AES) is one of the most frequently used symmetric key cryptography algorithm. Main objective of this paper is to implement fast and secure AES algorithm on reconfigurable platform. In this paper, AES algorithm is designed with the aim to achieve less power consumption and high throughput. Keys are generated using MATLAB and remaining algorithm is designed using Xilinx SysGen, implemented on Nexys4 and simulated using Simulink. Synthesis result shows that it consumes 121 slice registers and its operating frequency is 1102.536 MHz. Throughput of the overall system is 14.1125 Gbps.
Volume: 7
Issue: 3
Page: 157-165
Publish at: 2018-11-01

Design And Analysis Of CMOS Low Noise Amplifier Circuit For 5-GHz Cascode and Folded Cascode In 180nm Technology

10.11591/ijres.v7.i3.pp149-156
T. Kanthi , D. Sharath Babu Rao
This paper is about Low noise amplifier topologies based on 0.18µm CMOS technology. A common source stage with inductive degeneration, cascode stage and folded cascode stage is designed, simulated and the performance has been analyzed. The LNA’s are designed in 5GHz. The LNA of cascode stage of noise figure (NF) 2.044dB and power gain 4.347 is achieved. The simulations are done in cadence virtuoso spectre RF.
Volume: 7
Issue: 3
Page: 149-156
Publish at: 2018-11-01

Design Considerations of Reconfigurable CMOS Mixers for Multi-Standard Communication Receiver Systems

10.11591/ijres.v7.i3.pp166-172
Manoj Kumar Vishnoi , Satya Sai Srikant
This paper has been carried out the study of reconfigurable wide-band mixers that can do the frequency conversion and gain variation standards with low noise and high linearity used in multi-mode and multi-standard receivers. Over the last few years reconfigurability has become very popular in adopting technology to meet the wideband wireless communication specifications that is compatible with multi-standards like GPS (1.57 GHz), WLAN (2.4 GHz - 5.9 GHz), Bluetooth (2.402 – 2.483 GHz) and ZigBee (0.784 - 0.915 GHz) in low power consumption environment. The reconfigurability can be achieved between low and high band modes through power switching in RF frequency mixers. It can be achieved by flipping the input RF signal between gate and source terminal of input transistor and altering the trans-impedance stage output. With the concept of reconfigurable transistor pair with open and short circuit stubs, one can not only find the configurable gain with center frequencies 7.355, 8.65, 11.35 and 12.65 GHz but also with high power efficiency. Tow Thomas Bi-Quad Topology other than the traditional current commuting technique for the second order trans-impedance amplifier stage, works as a current mode filter over a tunable bandwidth. The active Gilbert mixers are used widely in most of communication system, due to its significance gain, perfect isolation, and linearity in response.
Volume: 7
Issue: 3
Page: 166-172
Publish at: 2018-11-01

Real time FPGA Implementation of PWM Chopper Fed Capacitor Run Induction Motor

10.11591/ijres.v7.i3.pp138-148
N. Murali , V. Balaji
This paper presents the performance enhancement of capacitor run induction motor by pulse width modulated AC chopper.The phase angle control faces severe shortfall in the performance improvement for larger triggering angles. In this paper the comparison of phase angle control and sinusoidal pulse width modulation technique is encountered for effective speed control of single phase capacitor run induction motor. The necessary parameters are taken into considerations are higher efficiency, lesser total harmonic distortion and high input power factor. The results are compared by using the simulations using matlab Simulink environment. The validation of result in hardware is implemented using Field programmable gate array for sinusoidal pulse width modulation technique.
Volume: 7
Issue: 3
Page: 138-148
Publish at: 2018-11-01

Impact of MRAI Timer on BGP Updates and Convergence Time

10.11591/ijeecs.v12.i2.pp873-882
Rohit Nilkanth Devikar , Dipak V. Patil , V Chandra Prakash
BGP is a vital routing protocol for the communication amongst autonomous systems in the internet and has been broadly applied in all categories of large scale network. The inter-domain routing protocol (BGP) shows slow convergence, which effects on many internet applications due to its high convergence delay. The network operators broadly use different MRAI timers in BGP routers to deal with the issue of growing convergence time of the network. The variation in MRAI timer and its impact on network convergence and update messages has been broadly studied over the years. The increasing size of autonomous systems leads to rise in number of MRAI timers. Hence, the optimum use of MRAI timers can decrease the problem of slow convergence and necessity of huge number of MRAI timers. The proposed system uses the ckle minimum route advertisement interval timer (FMRAI) for fast update of routing table, which leads to reduce the convergence time of a network. In comparison with static MRAI timer of 30s the FMRAI timer leads to better result in terms of convergence time and number of update messages.
Volume: 12
Issue: 2
Page: 873-882
Publish at: 2018-11-01

Automated Calibration Of Greenhouse Energy Model Using Hybrid Evolutionary Programming (EP)-Energy Plus

10.11591/ijeecs.v12.i2.pp648-654
NY Dahlan , S. Z. Sakimin , M. Faizwan , N. Ajmain , A. A. Aris
This paper presents an optimization approach of calibrating a tomato greenhouse energy model using hybrid Evolutionary Programming (EP)-EnergyPlus. The proposed methodology applies automated simulation-based approach by coupling Matlab and EnergyPlus to perform building energy simulation and obtain the best variables configuration with minimal error between the simulated and measured energy of the greenhouse. The proposed method is tested using a tomato greenhouse system located in Universiti Putra Malaysia (UPM). The greenhouse envelope is built using 0.15mm thick Transparency Plastic Film. Meanwhile, the electrical loads in the greenhouse consists of 6 exhaust fans, 2 axial fans, 5 fluorescent lamps and 1 irrigation pump. An Evolutionary Programming (EP) algorithm is chosen and programmed in Matlab to find the best configurations for optimum calibration of the greenhouse energy model. Three variables were chosen to find the best configuration which are the operating hours of Exhaust Fan, Axial Fan and Water Pump. The EP optimization algorithm in Matlab is coupled with building energy simulator, EnergyPlus using BCVTB as the coupling tool. Result shows that the EnergyPlus-EP model can provide NMBE and CV(RMSE) within the range recommended by the IPMVP protocol. The proposed method is not only requiring less computation time but also effective in searching for the best variables configuration with minimal error.
Volume: 12
Issue: 2
Page: 648-654
Publish at: 2018-11-01

Design and Implementation of a New Architecture of a Real-Time Reconfigurable Digital Modulator (DM) Into QPSK, 8-PSK, and 16-PSK on FPGA

10.11591/ijres.v7.i3.pp173-185
Walder Andre , Olivier Couillard
One of the prerequisites of Electronic Warfare (EW) is to have the means to provide secure point-to-point wireless data and voice communications with other ground stations. New technologies are giving rise to bigger information security threats. This situation illustrates the best the urgency of reducing the development and upgrade time of EW systems. Previous works suggest that digital systems are the best candidates for this purpose and therefore form the backbone of modern Electronic Warfare. Indeed, Digital Modulation (DM) techniques are widely used in modern wireless communication systems. This is largely due to their high resistance to noise and their high transmission capacity that can be achieved through data multiplexing. In this article, a new reconfigurable architecture of a Phase Shift Keying (PSK) modulation is described. The latter can be configured in real time to produce the following modulation schemes: QPSK, 8-PSK, and 16-PSK without having to regenerate the FPGA configuration bits. This action can be done by software via programming or manually using a DIP switch. The proposed design is implemented on the Xilinx xc7k325tfbg900 FPGA using the Genesis 2 development board. The Vivado Physical Design Automation tool indicates a power consumption of 303 mW by the on-chip circuit. The experimental results are in agreement with the simulations.
Volume: 7
Issue: 3
Page: 173-185
Publish at: 2018-11-01

Design and Implementation of LCG-Trivium Key Stream Generator into FPGA

10.11591/ijres.v7.i3.pp186-194
Tchahou Tchendjeu A. E , Tchitnga Robert , Fotsin Hilaire B
This paper presents the Design and implementation into Field ProgrammableGate Array (FPGA) of a combine stream cipher and a simple linear congruential generator circuit to produce key stream. The LCG circuit is used to produce initialization vector (IV) each 264 clock cycle to the cipher trivium in other to strengthen the complexity of the cipher to known attacks on trivium. The LCGTrivium is designed to generate 2144 bits of keystream from an 80-bits secret and a variable 80-bits initial value. To implement the LCG-Trivium on FPGA, we use VHDL to build a simple LCG and Trivium and a state machine to synchronize the functioning of the LCG and Trivium. The number of gates, memory and speed requirement on FPGA is giving after analysis. The design is simulated, synthesized and implemented in Quartus II 10.1, ModelSim-Altera 6.5 and Cyclone IV E EP4CE115F29C7N.
Volume: 7
Issue: 3
Page: 186-194
Publish at: 2018-11-01

An Optimal Design of CMOS Two Stage Comparator Circuit using Swarm Intelligence Technique

10.11591/ijres.v7.i3.pp131-137
Sasikumar Sasikumar , Muthaiah Muthaiah
A swarm intelligent based optimization technique named as Flower pollination algorithm (FPA) is applied for the design of the CMOS two stage comparator circuit. The basic idea of FPA mimics the flower pollination process of flowering plants. The input control parameters of FPA improve the exploration and exploitation capabilities of optimization problem. This paper presents the design of a CMOS two-stage comparator circuit using simulation based model called swarm intelligence technique. Simulation results shows that the proposed method is capable to determine the transistor sizes and bias current values of the CMOS comparator. The results obtained from the FPA improved the design performance of comparator in terms of power consumption, MOS transistor area and gain. To investigate the efficiency of proposed approach, comparisons have been carried out with differential evolution (DE) and harmony search (HS) algorithm based circuit design. The performances of FPA based comparator design are better than the previously reported works
Volume: 7
Issue: 3
Page: 131-137
Publish at: 2018-11-01

Radio Access Technology (RAT) Selection Mechanism using TOPSIS Method in Heterogeneous Wireless Networks (HWN)

10.11591/ijeecs.v12.i2.pp852-864
Farhat Anwar , Mosharrof Masud , Burhan Ul Islam , Rashidah Funke Olanrewaju
In next-generation wireless networks, a Multi-Mode Device (MMD) can be connected with available Radio Access Technology (RAT) in a Heterogeneous Wireless Network (HWN). The appropriate RAT selection is essential to achieve expected Quality of Service (QoS) in HWN. There are many factors to select an appropriate RAT in HWN including Data rate, Power consumption, Security, Network delay, Service price, etc. Nowadays, the MMDs are capable to handle with multiple types of services like voice, file downloading, video streaming. Considering numerous factors and multiple types of services, it is a great challenge for MMDs to select the appropriate RAT. A Multi-Attribute Decision Making (MADM) method to deal with numerous attributes to achieve the expected goal is Technique for Order Preference by Similarity to Ideal Solution (TOPSIS). This research utilized TOPSIS method to evaluate its proposed algorithm to choose the proper RAT for single and dual call services. The algorithm applies users' preference of a specific RAT that varies for diverse categories of calls. It also aggregates the assigned call weight and call priority to choose the RAT for group call admission for different scenarios. The highest closeness coefficient has been considered the appropriate networks among other networks. 100 call admission into three networks has been simulated and has been observed.
Volume: 12
Issue: 2
Page: 852-864
Publish at: 2018-11-01

Modeling Under MATLAB by ANFIS of Three-Phase Tetrahedral Transformer Using in Microwave Generator for Three Magnetrons Per Phase

10.12928/telkomnika.v16i5.10003
Mouhcine; Ibn Zohr University Lahame , Mohammed; Ibn Zohr University Chraygene , Hamid; Ibn Zohr University Outzguinrimt , Redouane; Ibn Zohr University Batit , Rajae; Ibn Zohr University Oumghar , Mohamed; Mohamed University Ferfra
This work deals with the modeling of a new three-phase tetrahedral transformer of HV power supply, which feeds three magnetrons per phase. The design of this new power supply is composed of three single-phase with magnetic shunt transformers coupling in star; each one is size to feed voltage-doubling cells, thereby feeds a magnetron. In order to validate the functionality of this power supply, we simulate it under Matlab-Simulink environment. Thus, we modeled nonlinear inductance using a new approach of neuro-fuzzy (ANFIS); this method based on the interpolation of the curve B(H) of ferromagnetic material, the results obtained gives forms of both voltages and currents, which shows that they are in accordance with those of experimental tests, respecting the conditions recommended by the magnetron manufacturer
Volume: 16
Issue: 5
Page: 2406-2414
Publish at: 2018-10-10

Advances on Microwave Ceramic Filters for Wireless Communications (Review Paper)

10.11591/ijece.v8i5.pp2762-2772
Stelios Tsitsos
A review of the technological developments on ceramic monoblock filters and duplexers over the years is presented in this work. Early designs based on simulated and measured data are presented along with later designs based on accurate equivalent circuits as well as the use of evolution algorithms for optimal design. 
Volume: 8
Issue: 5
Page: 2762-2772
Publish at: 2018-10-01

Initial Optimal Parameters of Artificial Neural Network and Support Vector Regression

10.11591/ijece.v8i5.pp3341-3348
Edy Fradinata , Sakesun Suthummanon , Wannarat Suntiamorntut
This paper presents architecture of backpropagation Artificial Neural Network (ANN) and Support Vector Regression (SVR) models in supervised learning process for cement demand dataset. This study aims to identify the effectiveness of each parameter of mean square error (MSE) indicators for time series dataset. The study varies different random sample in each demand parameter in the network of ANN and support vector function as well. The variations of percent datasets from activation function, learning rate of sigmoid and purelin, hidden layer, neurons, and training function should be applied for ANN. Furthermore, SVR is varied in kernel function, lost function and insensitivity to obtain the best result from its simulation. The best results of this study for ANN activation function is Sigmoid. The amount of data input is 100% or 96 of data, 150 learning rates, one hidden layer, trinlm training function, 15 neurons and 3 total layers. The best results for SVR are six variables that run in optimal condition, kernel function is linear, loss function is ౬-insensitive, and insensitivity was 1. The better results for both methods are six variables. The contribution of this study is to obtain the optimal parameters for specific variables of ANN and SVR.
Volume: 8
Issue: 5
Page: 3341-3348
Publish at: 2018-10-01

DNA Pool Analysis-based Forgery-Detection of Dairy Products

10.11591/ijece.v8i5.pp3913-3922
Francesco Rossi , Paola Modesto , Cristina Biolatti , Alfredo Benso , Stefano Di Carlo , Gianfranco Politano , Pierluigi Acutis
Food integrity and food safety have received much attention in recent years due to the dramatic increasing number of food frauds. In this article we focus on the problem of dairy products traceability. In particular, we propose an automatic forgery detection system able to detect frauds in milk and cheese. We investigate the use of Short Tandem Repeats analysis data, processed by a Covariance Matrix Adaptation Evolution Strategy algorithm in order to evaluate a traceability score between the products and their producer, and to highlight possible adulterations and inconsistencies. To demonstrate the usability of the proposed heuristic algorithm in a real setup, we also present the results collected from two real Italian farms.
Volume: 8
Issue: 5
Page: 3913-3922
Publish at: 2018-10-01
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