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27,404 Article Results

A Novel Method Based on Biogeography-Based Optimization for DG Planning in Distribution System

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1509
Mohammad Sedaghat , Esmaeel Rokrok , Mohammad Bakhshipour
This paper proposed a novel technique based on biogeography-based optimization (BBO) algorithm in order to optimal placement and sizing of distinct types of Distributed Generation (DG) units in the distribution networks which is applied to improve voltage profile as the main factor for power quality improvement and reduce power losses. In order to promote the investigation to be capable in practical terms, the loads are linearly varied in small steps of 1% from 50% to 150% of the base value. The optimal size and location of distinct types of DGs are found out in each load step. This will aid the distribution network operators (DNOs) to have a long term scheduling for the optimal management of DG units and achieve the maximum performance. To verify the efficiency of proposed method, it has been conducted to IEEE 33-bus radial distribution system. Also, simulation results are compared with the analytical approach and HPSO algorithm (mixed binary and typical particle swarm optimization algorithm). The obtained simulation results demonstrate the better performance and effectiveness of the proposed method. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8083 
Volume: 15
Issue: 1
Page: 1-13
Publish at: 2015-07-01

NARX Based Short Term Wind Power Forecasting Model

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1511
M. Nandana Jyothi , V. Dinakar , N. S S Ravi Teja , K. Nanda Kishore
Nowadays, with the growing needs of the consumers there is a huge demand for the electric power but the fuel reserves are also depleting at the same pace. So, this has created the need to depend up on the renewable energy resources to meet the required power demand.  Since the power generated through renewable resources is eco friendly in nature and distributed, this is an added advantage. Of all the renewable energy resources solar and wind plays the most crucial part in the power generation because of their wide spread availability. But the wind energy is volatile and intermittent by nature, due to this interconnecting the power generated to grid becomes a hectic task. So in this paper a wind power forecasting model with the help of artificial neural networks (ANN) is developed so that the wind power can be forecasted well in progress, which helps in maintaining and operating grid interconnection and also scheduling of units. The developed model is based on the non-linear auto regressive with exogenous input (narx) tool which trains the ANN for the time series. The input parameters taken into consideration are wind speed, temperature, pressure, air density and the output parameter is generated power. The required data is collected from the Energy Department of KLUniversity, Andhra Pradesh which consists of 720 hours data from that 672 hours data is used for training and 48 hours data is used for prediction. Mean square error and root mean square error are calculated from the predicted and known results. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8070
Volume: 15
Issue: 1
Page: 20-25
Publish at: 2015-07-01

Symbol Error Rate Performance Analysis of Decode and Forward Cooperative Communication System

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1523
Qabas Ali Hikmat , Bin Dai , Rokan Khaji , Benxiong Huang , Edriss Eisa
In this paper, we investigate the performance of Decode and Forward (DF) in multiple relay networks. We consider a cooperative diversity system where a source sends information to the destination with the aid of multi relay working in DF relaying protocol and investigate the Optimal Power Allocation (OPA) at both the source and the relay nodes. By taking advantage of the moment generating function (MGF), a closed form expression for the symbol error rate (SER) and signal to noise ratio (SNR) for both, M-Phase Shift Keying (MPSK) and M-Quadrature Amplitude Modulation (MQAM) signals has been derived to illustrate the asymptotic performance of the DF system where the approximation SER is tight at high SNR. Results show that the proposed system, based on SER lower bound is tight to the theoretical SER upper bound, and the suggested OPA outperforms the equal power allocation (EPA) and at different number of relays. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8037
Volume: 15
Issue: 1
Page: 120-127
Publish at: 2015-07-01

Evaluating Quasi Random Deployment in Zigbee Based Wireless Sensor Networks

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1525
Itu Snigdh , Nisha Gupta
Among the various parameters and constraints considered that are affected by optimal deployments, performance as per the mac layer has attained limited attention. This article is aimed at two things. Firstly, it aims to understand the packet delivery parameters for convergecast communication pattern ideal for Zigbee based wireless sensor networks. Secondly, it aims to suggest enhancements through proposing a quasi based deployment pattern, that may help boost the performance to acceptable levels. We simulate and observe the packet based statistics at the mac layers employing different protocols like AODV, DSR. This paper is also an effort to suggest the use of Quasi based deployment strategy comparable to the existing random and deterministic methods. The inferences obtained are for zigbee networks encorporating both peer to peer (using a tree based topology) and star (using a graph based topology) WSN architectures. A quasi based deployment pattern offers scope for improvement of the reliability metrics which is the sole accountability of the mac layer, irrespective to the protocol employed at the higher levels or the backbone structure for communication. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8074 
Volume: 15
Issue: 1
Page: 142-150
Publish at: 2015-07-01

Simple Method for Non Contact Thickness Gauge using Ultrasonic Sensor and Android Smartphone

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1531
Anif Jamaluddin , Fita Listiana , Dwi Teguh Rahardjo , Lita Rahmasari , Dewanto Harjunowibowo
The aim of this research is to develop simple method for non contact thickness gauge using ultrasonic sensor and android smartphone. This system is constructed using ultrasonic sensor HY-SRF05, microcontroller ATMEGA328, bluetooth module and android smartphone. Ultrasonic sensor transmits ultrasonic pulses in the form of waves and recieves back the pulses after the waves are reflected by an object. The time duration of ultrasonic between  transmition and reception is calculated as distance between sensor and sample. The method of for thickness measurement adhere sample on holder infront of ultrasonic sensor. The Thickness measurement of sample is calculated base on distance beetwen sensor to holder (fixed barrier)  and sample to sensor. The zero position of measurement is distance of sensor to holder. The data of thickness is sent via bluetooth and received by the Android application. Android Application uses to  display measurement is designed base on MIT App Inventor for Android (AIA) platform. The measurement results show a fairly high degree of accuracy is 99.978%. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.7187
Volume: 15
Issue: 1
Page: 191-196
Publish at: 2015-07-01

FPGA Based Controller Area Network

10.11591/ijres.v4.i2.pp122-128
Ali Ghareaghaji
In this paper the Controller Area Network (CAN) Controller is presented. CAN is an advance serial bus communication protocol that efficiently supports distributed, broadcast real-time control and fault tolerance features for automobile industries to provide congestion free networking. The CAN Controller is designed for scheduling of messages, consist of the Transmitter Controller, FIFO buffer, CRC generator and bit stuffer. Scheduling messages on CAN corresponds to assigning identifiers (IDs) to message according to their priorities. Non Return to Zero (NRZ) coding and Non Destructive Bitwise Arbitration (NDBA) is used. The data is taken from the buffer FIFO, bit stuffed and then transmitted after CRC is performed. The whole design is captured entirely in VHDL language using bottom up design and verification methodology. The proposed controller was designed for applications needing high level data integrity and data rates upto 1Mbps. The applications of CAN are factory automation, machine control, automobile, avionics and aerospace, building automation.
Volume: 4
Issue: 2
Page: 122-128
Publish at: 2015-07-01

FPGA Synthesis of Reconfigurable Modules for FIR Filter

10.11591/ijres.v4.i2.pp63-70
Saranya R , Pradeep C , Neena Baby , Radhakrishnan R
Reconfigurable computing for DSP remains an active area to explore as the need for incorporation with more conventional DSP technologies turn out to be obvious. Conventionally, the majority of the work in the area of reconfigurable computing is aimed on fine grained FPGA devices. Over the years, the focus is shifted from bit level granularity to a coarse grained composition. FIR filter remains and persist to be an important building block in various DSP systems. It computes the output by multiplying input samples with a set of coefficients followed by addition. Here multipliers and adders are modeled using the concept of divide and conquer. For developing a reconfiguarble FIR filter, different tap filters are designed as separate reconfigurable modules. Furthermore, there is an additional concern for making the system fault tolerant. A fault detection mechanism is introduced to detect the faults based on the nature of operands. The reconfigurable modules are structurally modeled in Verilog HDL and simulated and synthesized using Xilinx ISE 14.2. A comparison of the device utilization of reconfigurable modules is also presented in this paper by implementing the design on various Virtex FPGA devices.
Volume: 4
Issue: 2
Page: 63-70
Publish at: 2015-07-01

Energy Efficient Intrusion Detection Scheme with Clustering for Wireless Sensor Networks

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1524
Mohammed Ali Hussain
Wireless sensor network (WSN) consists of a small size sensor nodes depends on battery power. Applications of sensor networks are street lighting, home automation, industrial plant, environmental parameters, health care and military. Security is becoming a major concept in the design of wireless sensor networks. Attacks on sensor networks include attack on confidentiality, integrity and availability. Lack of confidentiality means that the secret information is revealed to attackers. Lack of integrity means that the attacker modifies the contents (data) communicated in the sensor network. Lack of availability means the resources in the network is not available to authorized users. So to avoid these problems we need better security measures. In this paper we are dealing with intrusion detection. Intrusion detection plays an important role in the design of wireless sensor networks. An intruder can perform various attacks like replay, interception, worm hole, sink hole attacks. So our aim in this paper is to find such intrusions as early as possible, when they occurred and to enhance the life tome of the sensor network. This is because sensors nodes depend only on battery power. Our intrusion detection is based on clustering of the sensor network. This makes routing process, medium control and intrusion detection simple. DOI:  http://dx.doi.org/10.11591/telkomnika.v15i1.8072 
Volume: 15
Issue: 1
Page: 128-141
Publish at: 2015-07-01

An Integrated Architectural Clock Implemented Memory Design for Embedded System

10.11591/ijres.v4.i2.pp129-141
Ravi Khatwal , Manoj Kumar Jain
Recently Low power custom memory design is the major issue for embedded designer. Micro wind and Xilinx simulator performs efficient cache simulation and high performances with low power consumption. SRAM efficiency analyzed with 6-T architecture design and analyzed the simulation performance for specific application. We have implemented clock based memory architecture design and analyzed internal clock efficiency for SRAM. Architectural clock implemented memory design that reduces access time and propagation delay time for embedded devices. Internal semiconductor material improvement increases simulation performance and these design implemented for application specific design architecture.
Volume: 4
Issue: 2
Page: 129-141
Publish at: 2015-07-01

Design of Secure Transmission of Multimedia Data Using SRTP on Linux Platform

10.11591/ijres.v4.i2.pp71-81
Shashidhar H.G. , Sanket Dessai , Shilpa Chaudhari
This paper aims for providing a viable solution for security in streaming media technology. Service providers do not want the end users to capture and duplicate streaming media data. Once captured data can be re-distributed to millions without any control from the source.  Licensing issues also dictate the number of times end user may utilize the data. Encryption is not sufficient as it leaves the system vulnerable to duplication and recording after decryption. In this paper an attempt has been made to transmit digital multimedia data to multiple users. The transmission of the video/audio data has been attempted from one PC to another PC. While doing this, security considerations have to be taken care by using suitable encryption/decryption techniques.  A research carried out on the different data transmission protocols reveals that the Secure Real Time Transport Protocol (SRTP) is one of the best available protocols. Hence the SRTP has been deployed in this project on Linux OS using socket programming. The code for the transmitter and the receiver is designed and developed around the SRTP library for transmission of multimedia data.  The solution is illustrated by choosing an example of a video clip for transmission and reception. This model increasing the security of streaming media and adds a measure of integrity protection, but it is primarily intended to aid in replay preventions.
Volume: 4
Issue: 2
Page: 71-81
Publish at: 2015-07-01

Application of New Approach of design flow for Hardware/Software Embedded System with the Use of Design Patterns in Fuzzy control system

10.11591/ijres.v4.i2.pp142-160
Ali Bouyahya , Yassine Manai , Joseph Haggège
This paper present a new method of conception of hardware/software embedded system design methodology based on use of design pattern approach called Abstract_factory. We called this new design tool “smart cell”. The main idea of the conception of embedded systems design is based on the used of object-oriented design ULM2.0. When the smart-cell is implemented, we justify their uses as a design tool that allows, first, to develop a specified application of fuzzy controller called PDC (parallel distributed conpensation). Second, the specification of the generation phases of the system architecture design, and eventually partitioning the application on heterogeneous platform based on hardware resource DSP and FPGA software to illustrate the proposed approach.
Volume: 4
Issue: 2
Page: 142-160
Publish at: 2015-07-01

Wide Band CPW Fed Slotted Microstrip Antenna

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1522
Pawan Kumar , Malay Ranjan Tripathy , H.P. Sinha
In this paper, a design of compact coplanar waveguide fed UWB slot antenna is presented. The proposed antenna has simple structure consisting rectangular slot with uneven coplanar ground structures. The proposed antenna structure is investigated by using MoM based electromagnetic solver IE3D. The simulation and measured results show that the antenna offers performance for wideband system from 4.5 GHz to11.8 GHz with return loss better than -10dB over the frequency spectrum with VSWR less than 2.5. The antenna configuration would be quiet useful for indoor applications. The antenna is fabricated and simulated. Measured results show a good agreement with simulated results. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8078 
Volume: 15
Issue: 1
Page: 114-119
Publish at: 2015-07-01

Real-Time Algorithms and Architectures for several user Channel Detection in Wireless Base Station Receivers

10.11591/ijres.v4.i2.pp82-98
Nitish Meena , Nilesh Parihar
In this paper presents algorithms and architecture designs that can meet real-time requirements of for several user channel estimation and detection in code-division multiple-access-based wireless base-station receivers. Entangled algorithms proposed to implement several user channel assessment and demodulation make their real-time execution difficult on current digital signal processor-based receivers. A based several user channel assessment scheme requiring matrix conversion is draft again from an demodulation perspective for a reduced intricacy, repetitive scheme with a simple fixed-point very large scale integration  architecture. A reduced-intricacy, bit-streaming several user demodulation algorithm that avoids the need for demodulation is also developed for a simple, pipelined VLSI architecture. Thus, we develop real-time solutions for several user channel assessment and demodulation for third-generation wireless systems by: 1) designing the algorithms from a fixed-point execution perspective, without significant loss in error rate performance; 2) task partitioning; and 3) designing bit-streaming fixed-point VLSI architectures that explore pipelining, correspondence, and bit-level computations to achieve real-time with minimum area overhead.
Volume: 4
Issue: 2
Page: 82-98
Publish at: 2015-07-01

An Efficient Framework for Floor-plan Prediction of Dynamic Runtime Reconfigurable Systems

10.11591/ijres.v4.i2.pp99-121
Ahmed Al-Wattar , Shawki Areibi , Gary Grewal
Several embedded application domains for reconfigurable systems tend to combine frequent changes with high performance demands of their workloads such as image processing, wearable computing andnetwork processors.  Time multiplexing of reconfigurable hardware resources raises a number of new issues, ranging from run-time systems to complex programming models that usually form a Reconfigurablehardware Operating System (ROS).  The Operating System performs online task scheduling and handles resource management.There are many challenges in adaptive computing and dynamic reconfigurable systems. One of the major understudied challengesis estimating the required resources in terms of soft cores, Programmable Reconfigurable Regions (PRRs), the appropriate communication infrastructure, and to predict a near optimal layout and floor-plan of the reconfigurable logic fabric. Some of these issues are specific to the application being designed, while others are more general and relate to the underlying run-time environment.Static resource allocation for Run-Time Reconfiguration (RTR) often leads to inferior and unacceptable results. In this paper, we present a novel adaptive and dynamic methodology, based on a Machine Learning approach, for predicting andestimating the necessary resources for an application based on past historical information.An important feature of the proposed methodology is that the system is able to learn and generalize and, therefore, is expected to improve its accuracy over time.  The goal of the entire process is to extract useful hidden knowledge from the data. This knowledge is the prediction and estimation of the necessary resources for an unknown or not previously seen application.
Volume: 4
Issue: 2
Page: 99-121
Publish at: 2015-07-01

Design and Implementation of Multichannel Data Acquisition and Processing System Using LabVIEW

10.11591/ijres.v4.i2.pp55-62
Dhruva R. Rinku , Gundu Srinath
The data acquisition and processing architecture covers the most demanding applications of continuousmonitoring in industrial field. The multichannel data acquisition is essential for acquiring and monitoring the various signals from industrial sensors. The problem is that the data storage and hardware size, so the multichannel data obtained is processed at runtime and stored in an external storage for future reference. The method of implementing the proposed design is by using the ARM Cortex M-3 Processor to reduce the hardware size. The Cortex M-3 attains high resolution. A Eight channel data acquisition processing (DAQP) and Controlling was designed, developed using the Lab VIEW graphical programming. The module was designed in order to provide high accuracy, storage and portability. The system designed is not specific for any sensor acquisition, so any sensor having signal conditioning circuit built can be connected to the DAQ (Data Acquisition System). ARM controller is used as heart of the DAQ.
Volume: 4
Issue: 2
Page: 55-62
Publish at: 2015-07-01
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