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28,593 Article Results

Wide Band CPW Fed Slotted Microstrip Antenna

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1522
Pawan Kumar , Malay Ranjan Tripathy , H.P. Sinha
In this paper, a design of compact coplanar waveguide fed UWB slot antenna is presented. The proposed antenna has simple structure consisting rectangular slot with uneven coplanar ground structures. The proposed antenna structure is investigated by using MoM based electromagnetic solver IE3D. The simulation and measured results show that the antenna offers performance for wideband system from 4.5 GHz to11.8 GHz with return loss better than -10dB over the frequency spectrum with VSWR less than 2.5. The antenna configuration would be quiet useful for indoor applications. The antenna is fabricated and simulated. Measured results show a good agreement with simulated results. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8078 
Volume: 15
Issue: 1
Page: 114-119
Publish at: 2015-07-01

Real-Time Algorithms and Architectures for several user Channel Detection in Wireless Base Station Receivers

10.11591/ijres.v4.i2.pp82-98
Nitish Meena , Nilesh Parihar
In this paper presents algorithms and architecture designs that can meet real-time requirements of for several user channel estimation and detection in code-division multiple-access-based wireless base-station receivers. Entangled algorithms proposed to implement several user channel assessment and demodulation make their real-time execution difficult on current digital signal processor-based receivers. A based several user channel assessment scheme requiring matrix conversion is draft again from an demodulation perspective for a reduced intricacy, repetitive scheme with a simple fixed-point very large scale integration  architecture. A reduced-intricacy, bit-streaming several user demodulation algorithm that avoids the need for demodulation is also developed for a simple, pipelined VLSI architecture. Thus, we develop real-time solutions for several user channel assessment and demodulation for third-generation wireless systems by: 1) designing the algorithms from a fixed-point execution perspective, without significant loss in error rate performance; 2) task partitioning; and 3) designing bit-streaming fixed-point VLSI architectures that explore pipelining, correspondence, and bit-level computations to achieve real-time with minimum area overhead.
Volume: 4
Issue: 2
Page: 82-98
Publish at: 2015-07-01

An Efficient Framework for Floor-plan Prediction of Dynamic Runtime Reconfigurable Systems

10.11591/ijres.v4.i2.pp99-121
Ahmed Al-Wattar , Shawki Areibi , Gary Grewal
Several embedded application domains for reconfigurable systems tend to combine frequent changes with high performance demands of their workloads such as image processing, wearable computing andnetwork processors.  Time multiplexing of reconfigurable hardware resources raises a number of new issues, ranging from run-time systems to complex programming models that usually form a Reconfigurablehardware Operating System (ROS).  The Operating System performs online task scheduling and handles resource management.There are many challenges in adaptive computing and dynamic reconfigurable systems. One of the major understudied challengesis estimating the required resources in terms of soft cores, Programmable Reconfigurable Regions (PRRs), the appropriate communication infrastructure, and to predict a near optimal layout and floor-plan of the reconfigurable logic fabric. Some of these issues are specific to the application being designed, while others are more general and relate to the underlying run-time environment.Static resource allocation for Run-Time Reconfiguration (RTR) often leads to inferior and unacceptable results. In this paper, we present a novel adaptive and dynamic methodology, based on a Machine Learning approach, for predicting andestimating the necessary resources for an application based on past historical information.An important feature of the proposed methodology is that the system is able to learn and generalize and, therefore, is expected to improve its accuracy over time.  The goal of the entire process is to extract useful hidden knowledge from the data. This knowledge is the prediction and estimation of the necessary resources for an unknown or not previously seen application.
Volume: 4
Issue: 2
Page: 99-121
Publish at: 2015-07-01

Design and Implementation of Multichannel Data Acquisition and Processing System Using LabVIEW

10.11591/ijres.v4.i2.pp55-62
Dhruva R. Rinku , Gundu Srinath
The data acquisition and processing architecture covers the most demanding applications of continuousmonitoring in industrial field. The multichannel data acquisition is essential for acquiring and monitoring the various signals from industrial sensors. The problem is that the data storage and hardware size, so the multichannel data obtained is processed at runtime and stored in an external storage for future reference. The method of implementing the proposed design is by using the ARM Cortex M-3 Processor to reduce the hardware size. The Cortex M-3 attains high resolution. A Eight channel data acquisition processing (DAQP) and Controlling was designed, developed using the Lab VIEW graphical programming. The module was designed in order to provide high accuracy, storage and portability. The system designed is not specific for any sensor acquisition, so any sensor having signal conditioning circuit built can be connected to the DAQ (Data Acquisition System). ARM controller is used as heart of the DAQ.
Volume: 4
Issue: 2
Page: 55-62
Publish at: 2015-07-01

Control of Indirect Matrix Converter by Using Improved SVM Method

10.11591/ijpeds.v6.i2.pp370-375
Lavanya Nannapaneni , Venu Gopala Rao
A novel space vector modulation (SVM) method for an indirect matrix converter (IMC) is used to reduce the common -mode voltage (CMV) in the output. The process of selecting required active vectors and to describe the switching sequence in the inverter stage of the IMC is explained in this paper. This novel SVM method used to decrease the peak -to-peak amplitude voltage of CMV without using any external hardware. The other advantage of this SVM method is to reduce the total harmonic distortion of line-to-line output voltage. This new modulation technique is easily implemented through simulation and its results are used to demonstrate the improved performance of the input/output waveforms.
Volume: 6
Issue: 2
Page: 370-375
Publish at: 2015-06-01

Vibration and Noise Analysis of 4Ф Switched Reluctance Motor Drive

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1492
Mekala N , Muniraj C , Ramesh Balaji S.M.
The Switched Reluctance Motor (SRM) is getting large attention for industry application due to their simple construction, high starting capabilities, high reliability, and high efficiency and also rotor carries no windings, no slip-rings there is no brushes, it requires less maintenance. In spite of the merits, it had some demerits like acoustic noise and vibration is one of major issues in SRM. The DSP-TMS320F28335 processor were implemented due to their high performance for the control applications.In this work the Random Pulse Width Modulation (RPWM) technique is used to reduce the acoustic noise and vibration by varying random turn on and turn off angle control.The acoustic noise and vibration signals are measured using accelerometer and sound level meter in 1HP, 8/6poles of SRM drive. The experimental analysis of vibration signals are measured using Lab VIEW at different speeds and load conditions. The acoustic noise signals are measured using Sound level meter .Both the Acoustic and vibrations are analyzed experimentally for different speeds and load conditions. The experimental results show that the noise and vibration analysis and also compare the sinusoidal PWM is better than Random PWM techniques. DOI: http://dx.doi.org/10.11591/telkomnika.v14i3.7965 
Volume: 14
Issue: 3
Page: 410-419
Publish at: 2015-06-01

A New Hybrid Artificial Neural Network Based Control of Doubly Fed Induction Generator

10.11591/ijece.v5i3.pp379-390
Venu Madhav Gopala , Obulesu Y.P.
In this paper, Hybrid Artificial Neural Network (ANN) with Proportional Integral (PI) control technique has been developed for Doubly Fed Induction Generator (DFIG) based wind energy generation system and the performance of the system is compared with NN and PI control techniques. With the increasing use of wind power generation, it is required to instigate the dynamic performance analysis of Doubly Fed Induction Generator under various operating conditions. In this paper, three control techniques have been proposed, the first one is using PI controller, the second one is ANN control, and the third one is based on combination of ANN and PI. The performance of the proposed control techniques is demonstrated through the results, determined by using MATLab/Simulink. From the results it is observed that the dynamic performance of the DFIG is improved with the Hybrid control technique.
Volume: 5
Issue: 3
Page: 379-390
Publish at: 2015-06-01

Vector Control of Three-Phase Induction Motor with Two Stator Phases Open-Circuit

10.11591/ijpeds.v6.i2.pp282-292
Seyed Hesam Asgari , Mohammad Jannati , Tole Sutikno , Nik Rumzi Nik Idris
Variable frequency drives are used to provide reliable dynamic systems and significant reduction in usage of energy and costs of the induction motors. Modeling and control of faulty or an unbalanced three-phase induction motor is obviously different from healthy three-phase induction motor. Using conventional vector control techniques such as Field-Oriented Control (FOC) for faulty three-phase induction motor, results in a significant torque and speed oscillation. This research presented a novel method for vector control of three-phase induction motor under fault condition (two-phase open circuit fault). The proposed method for vector control of faulty machine is based on rotor FOC method. A comparison between conventional and modified controller shows that the modified controller has been significantly reduced the torque and speed oscillations.
Volume: 6
Issue: 2
Page: 282-292
Publish at: 2015-06-01

Design and Realization of Multiplexing System for Fixed/Mobile Next-Generation Broadcasting Service in Network Free Environment

10.11591/ijece.v5i3.pp531-538
Y.J. Woo , K.W. Park , W.G. Jeon , J.H. Paik , G.M. Kang , K.W. Kwon
The Current broadcasting enviroment is constally evolving in order to meet the various needs of the viewer such as ColorTV, 3D, HD, UHD TV serivce.  And they want to broadcasting the same quality in the fixed and mobile enviroment for high definition braodcasting serive. In this paper, we presnet a design and implementation  of muilplexing  system for fixed/mobile next generation broadcasting service in network free enivorment. Network free means receive both the broadcasting channel and communication chennel for various TV service. We introduce method to provide next generation convergence broadcating servies based on european standard which can transmit UHD content in network free envieroment.  As a result to this paper, we analyze the characteristics of the recieved signal from the commerical receiver device.
Volume: 5
Issue: 3
Page: 531-538
Publish at: 2015-06-01

Improved Rejection Penalty Algorithm with Multiprocessor Rejection Technique

10.11591/ijece.v5i3.pp477-482
Prativa Satpathy , Kalyan Das , Jagamohan Padhi
This paper deals with multiprocessor scheduling with rejection technique where each job is provided with processing time and a given penalty cost. If the job satisfies the acceptance condition, it will schedule in the least loaded identical parallel machine else job is rejected. In this way its penalty cost is calculated. Our objective is to minimize the makespan of the scheduled job and to minimize the sum of the penalties of rejected jobs. We have merged ‘CHOOSE ‘and ‘REJECTION PENALTY’ algorithm to reduce the sum of penalties cost and makespan. Our proposed ‘Improved Reject penalty algorithm’ reduce competitive ratio, which in turn enhances the efficiency of the on-line algorithm. By applying our new on-line technique, we got the lower bound of our algorithm is is 1.286 which is far better from the existing algorithms whose competitive ratio is at 1.819. In our approach we have consider non-preemption scheduling technique.
Volume: 5
Issue: 3
Page: 477-482
Publish at: 2015-06-01

A Modified Bridgeless Converter for SRM Drive with Reduced Ripple Current

10.11591/ijpeds.v6.i2.pp362-369
Maheswari C krishnakumar , Rani Thottungal , Divya A.C
Single Phase Switched Reluctance Motor is more popular in many industrial purposes for high speed applications because of its robust and rugged construction. For low cost and variable speed drive applications SRM are widely used.Due to doubly salient structure of motor, the torque pulsations are high when compared to other sinusoidal machines. The major drawback in using SRM drive is torque pulsations and increased number of switching components. In order to overcome these drawbacks, a bridgeless Single Ended Primary Inductor Converter (SEPIC) is proposed. The major advantages of this converter are continuous output current,smaller voltage ripple and reduced semiconductor current stress when compared to the conventional SEPIC converter. The ripple free input current is obtained by using additional winding of input inductor and auxiliary capacitors. To achieve high efficiency, active power factor correction circuits (PFC) are employed to precise the power factor. Further, the unity power factor can be obtained by making the input current during switching period proportional to the input voltage is proposed. The proposed system consists of reduced components and it is also capable of reducing the conduction losses. The working principles and the waveforms of proposed converter are analyzed. To analyze the circuit operation, theoretical analysis and simulation results are provided. Finally, the  comparison between the waveforms of conventional SEPIC and proposed system is presented by using MATLAB/Simulink tools.
Volume: 6
Issue: 2
Page: 362-369
Publish at: 2015-06-01

Investigations on Capacitor Compensation Topologies Effects of Different Inductive Coupling Links Configurations

10.11591/ijpeds.v6.i2.pp274-281
Norezmi Jamal , Shakir Saat , Y. Yusmarnita , Thoriq Zaid , A. A. M. Isa
This paper presents investigations on capacitor compensation topologies with different inductive coupling links for loosely coupled inductive power transfer (IPT) system. In general, the main constraint of the loosely coupled IPT system is power losses due to the large leakage inductances. Therefore, to overcome the aforementioned problem, in this work, capacitor compensation is proposed to be used by adding an external capacitor to the system. By using this approach, the resonant inductive coupling can be achieved efficiently and hence the efficiency of the system is also increased significantly. This paper analyzes the performance of two different compensation topologies, which are primary series-secondary series (SS) and primary series- secondary parallel (SP) topology. The performance of such topologies is evaluated through the experimental results at 1MHz operating frequency for different types of inductive coupling. From the results, SS topology produces a high power transfer but SP topology gives better efficiency.
Volume: 6
Issue: 2
Page: 274-281
Publish at: 2015-06-01

Automatic Modulation Recognition for MFSK Using Modified Covariance Method

10.11591/ijece.v5i3.pp429-435
Hanan M.Hamee , Jafer Wadi
This paper presents modulation classification method capable of classifyingMFSK digital signals without a priori information using modified covariancemethod. This method using for calculation features for FSK modulationshould have a good properties of sensitive with FSK modulation index andinsensitive with signal to noise ratio SNR variation. The numericalsimulations and investigation of the performance by the support vectorsmachine one against all (SVM-OAA) as a classifier for classifying 6 digitallymodulated signals which gives probability of correction classification up to85.85 at SNR=-15dB.
Volume: 5
Issue: 3
Page: 429-435
Publish at: 2015-06-01

Fingerprint Authentication Schemes for Mobile Devices

10.11591/ijece.v5i3.pp579-585
Jinho Han
In certain applications, fingerprint authentication systems require templates to be stored in databases. The possible leakage of these fingerprint templates can lead to serious security and privacy threats. Therefore, with the frequent use of fingerprint authentication on mobile devices, it has become increasingly important to keep fingerprint data safe. Due to rapid developments in optical equipment, biometric systems are now able to gain the same biometric images repeatedly, so strong features can be selected with precision. Strong features refer to high-quality features which can be easily distinguished from other features in biometric raw images. In this paper, we introduce an algorithm that identifies these strong features with certain probability from a given fingerprint image. Once values are extracted from these features, they are used as the authentication data. Using the geometric information of these strong features, a cancelable fingerprint template can be produced, and the process of extracting values and geometric information is further explained. Because this is a light-weight authentication scheme, this template has practical usage for low performance mobile devices. Finally, we demonstrate that our proposed schemes are secure and that the user’s biometric raw data of the fingerprint are safe, even when the mobile device is lost or stolen.
Volume: 5
Issue: 3
Page: 579-585
Publish at: 2015-06-01

Power Factor Correction in Two Leg Inverter Fed BLDC Drive Using Cuk Dc-Dc Converter

10.11591/ijpeds.v6.i2.pp196-204
A. Purna Chandra Rao , Y.P. Obulesh , Ch. Sai Babu
Earlier for variable speed application conventional motors were used, but these motors have poor characteristics. These drawbacks were overcome by brushless Dc motor drive. Now days in most of the applications such as industrial, domestic, aerospace, defense, medical and traction etc, brushless DC motor (BLDCM) is popular for its high efficiency, high torque to weight ratio, small size, and high reliability, ease of control and low maintenance etc. BLDC motor is a electronic commutator driven drive i.e. it uses a three-phase voltage source inverter for its operation, electronic devices means there is a problem of poor power quality, more torque ripple and speed fluctuations. This paper deals with the CUK converter two leg inverter fed BLDCM drive in closed loop operation. The proposed control strategy on CUK converter two leg inverter fed BLDCM drive with split DC source is modeled and implemented using MATLAB / Simulink. The proposed method improves the efficiency of the drive system with Power factor correction feature in wide range of the speed control, less torque ripple and smooth speed control.
Volume: 6
Issue: 2
Page: 196-204
Publish at: 2015-06-01
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