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25,002 Article Results

FPGA Synthesis of Reconfigurable Modules for FIR Filter

10.11591/ijres.v4.i2.pp63-70
Saranya R , Pradeep C , Neena Baby , Radhakrishnan R
Reconfigurable computing for DSP remains an active area to explore as the need for incorporation with more conventional DSP technologies turn out to be obvious. Conventionally, the majority of the work in the area of reconfigurable computing is aimed on fine grained FPGA devices. Over the years, the focus is shifted from bit level granularity to a coarse grained composition. FIR filter remains and persist to be an important building block in various DSP systems. It computes the output by multiplying input samples with a set of coefficients followed by addition. Here multipliers and adders are modeled using the concept of divide and conquer. For developing a reconfiguarble FIR filter, different tap filters are designed as separate reconfigurable modules. Furthermore, there is an additional concern for making the system fault tolerant. A fault detection mechanism is introduced to detect the faults based on the nature of operands. The reconfigurable modules are structurally modeled in Verilog HDL and simulated and synthesized using Xilinx ISE 14.2. A comparison of the device utilization of reconfigurable modules is also presented in this paper by implementing the design on various Virtex FPGA devices.
Volume: 4
Issue: 2
Page: 63-70
Publish at: 2015-07-01

Energy Efficient Intrusion Detection Scheme with Clustering for Wireless Sensor Networks

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1524
Mohammed Ali Hussain
Wireless sensor network (WSN) consists of a small size sensor nodes depends on battery power. Applications of sensor networks are street lighting, home automation, industrial plant, environmental parameters, health care and military. Security is becoming a major concept in the design of wireless sensor networks. Attacks on sensor networks include attack on confidentiality, integrity and availability. Lack of confidentiality means that the secret information is revealed to attackers. Lack of integrity means that the attacker modifies the contents (data) communicated in the sensor network. Lack of availability means the resources in the network is not available to authorized users. So to avoid these problems we need better security measures. In this paper we are dealing with intrusion detection. Intrusion detection plays an important role in the design of wireless sensor networks. An intruder can perform various attacks like replay, interception, worm hole, sink hole attacks. So our aim in this paper is to find such intrusions as early as possible, when they occurred and to enhance the life tome of the sensor network. This is because sensors nodes depend only on battery power. Our intrusion detection is based on clustering of the sensor network. This makes routing process, medium control and intrusion detection simple. DOI:  http://dx.doi.org/10.11591/telkomnika.v15i1.8072 
Volume: 15
Issue: 1
Page: 128-141
Publish at: 2015-07-01

An Integrated Architectural Clock Implemented Memory Design for Embedded System

10.11591/ijres.v4.i2.pp129-141
Ravi Khatwal , Manoj Kumar Jain
Recently Low power custom memory design is the major issue for embedded designer. Micro wind and Xilinx simulator performs efficient cache simulation and high performances with low power consumption. SRAM efficiency analyzed with 6-T architecture design and analyzed the simulation performance for specific application. We have implemented clock based memory architecture design and analyzed internal clock efficiency for SRAM. Architectural clock implemented memory design that reduces access time and propagation delay time for embedded devices. Internal semiconductor material improvement increases simulation performance and these design implemented for application specific design architecture.
Volume: 4
Issue: 2
Page: 129-141
Publish at: 2015-07-01

Design of Secure Transmission of Multimedia Data Using SRTP on Linux Platform

10.11591/ijres.v4.i2.pp71-81
Shashidhar H.G. , Sanket Dessai , Shilpa Chaudhari
This paper aims for providing a viable solution for security in streaming media technology. Service providers do not want the end users to capture and duplicate streaming media data. Once captured data can be re-distributed to millions without any control from the source.  Licensing issues also dictate the number of times end user may utilize the data. Encryption is not sufficient as it leaves the system vulnerable to duplication and recording after decryption. In this paper an attempt has been made to transmit digital multimedia data to multiple users. The transmission of the video/audio data has been attempted from one PC to another PC. While doing this, security considerations have to be taken care by using suitable encryption/decryption techniques.  A research carried out on the different data transmission protocols reveals that the Secure Real Time Transport Protocol (SRTP) is one of the best available protocols. Hence the SRTP has been deployed in this project on Linux OS using socket programming. The code for the transmitter and the receiver is designed and developed around the SRTP library for transmission of multimedia data.  The solution is illustrated by choosing an example of a video clip for transmission and reception. This model increasing the security of streaming media and adds a measure of integrity protection, but it is primarily intended to aid in replay preventions.
Volume: 4
Issue: 2
Page: 71-81
Publish at: 2015-07-01

Application of New Approach of design flow for Hardware/Software Embedded System with the Use of Design Patterns in Fuzzy control system

10.11591/ijres.v4.i2.pp142-160
Ali Bouyahya , Yassine Manai , Joseph Haggège
This paper present a new method of conception of hardware/software embedded system design methodology based on use of design pattern approach called Abstract_factory. We called this new design tool “smart cell”. The main idea of the conception of embedded systems design is based on the used of object-oriented design ULM2.0. When the smart-cell is implemented, we justify their uses as a design tool that allows, first, to develop a specified application of fuzzy controller called PDC (parallel distributed conpensation). Second, the specification of the generation phases of the system architecture design, and eventually partitioning the application on heterogeneous platform based on hardware resource DSP and FPGA software to illustrate the proposed approach.
Volume: 4
Issue: 2
Page: 142-160
Publish at: 2015-07-01

Wide Band CPW Fed Slotted Microstrip Antenna

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1522
Pawan Kumar , Malay Ranjan Tripathy , H.P. Sinha
In this paper, a design of compact coplanar waveguide fed UWB slot antenna is presented. The proposed antenna has simple structure consisting rectangular slot with uneven coplanar ground structures. The proposed antenna structure is investigated by using MoM based electromagnetic solver IE3D. The simulation and measured results show that the antenna offers performance for wideband system from 4.5 GHz to11.8 GHz with return loss better than -10dB over the frequency spectrum with VSWR less than 2.5. The antenna configuration would be quiet useful for indoor applications. The antenna is fabricated and simulated. Measured results show a good agreement with simulated results. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8078 
Volume: 15
Issue: 1
Page: 114-119
Publish at: 2015-07-01

Real-Time Algorithms and Architectures for several user Channel Detection in Wireless Base Station Receivers

10.11591/ijres.v4.i2.pp82-98
Nitish Meena , Nilesh Parihar
In this paper presents algorithms and architecture designs that can meet real-time requirements of for several user channel estimation and detection in code-division multiple-access-based wireless base-station receivers. Entangled algorithms proposed to implement several user channel assessment and demodulation make their real-time execution difficult on current digital signal processor-based receivers. A based several user channel assessment scheme requiring matrix conversion is draft again from an demodulation perspective for a reduced intricacy, repetitive scheme with a simple fixed-point very large scale integration  architecture. A reduced-intricacy, bit-streaming several user demodulation algorithm that avoids the need for demodulation is also developed for a simple, pipelined VLSI architecture. Thus, we develop real-time solutions for several user channel assessment and demodulation for third-generation wireless systems by: 1) designing the algorithms from a fixed-point execution perspective, without significant loss in error rate performance; 2) task partitioning; and 3) designing bit-streaming fixed-point VLSI architectures that explore pipelining, correspondence, and bit-level computations to achieve real-time with minimum area overhead.
Volume: 4
Issue: 2
Page: 82-98
Publish at: 2015-07-01

An Efficient Framework for Floor-plan Prediction of Dynamic Runtime Reconfigurable Systems

10.11591/ijres.v4.i2.pp99-121
Ahmed Al-Wattar , Shawki Areibi , Gary Grewal
Several embedded application domains for reconfigurable systems tend to combine frequent changes with high performance demands of their workloads such as image processing, wearable computing andnetwork processors.  Time multiplexing of reconfigurable hardware resources raises a number of new issues, ranging from run-time systems to complex programming models that usually form a Reconfigurablehardware Operating System (ROS).  The Operating System performs online task scheduling and handles resource management.There are many challenges in adaptive computing and dynamic reconfigurable systems. One of the major understudied challengesis estimating the required resources in terms of soft cores, Programmable Reconfigurable Regions (PRRs), the appropriate communication infrastructure, and to predict a near optimal layout and floor-plan of the reconfigurable logic fabric. Some of these issues are specific to the application being designed, while others are more general and relate to the underlying run-time environment.Static resource allocation for Run-Time Reconfiguration (RTR) often leads to inferior and unacceptable results. In this paper, we present a novel adaptive and dynamic methodology, based on a Machine Learning approach, for predicting andestimating the necessary resources for an application based on past historical information.An important feature of the proposed methodology is that the system is able to learn and generalize and, therefore, is expected to improve its accuracy over time.  The goal of the entire process is to extract useful hidden knowledge from the data. This knowledge is the prediction and estimation of the necessary resources for an unknown or not previously seen application.
Volume: 4
Issue: 2
Page: 99-121
Publish at: 2015-07-01

Design and Implementation of Multichannel Data Acquisition and Processing System Using LabVIEW

10.11591/ijres.v4.i2.pp55-62
Dhruva R. Rinku , Gundu Srinath
The data acquisition and processing architecture covers the most demanding applications of continuousmonitoring in industrial field. The multichannel data acquisition is essential for acquiring and monitoring the various signals from industrial sensors. The problem is that the data storage and hardware size, so the multichannel data obtained is processed at runtime and stored in an external storage for future reference. The method of implementing the proposed design is by using the ARM Cortex M-3 Processor to reduce the hardware size. The Cortex M-3 attains high resolution. A Eight channel data acquisition processing (DAQP) and Controlling was designed, developed using the Lab VIEW graphical programming. The module was designed in order to provide high accuracy, storage and portability. The system designed is not specific for any sensor acquisition, so any sensor having signal conditioning circuit built can be connected to the DAQ (Data Acquisition System). ARM controller is used as heart of the DAQ.
Volume: 4
Issue: 2
Page: 55-62
Publish at: 2015-07-01

Symbol Error Rate Performance Analysis of Decode and Forward Cooperative Communication System

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1523
Qabas Ali Hikmat , Bin Dai , Rokan Khaji , Benxiong Huang , Edriss Eisa
In this paper, we investigate the performance of Decode and Forward (DF) in multiple relay networks. We consider a cooperative diversity system where a source sends information to the destination with the aid of multi relay working in DF relaying protocol and investigate the Optimal Power Allocation (OPA) at both the source and the relay nodes. By taking advantage of the moment generating function (MGF), a closed form expression for the symbol error rate (SER) and signal to noise ratio (SNR) for both, M-Phase Shift Keying (MPSK) and M-Quadrature Amplitude Modulation (MQAM) signals has been derived to illustrate the asymptotic performance of the DF system where the approximation SER is tight at high SNR. Results show that the proposed system, based on SER lower bound is tight to the theoretical SER upper bound, and the suggested OPA outperforms the equal power allocation (EPA) and at different number of relays. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8037
Volume: 15
Issue: 1
Page: 120-127
Publish at: 2015-07-01

Control of Indirect Matrix Converter by Using Improved SVM Method

10.11591/ijpeds.v6.i2.pp370-375
Lavanya Nannapaneni , Venu Gopala Rao
A novel space vector modulation (SVM) method for an indirect matrix converter (IMC) is used to reduce the common -mode voltage (CMV) in the output. The process of selecting required active vectors and to describe the switching sequence in the inverter stage of the IMC is explained in this paper. This novel SVM method used to decrease the peak -to-peak amplitude voltage of CMV without using any external hardware. The other advantage of this SVM method is to reduce the total harmonic distortion of line-to-line output voltage. This new modulation technique is easily implemented through simulation and its results are used to demonstrate the improved performance of the input/output waveforms.
Volume: 6
Issue: 2
Page: 370-375
Publish at: 2015-06-01

Vibration and Noise Analysis of 4Ф Switched Reluctance Motor Drive

https://ijeecs.iaescore.com/index.php/IJEECS/article/view/1492
Mekala N , Muniraj C , Ramesh Balaji S.M.
The Switched Reluctance Motor (SRM) is getting large attention for industry application due to their simple construction, high starting capabilities, high reliability, and high efficiency and also rotor carries no windings, no slip-rings there is no brushes, it requires less maintenance. In spite of the merits, it had some demerits like acoustic noise and vibration is one of major issues in SRM. The DSP-TMS320F28335 processor were implemented due to their high performance for the control applications.In this work the Random Pulse Width Modulation (RPWM) technique is used to reduce the acoustic noise and vibration by varying random turn on and turn off angle control.The acoustic noise and vibration signals are measured using accelerometer and sound level meter in 1HP, 8/6poles of SRM drive. The experimental analysis of vibration signals are measured using Lab VIEW at different speeds and load conditions. The acoustic noise signals are measured using Sound level meter .Both the Acoustic and vibrations are analyzed experimentally for different speeds and load conditions. The experimental results show that the noise and vibration analysis and also compare the sinusoidal PWM is better than Random PWM techniques. DOI: http://dx.doi.org/10.11591/telkomnika.v14i3.7965 
Volume: 14
Issue: 3
Page: 410-419
Publish at: 2015-06-01

A New Hybrid Artificial Neural Network Based Control of Doubly Fed Induction Generator

10.11591/ijece.v5i3.pp379-390
Venu Madhav Gopala , Obulesu Y.P.
In this paper, Hybrid Artificial Neural Network (ANN) with Proportional Integral (PI) control technique has been developed for Doubly Fed Induction Generator (DFIG) based wind energy generation system and the performance of the system is compared with NN and PI control techniques. With the increasing use of wind power generation, it is required to instigate the dynamic performance analysis of Doubly Fed Induction Generator under various operating conditions. In this paper, three control techniques have been proposed, the first one is using PI controller, the second one is ANN control, and the third one is based on combination of ANN and PI. The performance of the proposed control techniques is demonstrated through the results, determined by using MATLab/Simulink. From the results it is observed that the dynamic performance of the DFIG is improved with the Hybrid control technique.
Volume: 5
Issue: 3
Page: 379-390
Publish at: 2015-06-01

Vector Control of Three-Phase Induction Motor with Two Stator Phases Open-Circuit

10.11591/ijpeds.v6.i2.pp282-292
Seyed Hesam Asgari , Mohammad Jannati , Tole Sutikno , Nik Rumzi Nik Idris
Variable frequency drives are used to provide reliable dynamic systems and significant reduction in usage of energy and costs of the induction motors. Modeling and control of faulty or an unbalanced three-phase induction motor is obviously different from healthy three-phase induction motor. Using conventional vector control techniques such as Field-Oriented Control (FOC) for faulty three-phase induction motor, results in a significant torque and speed oscillation. This research presented a novel method for vector control of three-phase induction motor under fault condition (two-phase open circuit fault). The proposed method for vector control of faulty machine is based on rotor FOC method. A comparison between conventional and modified controller shows that the modified controller has been significantly reduced the torque and speed oscillations.
Volume: 6
Issue: 2
Page: 282-292
Publish at: 2015-06-01

Design and Realization of Multiplexing System for Fixed/Mobile Next-Generation Broadcasting Service in Network Free Environment

10.11591/ijece.v5i3.pp531-538
Y.J. Woo , K.W. Park , W.G. Jeon , J.H. Paik , G.M. Kang , K.W. Kwon
The Current broadcasting enviroment is constally evolving in order to meet the various needs of the viewer such as ColorTV, 3D, HD, UHD TV serivce.  And they want to broadcasting the same quality in the fixed and mobile enviroment for high definition braodcasting serive. In this paper, we presnet a design and implementation  of muilplexing  system for fixed/mobile next generation broadcasting service in network free enivorment. Network free means receive both the broadcasting channel and communication chennel for various TV service. We introduce method to provide next generation convergence broadcating servies based on european standard which can transmit UHD content in network free envieroment.  As a result to this paper, we analyze the characteristics of the recieved signal from the commerical receiver device.
Volume: 5
Issue: 3
Page: 531-538
Publish at: 2015-06-01
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