Design and implementation of embedded concurrent laser missile jammer system using FPGA
10.11591/ijeecs.v14.i2.pp780-787
Chin Beng. Lim
,
Muataz H. Salih
In real time system, every second takes into count as any extra delay could cause critical consequences. Nowadays, almost every system involving multiple data processing. To handle multiple data at the same time, spatial parallelism is required to enhance system performance and provide multitasking feature. Currently, frequency jamming system only can jam one signal at a time. When it comes to missile jamming, the delaying in processing the frequency could cause serious impact as there will be multiple missiles launched to hit a target. These missiles just need few seconds to hit the target within range. Laser missile jammer is designed, which can jam multiple missiles at a time from different directions. The potentials of Field Programmable Gate Array (FPGA) and spatial parallelism is used in this system, to enhance the performance of the system by increasing operating frequency, system throughput, decreasing system cost, power consumption of the system, and get lower complexity. Quartus II version 14.1 is used in this project as a development CAD tool, the entire system implemented on FPGA DE1-SoC board. Also, other components such as Laser Detector, Laser Transmitter, and monitoring screen is integrated with the board. A signal emulator module was designed, to generate signals for on-board self-testing purpose, this system can detect the frequency of laser missile and create an over-powered signal with similar frequency to jam the missile(s) through diffused plates. All the results are shown on control display. This system had achieved a better throughput and lower complexity in terms of less resource usage (3153 Logic Elements) and high operating frequency (up to 1.6 GHz).
