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31,377 Article Results

Implementation of a camera system using nios II on the altera DE2-70 board

10.11591/ijeecs.v14.i2.pp513-522
Chan Boon Cheng , Asral Bahari Jambek
The implementation of a camera system with a field programmable gate array (FPGA) is an important step within research towards constructing a video processing architecture design based on FPGA. This paper presents the design and implementation of a camera system using the Nios II soft-core embedded processor from Altera. The proposed camera system is a flexible platform for the implementation of other systems such as image processing and video processing. The system architecture is designed using the Quartus II SOPC Builder System and implemented on an Altera DE2-70 development platform. The image or video is captured using a Terasic TRDB-D5M camera and stored into two different synchronous dynamic random access memories (SDRAM) using an SDRAM Controller. The specifications of the Terasic TRDB-D5M and SDRAM are examined to confirm that the recorded and stored data match. The results of this experiment show that the system is able to record and store data correctly into SDRAM. The data in the SDRAM correctly displays the recorded image on a VGA monitor.
Volume: 14
Issue: 2
Page: 513-522
Publish at: 2019-05-01

Design of on-chip temperature-based digital signal processing for customized wireless microcontroller

10.11591/ijeecs.v14.i2.pp653-660
S.F. R. Faezal , M. N. Isa , S. Taking , S. N. Mohyar , A. B. Jambek , A. Harun
Dramatic rises in power density and die sizes inside system-on-chip (SoC) design have led to the thermal issue. High temperatures or uneven temperature distributions may result not only in reliability issues, also has become the biggest issue that can limit the system performance.  This paper presents the design and simulation of a temperature-based digital signal processing unit for modern system-on-chip design using the Verilog HDL. This design provides continuous monitoring of temperature and reacts to specified conditions. The simulation of the system has been done on Synopsys Software. The result showed that temperature monitoring process is within the temperature range due to the incorporation of an interrupt-based system and with an advantage of minimum chip area required.
Volume: 14
Issue: 2
Page: 653-660
Publish at: 2019-05-01

Optimal design of single-phase 12S-6P FEFSM using segmental rotor and non-overlap windings

10.11591/ijeecs.v14.i2.pp735-743
Mohd Fairoz Omar , Erwan Sulaiman , Hassan Ali Soomro , Faisal Amin , Laili Iwani Jusoh , Enwelum I Mbadiwe
Recently, a three-phase Field Excitation Flux Switching Motor (FEFSM) using salient rotor has been introduced, suitable for high torque, high power as well as high speed diverse performances due to their advantages of easy rotor temperature elimination and controllable field excitation (FE) flux. However, existing FEFSMs are found to have low torque performance as the salient rotor structure has caused longer flux path, and consequently weak flux linkage. Therefore, a new structure of a single-phase FEFSM using segmental rotor and non-overlap windings is proposed. There are two valuable findings found in this topology, first is less copper loss due to the non-overlap windings between armature and FE coils, and secondly the segmental rotor structure has produces shorter flux path to produce high torque, less rotor weight as well as robust rotor at high speed condition. Flux linkage, back-emf, average torque and output power characteristics of the initial and optimized designs have been investigated and compared using 2D Finite Element Analysis (2D-FEA) through JMAG Designer version 15. Based on the 2D-FEA analysis, the average torque has increased by 81.3% to 1.65 Nm, while the output power of 466.5 W, increased of 68.2%. In conclusions, a FEFSM using segmental rotor and non-overlap windings is considered as the best single-phase motor due to their optimal performances and less copper loss.
Volume: 14
Issue: 2
Page: 735-743
Publish at: 2019-05-01

Performance assessment, in terms of ripples and power, of conventional and interleaved converter DC–DC with coupled and independent inductors dedicated to photovoltaic installations

10.11591/ijeecs.v14.i2.pp978-989
Brahim Lagssiyer , Aziz Abdelhak , Aziz Abdelhak , Mohamed El Hafyani , Mohamed El Hafyani
Our work focuses on the design and analysis of an interleaved Boost converter DC-DC with coupled and independent inductors in terms of ripples and power. An interleaving strategy is adopted to minimize the currents in the Boost components and consequently to miniaturize them. The command shift of the switch by the X.T value (X: shift coefficient 0<X<1 and T: period of the command signal), minimizes the ripple of the input current and output voltage and maximizes the power extracted from the photovoltaic system. The coupling technique of inductances of interleaved Boost, furthermore reduces the ripples of the input currents and further maximizes the power extracted from the photovoltaic panels. To determine the variation of the power extracted from the PV, according to the duty cycle D and the switches command shift X.T, the duty cycle, was manually varied (Similar to a MPPT command). For this we modeled, under MATLAB/Simulink, the photovoltaic system, the power interface (DC/DC Boost interleaved). Finally, a prototype of interleaved Boost converter with coupled inductors and a shifted control of the switches was realized. Experimental results have been proposed to validate the results of simulations.
Volume: 14
Issue: 2
Page: 978-989
Publish at: 2019-05-01

Comparative high-k material gate spacer impact in DG-FinFET parameter variations between two structures

10.11591/ijeecs.v14.i2.pp573-580
Ameer F. Roslan , F. Salehuddin , A.S. M. Zain , K.E. Kaharudin , I. Ahmad , H. Hazura , A.R. Hanim , S.K. Idris
This paper investigates the impact of the high-K material gate spacer on short channel effects (SCEs) for the 16 nm double-gate FinFET (DG-FinFET), where depletion-layer widths of the source-drain corresponds to the channel length. Virtual fabrication process along with design modification throughout the study and its electrical characterization is implemented and significant improvement is shown towards the altered structure design whereby in terms of the ratio of drive current against the leakage current (ION/IOFF ratio), all three materials tested being S3N4, HfO2 and TiO2 increases from the respective 60.90, 80.70 and 84.77 to 84.77, 91.54 and 92.69. That being said, the incremental in ratio has satisfied the incremental on the drive current as well as decreases the leakage current. Threshold voltage (VTH) for all dielectric materials have also satisfy the minimum requirement predicted by the International Technology Roadmap Semiconductor (ITRS) 2013 for which is at 0.461±12.7% V. Based on the results obtained, the high-K materials have shown a significant improvement, specifically after the modifications towards the Source/Drain. Compared to the initial design made, TiO2 has improved by 12.94% after the alteration made in terms of the overall ION and IOFF performances through the ION/IOFF ratio value obtained, as well as meeting the required value for VTH obtained at 0.464V. The ION from high-K materials has proved to meet the minimum requirement by ITRS 2013 for low performance Multi-Gate technology.
Volume: 14
Issue: 2
Page: 573-580
Publish at: 2019-05-01

Study of single layer microwave absorber based on rice husk Ash/CNTs composites

10.11591/ijeecs.v14.i2.pp929-936
Y.S. Lee , F.H. Wee , K.Y. You , Z. Liyana , C.Y Lee , Mas Elyna Azol , M.H. Ramli , H.S. Gan , M.S. Shakhirul , Nurulbariah Idris , E.M. Cheng
This paper presents the study of microwave absorption single layer microwave absorber based on rice husk ash (RHA) with additional carbon nanotubes (CNTs) filler loading into the composites. The relative permittivity of RHA and CNTs composites (RHA/CNTs) were measured by using Agilent high temperature probe and 85070E software. The CST-MWS software is used to design and evaluate the microwave absorption of RHA and RHA/CNTs with metal backed plate. The microwave absorption of simulated and measured results is compared. The RHA microwave absorber only absorbed maximum, -8 dB at 10.8 GHz of the incident electromagnetic radiation and the RHA/CNTs absorbed less than -15 dB with wider bandwidth over 10.8 GHz to 12.8 GHz compare with RHA composites single layer microwave absorber. The results indicated that the RHA/CNTs composites have enhanced the microwave absorption of RHA composites.
Volume: 14
Issue: 2
Page: 929-936
Publish at: 2019-05-01

Energy efficient clustereing method for wireless sensor network

10.11591/ijeecs.v14.i2.pp1039-1048
Chaitra HV , Dr. Ravikumar G.K
Wireless sensor has attained wide interest across various industries due to availability of low cost sensor device. Preserving battery/energy of these sensor device is most desired. Recently, many approaches has been presented to improve lifetime of sensor network adopting clustering technique. Cluster head selection play an important factor in improving lifetime of cluster based network. For improving cluster head selection multi-objective function are presented in recent time by adopting evolutionary computing and metaheuristic algorithm. However, the existing model incurs computation overhead due to NP-Hard problem and connectivity issues is not considered. Thus affecting network performance. To address the research issues, this work present a novel Multi-objective imperialist competitive algorithm (MOICA) for cluster head selection and routing optimization. Experiment are conducted to evaluate the performance of MOICA over LEACH in term of lifetime performance considering first sensor node death and 75% sensor node death. The outcome shows MOICA achieves significance improvement over LEACH based protocols. 
Volume: 14
Issue: 2
Page: 1039-1048
Publish at: 2019-05-01

Computer aided system for lymphoblast classification to detect acute lymphoblastic leukemia

10.11591/ijeecs.v14.i2.pp597-607
Syadia Nabilah Mohd Safuan , Mohd Razali Md Tomari , Wan Nurshazwani Wan Zakaria , Mohd Norzali Haji Mohd , Nor Surayahani Suriani
Acute lymphoblastic leukemia (ALL) is a disease that is detected by the presence of lymphoblast cell. Basically, lymphoblast cell is the abnormal cell of lymphocyte which is one of the White Blood Cell (WBC) types. Early prevention is suggested as this disease can be fatal and caused death. Traditionally, ALL is detected by using manual analysis which is challenging and time consuming. It can also yield inaccurate result as it is highly dependent on the pathologist’s skills. Industry has come out with hematology counter which is fast, accurate and automated. However, these machines are costly and cannot be afforded by some countries. For that reason, Computer Aided System (CAS) will be a great help to the pathologist for assisting purposes and it also can act as second opinion for the pathologist. This system contains six main steps which are color space correction, WBC segmentation, post processing, clumped area extraction, feature extraction and lymphoblast classification. Firstly, color space correction is apply by using l*a*b* color space to standardize the image’s intensity. Next, WBC segmentation is made to prune out WBC region using color space analysis with Otsu thresholding. However, segmented image contains noises that need to be eliminated and it is accomplished by applying morphological filter with Connected Component Labelling (CCL). There is an overlapping WBC which need to be separated by using Watershed method to extract the individual cells. Next, feature extraction is made to collect the cell’s data to be fed into the classifier. Classifier used in this system to classify lymphoblast is Support Vector Machine (SVM) and this system is able to achieve 96.69% of accuracy.
Volume: 14
Issue: 2
Page: 597-607
Publish at: 2019-05-01

A memristor-based chaotic-masking for analog spread-spectrum communication

10.11591/ijeecs.v14.i2.pp966-971
Muhammad Taher Abuelma’atti , Abdullah Yousef Alnafisa
This paper presents a simple chaotic-masking system. The system uses a chaos generator built around a grounded memristor. The memristor is emulated using the current-feedback operational amplifier (CFOA). At the sending end the signal is masked by adding chaos. At the receiving end the signal is recovered by subtracting the chaos. The performance of proposed system is investigated using sinusoidal and square wave signals.
Volume: 14
Issue: 2
Page: 966-971
Publish at: 2019-05-01

Performance evaluation of optical attocells configuration in an indoor visible light communication

10.11591/ijeecs.v14.i2.pp668-676
M.S. M. Gismalla , M.F. L. Abdullah
Visible light communication VLC is deemed as futuristic technology applied for both illumination and data communication due to the low-cost energy consumption, long life expectancy, huge bandwidth, and high security compared to radio frequency RF. Uncovered area, minimum signal-to-noise ratio (SNR) and received power results from the non-uniform distribution of small base stations (i.e. Optical attocells) in the room. In this paper, the researchers propose a new LEDs distribution of five optical attocells configuration model in order to optimize the received power distribution and SNR at the center of the room for indoor VLC system. The optical attocells configuration in terms of received power to fill the uncovered area at the center of the room has been investigated. The simulation results showed that the proposed attocells configuration saved 24.9% of the transmitted power. Besides that, the whole room was covered uniformly.  As a result, the received power and SNR are improved.
Volume: 14
Issue: 2
Page: 668-676
Publish at: 2019-05-01

Optimization of high-k composite dielectric materials of variable oxide thickness tunnel barrier for nonvolatile memory

10.11591/ijeecs.v14.i2.pp765-772
Farah A.Hamid , Afiq Hamzah , N. Ezaila Alias , Razali Ismail
Downscaling the tunnel oxide thickness has become one of the innovative solutions to minimize the operational voltage with better the programming/erasing (P/E) operation time. However, the downscaling technique faces several challenges where the conventional SiO2 tunnel layer has reached its limit. But a practical alternative has been introduced; Variable Oxide Thickness (VARIOT) technology in flash memory has been promising. VARIOT is one of tunnel barrier engineering technology for incorporating the high-k dielectric materials as a composite tunnel barrier. This paper presents the VARIOT concept to determine the optimum set of combination, the equivalent oxide thickness (EOT) and the low-k oxide thickness (Tox) for alternate high-k materials. Fowler-Nordheim (F-N) tunneling coefficients are also extracted for various combinations of VARIOT, where in this work ZrO2, HfO2, Al2O3, La2O3, and Y2O3 are used. The VARIOT optimization is conducted using 3-Dimensional (3D) Silicon Nanowire Field-Effect-Transistor (SiNWFET) device structure and simulated in TCAD Simulation tools. From the simulation results, it has found out that the high-k materials of La2O3 asymmetric stack is the excellent dielectric material among four (4) other dielectric materials; ZrO2, HfO2, Al2O3 and Y2O3 for EOT=4nm and Tox=1nm. 
Volume: 14
Issue: 2
Page: 765-772
Publish at: 2019-05-01

Frequency selective surfaces on flexible thin plastic substrates

10.11591/ijeecs.v14.i2.pp819-825
N. A. F. M. Zainudin , S.N. Azemi , M.F. Jamlos , A.A. Al-Hadi , P.J. Soh
The capability of the flexible substrate of the frequency selective surface (FSS) to filter out particular frequency is discussed in this paper. A new type of FSS are applied using flexible thin plastic substrate to enhance the performance of the conventional FSS that lacks of flexibility and cannot be used in bending surface. A simulation based investigation shows that the diameter or length of the square has a significant effect on the band-stop selective characteristic of the FSS. The frequency response of the band-stop are at 2.45GHz that drop at -10dB.
Volume: 14
Issue: 2
Page: 819-825
Publish at: 2019-05-01

e-PADI: an iot-based paddy productivity monitoring and advisory system

10.11591/ijeecs.v14.i2.pp852-858
M.A.F. Ismail , M. N. Md. Isa , S. N. Mohyar , M.I. Ahmad , M. N. M. Ismail , R. C. Ismail , A. Harun , S.A.Z. Murad
Rice is source of food calories and protein.  This second most widely grown cereal crop is the staple food for more than half the world’s population especially in developing countries.  The ability of global rice production to meet population demands (now estimated at more than 5 billion and projected to rise to 8.9 billion by 2050) remains in uncertainty in the near future unless challenges in rice production are properly addressed [1-3]. This paper proposed an IoT (Internet of things)-based paddy productivity monitoring and advisory system Using Dash7 Wireless Network Protocol. All collected data will be stored in a database management system to enable users to retrieve data either from tablets, smartphones or computers. The heart of the system is the ATmega328p microcontroller that will control the payload of the wireless network of dash7 and read data from sensor nodes. Results show all data from sensor nodes in representation of graph for analysis purpose.
Volume: 14
Issue: 2
Page: 852-858
Publish at: 2019-05-01

A data mining process using classification techniques for employability prediction

10.11591/ijeecs.v14.i2.pp1025-1029
Saouabi Mohamed , Abdellah Ezzati
The use of the data mining has become wider today; it can be applied in several fields like marketing, customer relationship management, medicine, engineering, etc. It can be used also in employability, the use of data mining in this field will give opportunities and solution for decision makers in this field in order to improve the employability and propose solutions. In this paper, we propose a data mining process for employability data using classification techniques, presenting in details all the phases in the process and what should be done in every phase. We used Rapid Miner Studio Educational Version 8.1.000, using an employability dataset.
Volume: 14
Issue: 2
Page: 1025-1029
Publish at: 2019-05-01

Design and analysis of dedicated real-time clock for customized microcontroller unit

10.11591/ijeecs.v14.i2.pp796-801
M.N. A.M. Alias , S. N. Mohyar , M. N. Isa , A. Harun , A. B. Jambek , S.A. Z. Murad
In this paper, a Real Time Clock (RTC) system for a dedicated microcontroller is proposed to provide the customized microcontroller its own time and date system. The RTC is developed using Verilog Hardware Description Language (HDL) and simulated using Synopsys software. This RTC is developed with standard Advance Peripheral Bus (APB) to be interfacing with the microcontroller through Advanced Microcontroller Bus Architecture (AMBA). This RTC will be used as an on-chip RTC in the microcontroller system to provide precise time and date which can be used for various applications. The basic architecture of RTC, APB standard for interfacing the RTC with AMBA bus, and the result in term of RTL, waveform, and layout will be discussed in this documentation. For this research, the part covered is on the logic part of the RTC that is bus interface, register, frequency divider and counter.
Volume: 14
Issue: 2
Page: 796-801
Publish at: 2019-05-01
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